Claims
- 1. A method for producing at least one semiconductor body, which comprises:providing a semiconductor wafer; applying a layer sequence with at least one active zone to the semiconductor wafer by a metal organic vapor phase epitaxy; and dry etching at least one mesa trench in the layer sequence, and varying etching parameters during the dry etching such that with an increasing etching depth a ratio of a vertical etching rate to a horizontal etching rate is increased for creating at least one semiconductor body with at least one side face curved in a concave fashion as viewed from outside the at least one semiconductor body.
- 2. The method according to claim 1, which comprises varying a concentration of various gases of an etching gas mixture during the dry etching step to increase the ratio of the vertical etching rate to the horizontal etching rate.
- 3. The method according to claim 1, which comprises:forming the at least one semiconductor body substantially from a material selected from the group consisting of GaAs, GaP, GaN, and an alloy of one of GaAs, GaP, and GaN formed with at least one of Al and In; using an etching gas mixture selected from the group consisting of chlorine and silicon tetrachloride, and chlorine and boron trichloride during the dry etching step; and varying a concentration of the chlorine in the etching gas mixture during the dry etching step.
- 4. The method according to claim 1, which comprises:severing the at least one active zone of the layer sequence during the dry etching step; and severing subsequently a composite formed of the semiconductor wafer and the layer sequence such that the at least one semiconductor body having the at least side face curved in the concave fashion is created.
- 5. The method according to claim 1, which comprises forming the at least one semiconductor body to transmit and receive light.
- 6. The method according to claim 5, which comprises forming a window layer permeable to a transmitted and received light on the sequence layer before carrying out the dry etching step.
- 7. The method according to claim 1, which comprises forming the semiconductor wafer substantially from GaAs.
- 8. The method according to claim 1, which comprises forming the layer sequence with at least one semiconductor layer containing InGaAlP.
- 9. The method according to claim 8, which comprises forming the layer sequence by applying an n-conductive first InGaAlP boundary layer, then applying an n-conductive active InGaAlP layer to the n-conductive first InGaAlP boundry layer, and subsequently applying an n-conductive second InGaAlP boundary layer to the n-conductive active InGaAlP layer.
- 10. The method according to claim 8, which comprises using an etching gas mixture selected from the group consisting of Cl2 and BCl3, and Cl2 and SiCl4 during the dry etching step.
- 11. The method according to claim 10, which comprises varying a concentration of the Cl2 in the etching gas mixture for increasing the ratio of the vertical etching rate to the horizontal etching rate during the dry etching step.
- 12. The method according to claim 6, which comprises forming the window layer substantially from a material selected from the group consisting of GaP and AlGaAs.
- 13. The method according to claim 1, which comprises creating a roughened surface on the at least one side face during the dry etching step.
- 14. The method according to claim 1, which comprises disposing the at least one mesa trench as a plurality of mesa trenches such that the at least one semiconductor body has a mesa edge on all of its side faces.
- 15. The method according to claim 1, which comprises forming the at least one active zone of the at least one semiconductor body to transmit and receive light.
Priority Claims (1)
Number |
Date |
Country |
Kind |
196 32 626 |
Aug 1996 |
DE |
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CROSS-REFERENCE TO RELATED APPLICATION
This is a continuation of copending International Application PCT/DE97/01738, filed Aug. 13, 1997, which designated the United States.
US Referenced Citations (6)
Non-Patent Literature Citations (2)
Entry |
“Reactive ion etching of GaAs, AlGaAs, and GaSb in Cl2 and SiCl4”, S.J. Pearton et al., 8257b Journal of Vacuum Science & Technology, Jul./Aug. 1990, No. 4, pp. 607-617. |
“Modeling of sloped sidewalls formed by simultaneous etching and deposition”, M. Gross et al., 8257b Journal of Vacuum Science & Technology, May/Jun. 1989, No. 3, pp. 534-541. |
Continuations (1)
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Number |
Date |
Country |
Parent |
PCT/DE97/01738 |
Aug 1997 |
US |
Child |
09/250868 |
|
US |