METHOD FOR RESETTING THRESHOLD VOLTAGE OF NON-VOLATILE MEMORY

Abstract

A method for resetting threshold voltage of a non-volatile memory is provided. The method is suitable for a non-volatile memory having a plurality of memory cells. Each memory cell includes a gate and a charge trapping layer. The method includes erasing the non-volatile memory by Fowler-Nordheim (FN) tunneling effect until erasure saturation. The non-volatile memory has a uniform saturation threshold voltage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

FIG. 1 shows a schematic sectional view of a SONOS memory.

FIG. 2 shows a relation diagram of the threshold voltage and the erasing time of a programmed SONOS memory when performing the erasing operation under different erasing biases.

FIG. 3 shows a relation diagram of the threshold voltage and the erasing time of a SONOS memory without being reset, programmed, or erased when performing the resetting operation under different erasing biases.

FIG. 4 shows a relation diagram of the erasing time and the value of 3 times the standard deviation (3σ) when performing the erasing operation under different erasing biases.

FIG. 5 shows a relation diagram of the threshold voltage and the count value when performing the resetting operation (erasing bias=11 volts) for different periods of erasing time.

FIG. 6 shows the flow chart of the steps of the method for resetting the threshold voltage of the non-volatile memory according to an embodiment of the present invention.

FIG. 7 shows the flow chart of the steps of the method for resetting the threshold voltage of the non-volatile memory according to another embodiment of the present invention.

Claims

1. A method for resetting threshold voltage of a non-volatile memory, suitable for the non-volatile memory having a plurality of memory cells, wherein each of the memory cells is disposed on a substrate and comprises a gate and a charge trapping layer, the method comprising: erasing the non-volatile memory by FN tunneling effect until erasure saturation such that the memory cells have a saturation threshold voltage.

2. The method of claim 1, wherein the step of erasing the non-volatile memory by FN tunneling effect comprises applying a first voltage to the gates, and applying a second voltage to the substrate, wherein the voltage difference between the second voltage and the first voltage is large enough to induce FN tunneling effect.

3. The method of claim 2, wherein the voltage difference is about 8 volts to 20 volts.

4. The method of claim 2, wherein the first voltage is a negative voltage, and the second voltage is a positive voltage.

5. The method of claim 2, further comprising determining the saturation threshold voltage according to the voltage difference.

6. A method for resetting threshold voltage of a non-volatile memory, suitable for the non-volatile memory having a plurality of memory cells, wherein each of the memory cells is disposed on a substrate and comprises a gate and a charge trapping layer, the method comprising: (a) detecting threshold voltages and uniformity thereof of the non-volatile memory;(b) determining whether or not the threshold voltages and the threshold voltage uniformity of the non-volatile memory are in a range of a target value; and(c) when the threshold voltages and the threshold voltage uniformity of the non-volatile memory are not in the range of the target value, performing a resetting step to erase the non-volatile memory by FN tunneling effect until erasure saturation.

7. The method of claim 6, wherein the step of erasing the non-volatile memory by FN tunneling effect comprises applying a first voltage to the gates, and applying a second voltage to the substrate, wherein the voltage difference between the second voltage and the first voltage is large enough to induce FN tunneling effect.

8. The method of claim 7, wherein the voltage difference is about 8 volts to 20 volts.

9. The method of claim 7, wherein the first voltage is a negative voltage, and the second voltage is a positive voltage.

10. The method of claim 7, wherein the voltage difference is determined according to the target value.

11. The method of claim 7, further comprising repeating the step (b) to step (c) until the threshold voltage and the threshold voltage uniformity of the non-volatile memory are in the range of the target value.

12. A method for resetting threshold voltage of the non-volatile memory, suitable for the non-volatile memory having a plurality of memory cells, wherein each of the memory cells is disposed on a substrate and comprises a gate and a charge trapping layer, the method comprising: setting a target value of the threshold voltage of the non-volatile memory;determining a voltage difference required to erase the non-volatile memory by FN tunneling effect to the target value of the threshold voltage;applying the voltage difference between the substrate and the gates to erase the non-volatile memory by FN tunneling effect until erasure saturation, so as to adjust the threshold voltage of the non-volatile memory to the target value of the threshold voltage.

13. The method of claim 12, wherein the voltage difference is about 8 volts to 20 volts.

14. The method of claim 12, wherein the step of applying the voltage difference between the substrate and the gate comprises: determining a first voltage to be applied to the gate and a second voltage to be applied to the substrate according to the voltage difference; andapplying the first voltage to the gate, and applying the second voltage to the substrate.

15. The method of claim 14, wherein the first voltage is a negative voltage, and the second voltage is a positive voltage.