Patent Application
20140099783
The present application claims priority under the Paris Convention to Chinese application number CN 201210375752.7, filed on Oct. 8, 2012, the disclosure of which is herewith incorporated by reference in its entirety.
The present invention relates to ion-implantation process, in particular relates to a method of adding an additional mask in the ion-implantation process.
Multi Project Wafer (MPW) services integrate a number of different integrated circuits designs onto the wafer while these integrated circuits have the same wafer fabrication process. After the wafer processing, every integrated circuit can get tens of sample dies. The amount of these sample dies can satisfy the requirement of planned experiments or tests during the design and development stages. The actual costs of the experimented wafer are shared by all members according to the area ratio of the dies, every one affords the part of his own. The actual cost is only 5%-10% of the standard cost. In this way, the cost of joining threshold is reduced during the development stages in such a manner that the sum of the costs imputed to each member. It also provides a comfortable environment for the integrated circuit designers and powerfully promotes the development of the integrated circuit industry.
Generally, it is essential to form different gate oxide layers due to the requirements of different processes in the design of the MPW. In the traditional process additional photomask is used to form some gate oxide layers of different thickness. Referring to the procedure in
MPW and the traditional single project process used in single wafer are that a process of photomask is added in the MPW process, and a process of secondary depositing and wet etching is added as well. However, it increases the expense and the period time of the research and development about the process.
Chinese patent (CN 102800590A) has disclosed a method of forming the SiGe-HBT transistor based on SOT (Silicon-On-Insulator). By means of adding a photomask in the process of forming the SiGe-HBT transistor to make the ion implant area be limited in the designated area. In this way, it solves the problem that the resistance of the collecting electrodes shag) increases and the maximum cut-off frequency (Ft) significantly decreases in the SiGeHBT device based on SOT whose thickness is no more than 150 nm.
In the above patent, it only uses the photomask to conduct the ion implantation in designated area, but it is not available to use the photomask to control the thickness of the ion implant layer. In actual use, it can only control the position of the ion implantation area but not its thickness. Consequently, the method in the above patent has some limitation in the actual processes.
Chinese patent (CN 102694027A) has disclosed a structure of the junction at non-equilibrium of the super junction device. In this patent publication several P columns are set up with different doping concentrations, and then according to the distribution of the transverse electric in everywhere the ion-implant areas of the P column in the layout are adjusted in order to make the P column completely be exhausted when it reaches the breakdown voltage. All the P columns are implanted under the mask at the same time, thus the amount of the implanted ion in the terminal of the junction is controlled, after many times of ion implanting and epitaxy process, several P columns with different doping concentrations are formed.
The above patent uses the mask in the ion implant process to control the amount of the ion implantation, and then the P columns with different doping concentration are formed. In the above patent, it is difficult to control the thickness of the ion implant layer. Consequently, the method in the above patent has some limitation in the actual process.
Due to the defects of the traditional art, the present invention discloses a method of adding an additional mask in the ion-implantation process, comprising:
A method of adding an additional mask in the ion-implantation process which is applied to the MPW, wherein a mask is added upon the said MPW, and the nitrogen element is implanted in the said MPW; the said nitrogen element is used for amorphizing the upper surface of the MP W.
According to the above method, wherein the nitrogen element is implanted in the said MPW by an ion implantation machine.
According to the above method, wherein 4 different doping concentrations of nitrogen element are implanted into the said MPW.
According to the above method, wherein the different doping concentrations of the nitrogen element are implanted in different areas of the said same MPW.
According to the above method, wherein the said method comprises the following steps:
The advantageous effects of the above technical solution are as follows:
The present invention will be further illustrated in combination with the following figures and embodiments, but it should not be deemed as limitation of the present invention.
At last, the oxide layers which may be gate oxide layer are formed as showed in
In the manufacturing process of the semiconductor device, the purpose of using elements of group 3 or group 5 of periodic table as the dopant is to change the electrical characteristics of silicon, but the ion is not limited to the group 3 or group 5, some particular ion also can change the electrical characteristics of silicon. When the nitrogen element is implanted into the wafer, the amorphization occurs on the surface of the silicon substrate. Consequently, it is easy to form the oxide layer on the surface of the wafer through an amorphizing process. The nitrogen element remained in the wafer will be dislodged from the wafer as N2 gas when the wafer is heated, thus the amorphizing process will not change the quality of the gate oxide layer. Therefore, with the usage of the mask of the ion implantation machine in the ion implantation, the different areas of the wafer will be doped with nitrogen element and different doping concentrations are applied in the different areas. The more the dosage value is, the thicker the gate oxide layer will be. As at most 4 different dosages of nitrogen element are implanted in different areas of this wafer, it can at most form 4 kinds of gate oxide layers of different in thickness.
The dosages of the nitrogen element can be calculated from the dummy wafer which could be put into experiment, and then the results of the experiments can be used directly in the MPW.
Although a typical embodiment of a particular structure of the specific implementation way has been given with the above description and the figures, it is appreciated that other changes based on the spirit of this invention may also be made. Though the preferred embodiments are proposed above, these contents will never be the limitation of this invention.
It is obvious for the skilled in the art to make varieties of changes and modifications after reading the above descriptions. Hence, the Claims attached should be regarded as all the changes and modifications which cover the real intention and the range of this invention. Any and all equivalent contents and ranges in the range of the Claims should be regarded belonging to the intention and the range of this invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201210375752.7 | Oct 2012 | CN | national |
