1. Field of the Invention
The invention relates to a method of cleaning a semiconductor wafer, and more particularly to a method of cleaning a semiconductor wafer capable of inhibiting metal contamination.
2. Description of the Related Art
Increased integration in semiconductor memory devices such as DRAMs (dynamic random access memories) and demand for high performance thereof has required the steady replacement of conventional materials constituting parts of semiconductors with novel materials. For example, various attempts to form gate-insulating layers or dielectric layers are being actively undertaken using materials having a high dielectric constant, for example metal oxides, instead of using a silicon dioxide (SiO2) layer or silicon nitride (Si3N4) layer such as employed as gate-insulating layers of transistors constituting DRAMs or dielectric layers of capacitors. Among these metal oxides, alumina (Al2O3) is representative. In addition, in order to increase the operating speed of DRAM devices, a capacitor having a metal-insulator-metal (MIM) structure is employed.
Generally, an amorphous alumina (Al2O3) layer is formed by metal organic chemical vapor deposition (MOCVD), or atomic layer deposition (ALD) using metal/organic sources. However, an amorphous alumina (Al2O3) layer is susceptible to etching by a variety of chemicals used in DRAM manufacturing processes. In particular, upon performing a cleaning process involving batch dipping wherein several wafer sheets are dipped in a bath containing such chemicals, aluminum elements may be separated from the alumina (Al2O3) film, thereby forming particles. Thereby, when other wafers are cleaned in the same bath, these wafers may be contaminated with aluminum (Al) particles generated from previous cleaning steps. As such, wafers must be cleaned by means of a separate facility.
Similarly, such problems are also raised in cleaning processes performed after formation of the capacitor having the metal-insulator-metal (MIM) structure. That is, when cleaning processes are carried out after formation of a metal-insulator-metal (MIM) type capacitor, an exposed metal layer in the bath leads to chemical degradation by the particles. As a result, the wafer may be contaminated with such particles. In addition, the cleaning facility used in the cleaning processes after formation of the MIM type capacitor, cannot be used in cleaning of other wafers, which in turn leads to problems associated with a need for additional facilities.
The invention provides a method of cleaning a semiconductor wafer by eliminating the occurrence of metal or metal oxide particles so as not to cause metal contamination.
In accordance with an aspect of the invention, a method of cleaning a semiconductor wafer includes the step of:
supplying a mixed solution of a dilute hydrofluoric acid solution and a hydrogen peroxide solution to a bath;
loading a semiconductor wafer into the bath such that the semiconductor wafer is dipped into the mixed solution, rinsing the semiconductor wafer with the mixed solution;
draining the mixed solution and supplying deionized water to the bath, rinsing the semiconductor wafer with the deionized water; and
draining the deionized water and supplying isopropyl alcohol to the bath, drying the semiconductor wafer.
The semiconductor wafer may be loaded to the bath in a batch form of a set including a plurality of wafers.
In accordance with another aspect of the invention, a method of cleaning a semiconductor wafer includes the steps of: finally rinsing a semiconductor wafer having an exposed metal-containing layer with a mixed solution of a dilute hydrofluoric acid solution and hydrogen peroxide solution.
The above-mentioned method may further include rinsing the finally rinsed semiconductor wafer with deionized water.
In this case, the method may further include drying the semiconductor wafer rinsed with deionized water. Drying may be carried out using isopropyl alcohol.
Preferably, in the case of either aspect of the invention the concentration of the hydrofluoric acid is in the range of 44 wt % to 53 wt %, preferably 49 wt %, and the concentration of hydrogen peroxide is in the range of 25 wt % to 35 wt %, preferably 30 wt %.
Preferably, in either case the volume ratio of hydrofluoric acid to deionized water to hydrogen peroxide contained in the mixed solution is in the range of 1 to 100-300 to 0.05-0.1, respectively.
Preferably, in either case the temperature of the mixed solution is in the range of 20° C. to 30° C.
The metal-containing layer may include a metal layer or a metal oxide layer.
The metal layer may include a titanium film, a copper film, a platinum film or a ruthenium film, for example. The metal oxide layer may include alumina, a hafnium oxide layer, a zirconium oxide layer, a tantalum oxide layer, or a titanium dioxide layer, for example.
The invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
The invention will now be described more fully hereinafter with reference to accompanying drawings, in which preferred embodiments of the invention are shown. The invention may, however, be embodied in various different forms and should not be construed as limited to the embodiments set forth herein.
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A mixed solution 210 of the dilute hydrofluoric acid (HF) solution and hydrogen peroxide (H2O2) solution is supplied in a sufficient amount such that the wafer, which will be loaded to the bath 102 by subsequent wafer loading, is completely immersed in the mixed solution 210. The concentration of hydrofluoric acid (HF) and hydrogen peroxide (H2O2) contained in the mixed solution 210 are preferably 44 wt % to 53 wt % HF, highly preferably 49 wt % HF, and 25 wt % to 35 wt % H2O2, highly preferably 30 wt % H2O2. The volumetric ratio of hydrofluoric acid to deionized water to hydrogen peroxide (H2O2) contained in the mixed solution 210 is preferably in the range of 1 to 100-300 to 0.05-0.1, respectively. In addition, the temperature of the mixed solution 210 is preferably set to a range of about 20° C. to 30° C.
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As described above, in accordance with the cleaning method of the invention, the final rinse with the mixed solution 210 containing dilute hydrofluoric acid (HF) and hydrogen peroxide (H2O2) can remove metal contaminants or residual substances present in the bath 102. Therefore, even after performing cleaning processes for the wafer 100 which contain material layers containing metals or metal oxide layers to be exposed outside, the same bath 102 can be used to carry out cleaning processes for other wafers without causing metal contamination.
As an example, upon performing etching for an upper electrode of the capacitor of the DRAM, an interlayer dielectric (ILD), alumina (Al2O3) as a dielectric layer and the upper electrode are sequentially etched, and thereby the side surface of alumina (Al2O3) is exposed in the course of such an etching process. Under such conditions, if cleaning processes are carried out using conventional SPM, BOE and SC-1 alone, this leads to contamination of the wafer with aluminum (Al) produced from the exposed surface of alumina (Al2O3). In contrast, as in the invention, where final rinsing is carried out using the mixed solution 210 consisting of dilute hydrofluoric acid (HF) and hydrogen peroxide (H2O2), contamination by aluminum (Al) is prevented. After this, even when wafers having passed through other process steps, for example wafers subjected to etching for formation of a landing plug contact connecting an impurity region of a semiconductor substrate to bit lines or a lower electrode of the capacitor, are cleaned in the same bath used in a previous rinse step, aluminum (Al) contamination does not occur. Similarly, this advantage can also be applied to cleaning processes performed before the deposition process.
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As apparent from the above description, the method of cleaning a semiconductor wafer in accordance with the invention performs the final rinse step utilizing the mixed solution of dilute hydrofluoric acid (HF) and hydrogen peroxide (H2O2), and thereby provides advantages such as no metal contamination of the wafer even upon performance of cleaning processes for wafers exposing metal contamination source, capability to inhibit yield reduction due to metal contamination even upon use of the same cleaning facility for various other processes, and prevention of deterioration in properties at interfaces between respective material layers, due to metal impurities.
Although the preferred embodiments of the invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
Number | Date | Country | Kind |
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2005-28294 | Apr 2005 | KR | national |