Patent Application
20070298600
The above and other features and advantages of the present invention will become more apparent by describing, in detail, preferred embodiments thereof with reference to the attached drawings in which:
Advantages and features of the present invention and methods of accomplishing the same may be understood more readily by reference to the following detailed description of preferred embodiments and the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art, and the present invention will only be defined by the appended claims. Like reference numerals refer to like elements throughout the specification.
The present invention will now be described more fully with reference to the accompanying drawings, in which preferred embodiments of the invention are shown.
First, a semiconductor device according to the embodiment of the present invention will be described in detail with reference to
As shown in
Further, an interlayer insulating layer 140 is located on the semiconductor substrate 100. On the interlayer insulating layer 140, contact holes 142 through which the nickel silicide layer 132 formed on the surfaces of the gate electrode 110 and the source/drain regions 122 is exposed are formed.
Furthermore, a barrier 150 is conformably formed along a surface of the interlayer insulating layer 140 with the contact holes 142 formed therein. At this time, the barrier 150 includes an ohmic layer 152 and a diffusion barrier 154, and the ohmic layer 152 being in contact with the nickel silicide layer 132 is made of a refractory metal, which is converted to silicide at a temperature of 500° C. or more, in order to improve the thermal stability. As the refractory metal, Ta, Hf, W, Mo, or V can be used, for example.
In addition, the diffusion barrier 154 on the ohmic layer 152 is made of, for example, TiN, TaN, or Wn and serves to prevent a metal material, for filling the contact holes 142, from diffusing. In addition, for example, W, Cu, or Al may be used as the metal material for filling the contact holes 142.
Hereinafter, a method of fabricating a semiconductor device according to the embodiment of the present invention will be described in detail with reference to
First, as shown in
Thereafter, the gate electrodes 110 are formed on the active region of the semiconductor substrate 100 (S10). The gate electrodes 110 can be formed by sequentially stacking the gate insulating layer 112 and the conductive layer 114 for gate electrodes on the semiconductor substrate 100 and then patterning the stacked gate insulating layer 112 and conductive layer 114. At this time, the gate insulating layer 112 may be formed of an oxide film, and the conductive layer 114 for gate electrodes may be formed of a polysilicon film doped with impurities.
Then, the spacers 116 are formed on both the sides of the gate electrode 110 by evaporating an insulating layer for spacers on an entire surface of the semiconductor substrate 100 and then by performing an anisotropic etching process on the insulating layer. At this time, the insulating layer for spacers may be formed of a silicon nitride film.
Subsequently, impurities are ion-implanted into the semiconductor substrate 100 by using the gate electrodes 110, the spacers 116, and the element separation layer 102 as an ion implantation mask. As a result, the source/drain regions 122 are formed within the semiconductor substrate 100 so as to be located at both the sides of each of the gate electrodes 110 (S20). The gate electrodes 110, the spacers, and the source/drain regions 122 form a MOS (metal oxide silicon) transistor.
Then, the semiconductor substrate 100 on which the source/drain regions 122 are formed is subjected to a thermal process so as to activate the impurities within the source/drain regions 122. Then, a surface of the semiconductor substrate 100 on which the gate electrodes 110 and the source/drain regions 122 are formed is pre-cleaned cleaned so as to remove a natural oxide layer, particles, or the like remaining on the surface of the semiconductor substrate 100.
Thereafter, as shown in
Then, as shown in
After the nickel silicide layer 132 is formed, a selective wet etching process is performed so as to remove nickel or nickel alloy, which has not reacted with silicon (S50). At this time, a solution made by mixing sulphuric acid (H2SO4) and hydrogen peroxide (H2O2) may be used as a wet etching solution.
Then, a second thermal process is performed on the entire surface of the semiconductor substrate 100 so as to form the nickel silicide layer 132 having excellent thermal stability (S60). The second thermal process is performed at a temperature of approximately 400 to 500° C., which is a temperature higher than the first thermal process.
Thereafter, as shown in
Subsequently, as shown in
Specifically, since the ohmic layer 152 is not converted to silicide as long as the subsequent processes are performed at a temperature of approximately 500° C. or less, it is possible to prevent the nickel silicide layer 132 from being damaged due to the reaction between silicon and a metal material included in the ohmic layer 152.
In addition, the ohmic layer 152 may be conformably formed along the contact holes 142 by performing an evaporation process, such as a PVD (physical vapor deposition) process, a CVD (chemical vapor deposition) process, or an ALD (atomic layer deposition) process.
In the embodiment of the invention, even though the refractory metal converted to silicide at a temperature of 500° C. or more has been used, the refractory metal can be selected depending on the temperature in the subsequent processes.
As such, since it is possible to prevent the metal material included in the ohmic layer 152 from reacting with the nickel silicide layer 132 located below the ohmic layer 152 during the subsequent processes, it is possible to form a contact having a low contact resistance and excellent thermal stability.
Then, the diffusion barrier 154 is conformably formed on the ohmic layer 152 (S100). The diffusion barrier 154 serves to prevent that the metal material for filling the contact holes 142 diffuses and then reacts with the silicon. The diffusion barrier 154 can be made of, for example, TiN, TaN, or WN by using a CVD method.
Then, a metal material is buried within the contact holes 142 on which the barrier 150 is formed, thereby completing the contact as shown in
Although the present invention has been described in connection with the exemplary embodiments of the present invention, it will be apparent to those skilled in the art that various modifications and changes may be made thereto without departing from the scope and spirit of the invention. Therefore, it should be understood that the above embodiments are not limitative, but illustrative in all aspects.
As describe above, according to the method of fabricating the semiconductor device and the semiconductor device fabricated thereby of the invention, since the ohmic layer is made of a refractory metal which is converted to silicide at a temperature of approximately 500° C. or more, it is possible to prevent the ohmic layer and the nickel silicide layer from reacting with each other during the subsequent processes performed at a temperature of approximately 500° C. or less.
That is, since the ohmic layer is formed by using the refractory metal, which is converted to silicide at a temperature higher than in the subsequent processes, it is possible to form a contact having low contact resistance and excellent thermal stability.
