Patent Application
20090233240
This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2008-0024501, filed on Mar. 17, 2008, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference.
1. Field
Example embodiments provide a method of fabricating a triode-structure field-emission device, and more particularly, a method of fabricating a triode-structure field-emission device capable of controlling the size of a gate hole using a two layer structure resist pattern.
2. Description of the Related Art
A diode field-emission device may include an upper substrate and a lower substrate which face each other at a given interval, an anode and a cathode formed on the facing surfaces of the upper and lower substrates, a phosphor with which the anode is coated, and an emitter formed on the cathode. However, it may be difficult to apply the diode field-emission device to a display device, since the diode field-emission device may have difficulties controlling the electrons emitted from the emitter.
In order to improve control of the electrons emitted from the field-emission device, a triode-structure field-emission device was developed. The triode-structure field-emission device may include a triode which is a cathode, a gate electrode, and an anode. The gate electrode may face the cathode with the insulating layer of a lower substrate interposed. The gate electrode for controlling the emission of the electrons may have a gate hole structure and may apply an electric field to an emitter provided in the cathode of the lower substrate to emit the electrons using electron beam tunneling effect. The field-emission characteristics of the triode-structure field-emission device may vary with the distance between the gate hole and the emitter, the alignment state of the gate hole and the emitter, or the size of the gate hole, or any combination thereof.
Example embodiments provide a method of fabricating a triode-structure field-emission device capable of controlling the size of a gate hole using one mask to improve the production efficiency of a field-emission device and to improve the field-emission characteristics of the field-emission device.
Example embodiments provide that a method of fabricating a triode-structure field-emission device may include sequentially forming a cathode, an insulating layer, and a gate metal layer on a substrate, forming a first resist pattern having a first opening on the gate metal layer, forming a second resist pattern having a second opening on the first resist pattern, wherein the second opening is smaller than the first opening, sequentially etching the gate metal layer and the insulating layer using the first resist pattern as a first mask pattern to form a gate electrode having a first hole and an insulating layer having a second hole, wherein the first hole and the second hole correspond to the first opening, forming a catalyst layer on the second resist pattern and on a portion of the cathode exposed through the first hole and the second hole using the second resist pattern as a second mask pattern, removing the first resist pattern, the second resist pattern, and the catalyst layer formed on the second resist pattern, and forming an emitter on the catalyst layer in the second hole.
In example embodiments, forming the first resist pattern having the first opening on the gate metal layer and the second resist pattern having a second opening on the first resist pattern, wherein the second opening is smaller than the first opening may include sequentially coating a first resist and a second resist on the gate metal layer, exposing the first resist and the second resist, and developing the first resist and second resist to form the first resist pattern and the second resist pattern.
In example embodiments, the developing speed of the first resist may be faster than the developing speed of the second resist.
In example embodiments, a size of the first opening may be controlled by a developing time of the first resist.
In example embodiments, the first resist may be a photosensitive resist or a non-photosensitive resist.
In example embodiments, the second resist may be a photosensitive resist.
In example embodiments, a size of the first hole of the gate electrode may be controlled by a size of the first opening of the first resist pattern.
In example embodiments, a size of catalyst layer formed on the cathode may be controlled by a size of the second opening of the second resist pattern.
In example embodiments, the emitter may be formed of a nano wire, a nano tube, or nano particles.
In example embodiments, the nano wire, the nano tube, or nano particles may be formed of carbon or a metal oxide.
The above and other features and advantages of example embodiments will become more apparent by describing them in detail with reference to the attached drawings. The accompanying drawings are intended to depict example embodiments and should not be interpreted to limit the intended scope of the claims. The accompanying drawings are not to be considered as drawn to scale unless explicitly noted.
Detailed example embodiments are disclosed herein. However, specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments. Example embodiments may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
Accordingly, while example embodiments are capable of various modifications and alternative forms, embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intent to limit example embodiments to the particular forms disclosed, but to the contrary, example embodiments are to cover all modifications, equivalents, and alternatives falling within the scope of example embodiments. Like numbers refer to like elements throughout the description of the figures.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of example embodiments. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it may be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g., “between” versus “directly between”, “adjacent” versus “directly adjacent”, etc.).
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises”, “comprising,”, “includes” and/or “including”, when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be noted that in some alternative implementations, the functions/acts noted may occur out of the order noted in the figures. For example, two figures shown in succession may in fact be executed substantially concurrently or may sometimes be executed in the reverse order, depending upon the functionality/acts involved.
First, as shown in
The insulating layer 30 may be formed by depositing an insulating material such as SiO2, Si3N4, and Al2O3 on the cathode 20. For example, the insulating layer 30 may be deposited on the cathode 20 using a chemical vapor deposition (CVD) method.
The gate metal layer 40 may be formed of a conductive material such as Cr and Nb and may be deposited on the insulating layer 30 by an electron beam deposition method or a sputtering method. The gate metal layer may be formed using the same method as the cathode 20 but is not limited thereto.
Next, as shown in
As shown in
Next, a mask (not shown) having a window pattern may be provided on the first and second resists 51 and 52 to expose portions of the first and second resists 51 and 52 to ultraviolet (UV) rays or an electron beam, for example. The window pattern of the mask may correspond to the second opening 54.
After exposing the first and second resists 51 and 52, the first and second resists 51 and 52 may be developed to form the first and second resist patterns 51′ and 52′. A dipping method, a paddle method, or a shower method may be used as a developing method. Example embodiments of the developing processes provide that the exposed part of the second resist 52 may be developed to form the second resist pattern 52′ having the second opening 54. Then, a developing solution may permeate the first resist 51 through the second opening 54 to etch the first resist 51 and form the first resist pattern 51′ having the first opening 53. The size of the first opening 53 may be controlled by the developing time of the first resist 51, and the size of the first opening 53 may be varied by varying the developing time of the first resist 51. For example, the first opening 53 may be formed to be larger than the second opening 54 by increasing the developing time, and a first resist pattern 51′ having an undercut shape may be formed.
Example embodiments provide that the same or different developing solutions may be used to develop the first and second resists. A positive photosensitive resist may be used as the second resist 52 and a photosensitive or non-photosensitive resist may be used as the first resist 51.
In alternative example embodiments, the first resist 51 may be a non-photosensitive resist and the second resist 52 may be a photosensitive resist, and after a developing process is performed, the second resist pattern 52 may have a second opening 54 of the same size as the window pattern of the mask, and the first resist pattern 51 may have a first opening 53 whose size is controlled by the developing time and is unaffected by the amount of exposure.
If both the first resist and the second resist are photosensitive resists, the developing characteristics of the first and second resists 51 and 52 based on the developing solution may be different from each other. For example, the developing speed of the first resist 51 may be different from the developing speed of the second resist 52. The developing speed of the first resist 51 may be faster than the developing speed of the second resist 52 when the same developing solution is used.
Next, as shown in
A portion of the gate metal layer 40 may be exposed by the first opening 53 of the first resist pattern 51′ and the exposed portion may be etched so that a gate electrode 40′ having a first hole H1 corresponding to the first opening 53 is formed. The size of the first hole H1 of the gate electrode 40′ may be controlled in accordance with the size of the first opening 53 of the first resist pattern 51′. Accordingly, the gate electrode 40′ having the first hole H1 of various sizes may be formed by controlling the developing speed of the first resist 51.
As shown in
As described above, when the two-layered first and second resist patterns 51′ and 52′ according to example embodiments are used, the size of the first hole H1 of the gate electrode 40′ may be changed using one mask by controlling only the developing time of the first resist 51.
Referring to
Then, as shown in
The catalyst layer 61 may be required for growing the emitter (shown as reference numeral 70 in
The catalyst layer 61 deposited on the cathode 20 may correspond to the second opening 54 of the second resist pattern 52′ in size and shape. Therefore, the pattern of the catalyst layer 61 deposited on the cathode 20 may be controlled by the size and the shape of the second opening 54. As described above, the pattern of the catalyst layer 61 may be determined by the second resist pattern 52′ and may be unaffected by the first resist pattern 51′.
Therefore, when the first and second resists 51 and 52 are used, the pattern of the first hole H1 of the gate electrode and the pattern of the catalyst layer 61 may be independently controlled using only one mask. Accordingly, costs incurred by using additional masks may be saved and self-alignment may be performed.
In additional example embodiments, as shown in
After performing the lift-off process, as shown in
Although the emitter 70 may be formed of CNT, example embodiments are not limited thereto.
The emitter 70 may be formed by growing the CNT on the catalyst layer 61 by the CVD method using a hydrocarbon gas such as C2H2, C2H4, and CH4 or a COx gas. A CNT growing area of the catalyst layer 61 may be determined by the size of the second opening 54 of the second resist pattern 52′ and this determination may be unaffected by of the first resist pattern 51′.
As described above, the pattern of the first hole H1 of the gate electrode 40′ may be controlled by the first resist pattern 51′ and the CNT growing area, and accordingly the area of the catalyst layer 61 of the emitter 70 may be controlled independently by the second resist pattern 52′.
When the first resist pattern 51′ and second resist pattern 52′ are used, the size of the first hole H1 of the gate electrode 40′ may be changed and the pattern of the catalyst layer 61 may be determined using one mask.
Therefore, in order to independently control the pattern of the first hole H1 of the gate electrode 40′ and the pattern of the catalyst layer 61, it may not be necessary to use an additional mask. As a result, the fabricating time and cost of the field-emission device may be reduced. In addition, it is possible to avoid the misalignment of masks which may occur when more than one mask is used.
As described above, the size of the first hole H1 of the gate electrode 40′ may be controlled only by the developing time of the first resist 51. As a result, the trajectory of the electron beam emitted from the emitter 70 may be controlled by the first hole H1. The first hole H1 is illustrated by the distance D between the emitter 70 and the gate electrode 40′ in
Additionally, it may be possible to reduce or prevent the flow of electrons emitted from the emitter 70 toward the insulating layer 30′ due to a contact with the emitter 70 and the gate electrode 40′.
Example embodiments provide that the first resist may be an non-photosensitive resist and the second resist may be a photosensitive resist. The first resist may be spin coated on the gate metal layer under the conditions of about 3,000 rpm and about 40 seconds and may be annealed on a hot plate at about 190° C. for five minutes. Next, the second resist may be spin coated under the conditions of about 3,000 rpm and about 40 seconds and may be annealed at about 110° C. for two minutes.
Then, the first and second resists may be exposed to UV rays of 12.7 mW for about 3.5 seconds. After performing the exposing process, the substrate may be dipped into developing solution 300 MIF to develop the first and second resists for about 45 to about 60 seconds. Then, the gate metal layer and the insulating layer may be etched.
Example embodiments having thus been described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the intended spirit and scope of example embodiments, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2008-0024501 | Mar 2008 | KR | national |
