Claims
- 1. A method of forming a semiconductor integrated circuit, comprising the steps of:
- forming an insulating layer over a conductive layer;
- etching an opening through a selected region of the insulating layer having a specified contact dimension and having substantially vertical sidewalls and exposing the underlying conductive layer in the opening;
- depositing a conformal polysilicon layer over the insulating layer and in the opening;
- oxidizing the polysilicon layer narrowing the contact dimension of the opening by approximately twice the thickness of the oxidized polysilicon; and
- performing an etch back of the oxidized polysilicon layer forming oxidized polysilicon sidewall spacers along the vertical walls of the insulating layer and exposing the underlying conductive layer.
- 2. The method of claim 1, wherein the polysilicon layer as deposited has a thickness of between about 100 to 500 angstroms.
- 3. The method of claim 1, wherein the oxidized polysilicon after oxidation has a thickness of between about 200 to 1000 angstroms.
- 4. The method of claim 1, wherein the step of performing an etch back of the oxidized polysilicon comprises anisotropic etch.
- 5. The method of claim 1 further comprising the step of forming a thin conformal oxide layer over the insulating layer and in the opening before the polysilicon layer is formed.
Parent Case Info
This is a Division of application Ser. No. 08/574,659, filed Dec. 19, 1995, U.S. Pat. No. 5,847,460.
US Referenced Citations (28)
Foreign Referenced Citations (1)
Number |
Date |
Country |
0 369 953 |
May 1990 |
EPX |
Divisions (1)
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Number |
Date |
Country |
Parent |
574659 |
Dec 1995 |
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