Patent Application
20230040826
The present disclosure relates to the field of semiconductor materials for microelectronic components. In particular, it relates to a process for joining two semiconductor substrates by molecular adhesion.
The joining of substrates by molecular adhesion (“direct wafer bonding”) is a well-known technique that has applications in the fields of microelectronics, optoelectronics, and microelectromechanical systems, for example, for manufacturing silicon-on-insulator substrates, multi junction photovoltaic cells, and for producing 3D structures.
According to this technique, two substrates are brought into intimate contact so that their surfaces are brought close enough to one another for atomic and/or molecular bonds to be formed between them. In this way, adhesion forces are created between the two contact surfaces without employing an intermediate adhesion layer such as a polymer or adhesive layer.
The assembly obtained is then generally subjected to a heat treatment at a temperature that may vary between 50° C. and 1200° C., depending on the nature of the substrates and the envisaged application, so as to strengthen the adhesion.
In some cases, joining by molecular adhesion results in the appearance of defects, called bonding defects, at the bonding interface. These may be “bubble”-type defects (“bonding voids”). The bonding defects may result from the trapping and build-up of gaseous species between the surfaces of the joined substrates. These species may correspond to the species adsorbed on the surface of the substrates during their preparation before joining. They may, in particular, correspond to residues from chemical reactions, in particular, from the chemical reaction of water, which occur when the substrates are brought into intimate contact or during the anneal for strengthening the bonding.
The presence of bonding defects at the joining interface is highly detrimental to the quality of the structures produced. For example, when the joining step is followed by a step of thinning one of the two substrates in order to form a layer by milling or using the Smart Cut™ technique, the absence of adhesion between the two surfaces at the location of a bonding defect may lead to the local tearing of the thin layer at this location.
Additionally, when a composite structure, comprising, for example, a thin layer of monocrystalline silicon carbide (SiC) joined to a carrier substrate made of SiC, is intended for the production of vertical power devices, good thermal and electrical conduction between the thin layer and the carrier substrate is required.
To join the substrates that will give rise to the composite structure, there are two main approaches for carrying out direct bonding: the hydrophilic approach and the hydrophobic approach.
In the hydrophilic approach, the surfaces of the two substrates are treated in order to make them hydrophilic by generating, in particular, a layer of native oxide. A layer of water is present between the two substrates in order to promote the formation of atomic and/or molecular bonds that are responsible for the forces of adhesion between the two substrates. However, the presence of the layer of native oxide at the bonding interface affects and worsens the electrical conduction between the two substrates.
In the hydrophobic approach, the surfaces of the two substrates are treated so as to be hydrophobic: the layer of native oxide is removed and the presence of water between the substrates is limited. In order to limit the presence of water still further, the joining between the two substrates may be carried out under a controlled atmosphere, such as an anhydrous atmosphere or vacuum. Two substrates joined together using this approach will exhibit good vertical electrical and thermal conduction (Yushin et al., Applied Physics Letters, 84 (20), 3993-3995, 2004). However, these conditions may be complex to obtain in an industrial environment. Moreover, the applicant has observed that when the two SiC substrates joined using this approach were subjected to a temperature higher than 700° C., pressurized bubbles could form at the interface between the two substrates and negatively affect the quality of the bonding. This is especially troublesome when the assembly formed by joining the two substrates has to be subjected to a heat treatment at a temperature beyond that at which such bubbles appear, for example, in order to perform a layer transfer using the Smart Cut™ method.
There is also another approach based on the bonding of active surfaces (“surface active bonding,” or SAB) as described, for example, by F. Mu et al. (4th IEEE International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D), 15-16 Jul. 2014). The surfaces of the two substrates to be joined are subjected to atom bombardment in order to activate their surfaces before joining them together at a low temperature. This approach makes it possible to obtain a very good force of adhesion between the two substrates but forms an amorphous layer at the interface between the two substrates. The presence of this amorphous layer generally worsens the conductivity between the two substrates.
The present disclosure relates to a process for joining two semiconductor substrates by molecular adhesion, which allows good electrical and thermal conduction of the joining interface, and which decreases the number of bonding defects or even prevents their appearance entirely.
One embodiment of this disclosure provides a process for joining two semiconductor substrates by molecular adhesion comprising:
According to other advantageous and non-limiting features of the disclosure taken alone or in any technically feasible combination:
Further features and advantages of the disclosure will become apparent from the following detailed description of the invention, with reference to the appended figures, in which:
a to 4e show alternative or optional steps in the joining process in accordance with embodiments of the disclosure.
As mentioned above, the present disclosure relates to a process for joining, by molecular adhesion, a first substrate 1 to a second substrate 2, each substrate being formed from a semiconductor material.
More particularly, the disclosure seeks to form a composite structure 3′ comprising a monocrystalline thin layer 1′ arranged on a carrier substrate 2 (
Advantageously, the thin layer 1′ has a thickness of less than one micrometer, compatible with a SMART CUP®-type method. Before being joined, the first substrate 1 and the second substrate 2 have a thickness on the order of a few hundreds of micrometers.
These two substrates 1, 2 may be formed from different or identical semiconductor materials chosen from silicon carbide (SiC) and indium phosphide (InP). More generally, these materials may be binary, ternary or quaternary compounds formed from elements from column IV and columns III and V of the periodic table of the elements.
The substrates 1, 2 each comprise a “main” face 1a, 2a that corresponds to the faces that will be brought into intimate contact in order to perform the joining.
Before being brought into intimate contact, in order to achieve direct bonding by molecular adhesion, the main surfaces 1a, 2a advantageously undergo various treatments. The aim of these treatments is to clean the main surfaces 1a, 2a in order to remove contaminants (particulate, organic, etc.), and potentially to activate them, in order to promote chemical surface terminations that are favorable to the propagation of the bonding wave and to the high strength of the bonding interface 4. Chemical-mechanical polishing of the main surfaces 1a, 2a may also be applied in order to make the main surfaces 1a, 2a as smooth as possible. It is also conceivable to form, on one of the main surfaces 1a, 2a or on each thereof, an electrically conductive intermediate layer that could also be smoothed by chemical-mechanical polishing.
The first step a) (
The bringing into intimate contact of the substrates 1, 2 may be carried out under ambient atmosphere or under a controlled atmosphere, for example, under inert gas and/or under vacuum. It is conceivable to carry out this bringing into intimate contact at ambient temperature or at a higher temperature, for example, between 30° C. and 500° C.
Upon completion of step a), the assembly 3 is subjected, in the next step b) (
In the case that the two substrates 1, 2 are formed of SiC, this predetermined first temperature is approximately 200° C., and the first temperature may be chosen, for example, to be equal to 700° C.
The gas trapped in these bubbles 5 may be, for example, dihydrogen, water vapor or carbon dioxide, or other gases arising from the thermally activated reaction at the bonding interface 4. It has been observed that these bubbles 5 are able to remain stable over a wide range of temperatures, typically up to 1100° C., or even higher, in the case of substrates 1, 2 made of SiC. This is problematic, in particular, when a thinning step later in the process has to be carried out without exceeding the aforementioned range in which the bubbles 5 are stable: the bonding defects (corresponding to the bubbles) are liable to harm the integrity and the quality of the thin layer 1′ resulting from the thinning of the first substrate 1.
The next step c) (
The debonding step c) may comprise mechanically separating the two substrates 1, 2 by inserting a blade 6 between the two substrates 1, 2 at the bonding interface 4. The material of the blade is chosen so as to avoid any contamination so as to be compatible with microelectronic applications. The blade is preferably made of Teflon. When it is inserted at the bonding interface 4, the blade 6 generates a debonding wave that propagates along the bonding interface 4 and causes the separation of the two substrates 1, 2. The debonding wave reaches the bubbles 5 present at the interface so as to release the trapped gases and eliminate the bubbles 5. The debonding is, therefore, not necessarily performed over the entire bonding interface 4; the two substrates 1, 2 may thus remain joined over a portion of the bonding interface 4.
This debonding step c) (
Step c) may be carried out entirely or partly at a second temperature higher than or equal to ambient temperature. This second temperature is generally lower than 700° C., preferably lower than 200° C. and more preferably lower than 100° C.
Step c) may also comprise a step of ion-beam-etching the main surfaces 1a, 2a of the two substrates 1, 2 in order to remove any oxide layer. This typically involves bombardment with argon ions at an energy from a few tens to a few hundreds of eV for a few tens of seconds.
The two substrates 1, 2 are then brought back into intimate contact at the bonding interface 4 in step d) (
After this step d), it will be possible to subject the assembly 3 to heat treatments without generating bonding defects that might negatively affect the quality of the first substrate 1 or of the thin layer 1′ that is obtained upon completion of the optional later thinning step e). This absence of detrimental bonding defects may be explained by the fact that there are now no, or very few, species that are able to react, with temperature, at the bonding interface 4 after definitive joining. Additionally, the precautions taken in steps c) and d) to avoid introducing new impurities also contribute to the absence of bonding defects.
Upon completion of step d), if the target application requires a thin layer 1′ and the initial thickness of the first substrate 1 is not suitable, it is possible to carry out a step e) of thinning the first substrate 1. Being able to subject the assembly 3 to heat treatments without generating bonding defects is especially important if step e) of thinning the first substrate 1 comprises a heat treatment. Indeed, without that, there would be a risk of negatively affecting the quality of the thin layer 1′ resulting from step e).
The aim of step e) (
According to a first embodiment (
According to a second embodiment, the thin layer 1′ may be formed by layer transfer using the Smart Cut™ method. In this case, the joining process according to the disclosure comprises, before step a) of bringing into intimate contact, a step of forming a buried weakened plane 1b in the first substrate 1 (
Steps a) to d) of this second embodiment, illustrated by
Step e) comprises splitting along the buried weakened plane lb in order to separate the thin layer 1′ from the remainder 1″ of the first substrate 1 and thus transfer the thin layer 1′ onto the second substrate 2 (
Still according to this second embodiment, it is necessary that the material of the first substrate 1 and the properties of the buried weakened plane 1b (related to the conditions of implantation of the light species) allow a split to be obtained at a second predetermined temperature that is higher than the first temperature of step b) by at least 50° C. to 150° C. in order not to cause premature separation of the thin layer 1′ from the remainder 1″ of the first substrate 1. Similarly, it is necessary that the first temperature of step b) (
Of course, it would be possible to envisage techniques other than those presented above for forming the thin layer 1′ in step e).
Upon completion of the aforementioned steps a) to e), a composite structure 3′ exhibiting no detrimental bonding defects is obtained. The composite structure 3′ obtained thus exhibits a very good force of adhesion between the thin layer 1′ and the carrier substrate 2.
Such a composite structure 3′ may thus be used to form an additional layer thereon by epitaxy, for example, with a thickness of 10 micrometers at 1700° C., in which devices will be formed, without fear of damaging the composite structure 3′.
The composite structure 3′ may also exhibit very good vertical electrical and thermal conduction between the thin layer 1′ and the carrier substrate 2. This is due to the choice of materials for the thin layer 1′ and the carrier substrate 2 and to the absence of an intermediate bonding layer for joining them.
Of course, the disclosure is not limited to the implementation(s) described, and variations may be made thereto without departing from the scope of the invention as defined by the claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2000140 | Jan 2020 | FR | national |
This application is a national phase entry under 35 U.S.C. § 371 of International Patent Application PCT/FR2020/052439, filed Dec. 15, 2020, designating the United States of America and published as International Patent Publication WO 2021/140285 A1 on Jul. 15, 2021, which claims the benefit under Article 8 of the Patent Cooperation Treaty to French Patent Application Serial No. FR2000140, filed Jan. 9, 2020.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/FR2020/052439 | 12/15/2020 | WO |
