Claims
- 1. A method of manufacturing a heterojunction bipolar transistor, comprising the steps of:
- fabricating an epitaxial base layer doped with carbon and beryllium by a metalorganic molecular-beam-epitaxy, said base layer comprising a mixed crystal including at least InAs doped with said carbon and beryllium generated from an organic metal as p-type impurities; and
- continuously decreasing a composition of said at least InAs of the base layer from an interface of the base layer with a collector layer to an interface thereof with an emitter layer so as to continuously increase a bandgap of the mixed crystal composing the base layer from the interface thereof with the collector layer to the interface thereof with the emitter layer so as to continuously increase a carbon concentration in the base layer from the interface thereof with the collector layer to the interface thereof with the emitter layer.
Priority Claims (1)
Number |
Date |
Country |
Kind |
4-217641 |
Aug 1992 |
JPX |
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Parent Case Info
This is a divisional of application Ser. No. 08/101,685, filed Aug. 4, 1993, now U.S. Pat. No. 5,371,389.
US Referenced Citations (5)
Foreign Referenced Citations (4)
Number |
Date |
Country |
0366552 |
May 1990 |
EPX |
61-1051 |
Jan 1986 |
JPX |
63-81977 |
Apr 1988 |
JPX |
4-96334 |
Mar 1992 |
JPX |
Non-Patent Literature Citations (3)
Entry |
O. Nakajima et al., "Suppression of Emitter Size Effect on Current Gain in AlGaAs/GaAs HBTs", Japan J. Applied Phys., vol. 24, No. 10, pp. 1368-1369 1985). |
S. Nozaki et al., "GaAs Pseudo-Heterojunction Bipolar Transistor with a Heavily Carbon-Doped Base", Extended Abstracts of the 1991 International Conference on Solid State Devices and Materials, pp. 356-358. |
R. People et al., "Calculation of critical layer thickness versus lattice mismatch for Ge.sub.x SI.sub.1-x Si strained-layer heterostructures", Appl. Phys. Lett. vol. 47, No. 3 (1985); Erratum Appl. Phys. Lett. vol. 49, No. 4 (1986). |
Divisions (1)
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Number |
Date |
Country |
Parent |
101685 |
Aug 1993 |
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