Method of manufacturing chip resistors

Information

  • Patent Application
  • 20070197001
  • Publication Number
    20070197001
  • Date Filed
    December 21, 2006
    18 years ago
  • Date Published
    August 23, 2007
    17 years ago
Abstract
A method of manufacturing chip resistors has steps of cutting grooves on a substrate, forming through holes, defining chip regions, forming main electrodes, forming resistor layers, forming primary protective layers, dividing the substrate into multiple strips, forming inner electrodes, cutting the strips into multiple chip resistor units and plating outer electrodes. The step of cutting grooves on a substrate includes forming multiple grooves parallel to each other on a substrate. The step of forming through holes includes forming multiple through holes between and across each two adjacent grooves on the substrate, and each through hole has smooth inner walls. The step of dividing the substrate into multiple strips includes cutting the substrate along and perpendicular to the through holes. The step of cutting the strips into multiple chip resistor units includes cutting the strips along the grooves into multiple chip resistor units.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is operational views of a method of manufacturing chip resistors in accordance with the present invention;



FIG. 2 is a cross sectional side view of a chip resistor manufactured by the method in FIG. 1;



FIG. 3 is operational views of a conventional method of manufacturing chip resistors; and



FIG. 4 is a cross sectional side view of a chip resistor manufactured by the conventional method in FIG. 3 without the inner and outer electrodes.


Claims
  • 1. A method of manufacturing chip resistors comprising steps of: cutting grooves on a substrate comprising forming multiple grooves parallel to each other on a substrate having a top surface and a bottom surface;forming through holes comprising forming multiple through holes through the substrate between and across each two adjacent grooves on the substrate, and each through hole being separated from other through holes and having smooth inner walls;defining chip regions comprising defining multiple chip regions, and each chip region being between adjacent through holes and being arranged in a matrix;forming main electrodes comprising forming multiple main electrodes respectively on the top and bottom surfaces of the substrate on the chip regions in pairs and respectively on the edges of the through holes;forming resistor layers comprising forming resistor layers on each chip region electronically connected to the main electrodes and entirely covering the exposed part of the chip region, and each resistor layer has a resistance;forming primary protective layers comprising forming multiple primary protective layers respectively on the chip regions to entirely cover the resistor layers;dividing the substrate into multiple strips comprising cutting the substrate along and, perpendicular to the through holes to divide the substrate into multiple strips, and each strip having two cut edges opposite to each other;forming inner electrodes comprising plating multiple inner electrodes respectively on the cut edges of each strip electronically connected to the main electrodes on the top and bottom surfaces of the substrate;cutting the strips into multiple chip resistor units comprising cutting the strips along the grooves into multiple chip resistor units; andplating outer electrodes comprising plating outer electrodes respectively on the inner electrodes.
  • 2. The method as claimed in claim 1, wherein after the step of forming primary protective layers the method further comprises steps of adjusting resistance comprising carving the primary protective layers and resistor layers with a laser beam to adjust resistance of the resistor layers; andforming second protective layers comprising forming multiple second protective layers respectively on and entirely covering the primary protective layers to protect the resistor layers.
  • 3. The method as claimed in claim 1, wherein each substrate has a thickness; andeach groove has a depth being not deeper than half the thickness of the substrate.
  • 4. The method as claimed in claim 1, wherein the steps of forming main electrodes, forming resistor layers and forming primary protective layers are performed by printing and firing processes.
  • 5. The method as claimed in claim 1, wherein the step of forming inner electrodes is performed by vacuum sputtering.
  • 6. The method as claimed in claim 1, wherein the step of forming inner electrodes is performed by vapor deposition.
  • 7. The method as claimed in claim 1, wherein the steps of dividing the substrate into multiple strips and cutting the strips into multiple chip resistor units are performed by a laser beam.
  • 8. The method as claimed in claim 1, wherein the steps of dividing the substrate into multiple strips and cutting the strips into multiple chip resistor units are performed by a mechanical cutter.
  • 9. The method as claimed in claim 1, wherein the steps of dividing the substrate into multiple strips and cutting the strips into multiple chip resistor units are performed by a rotating blade.
  • 10. The method as claimed in claim 1, wherein the step of plating outer electrodes is performed by barrel plating.
  • 11. The method as claimed in claim 2, wherein each substrate has a thickness; andeach groove has a depth being not deeper than half the thickness of the substrate.
  • 12. The method as claimed in claim 2, wherein the steps of forming main electrodes, forming resistor layers, forming primary protective layers and forming second protective layers are performed by printing and firing processes.
  • 13. The method as claimed in claim 2, wherein the step of forming inner electrodes is performed by vacuum sputtering.
  • 14. The method as claimed in claim 2, wherein the step of f,ring inner electrodes is performed by vapor deposition.
  • 15. The method as claimed in claim 2, wherein the steps of dividing the substrate into multiple strips and cutting the strips into multiple chip resistor units are performed by a laser beam.
  • 16. The method as claimed in claim 2, wherein the steps of dividing the substrate into multiple strips and cutting the strips into multiple chip resistor units are performed by a mechanical cutter.
  • 17. The method as claimed in claim 2, wherein the steps of dividing the substrate into multiple strips and cutting the strips into multiple chip resistor units are performed by a rotating blade.
  • 18. The method as claimed in claim 2, wherein the step of plating outer electrodes is performed by barrel plating.
Priority Claims (1)
Number Date Country Kind
095105895 Feb 2006 TW national