1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device capable of realizing a high-frequency semiconductor.
2. Background Art
In order to realize a high-frequency semiconductor device, it is the most effective means that a gate length is shortened and a cutoff frequency is raised. However, in the current EB (electron beam) exposure technique, there is a limit to shorten a gate length, and it is difficult to manufacture a gate electrode having a gate length being about 0.1 μm long.
Therefore, in the conventional MESFET (Metal Semiconductor Field Effect Transistor) and HEMT (High Electron Mobility Transistor), it has been difficult to obtain a high frequency over 100 GHz.
Meanwhile, a method, wherein a gate length is shortened by diagonally forming a gate electrode is suggested (for example, refer to Japanese Unexamined Patent Application Publication No. H05-129343, Japanese Unexamined Patent Application Publication No. H11-111733, and Japanese Unexamined Patent Application Publication No. H05-144847).
However, in the conventional methods of manufacturing a semiconductor device, there is a problem that a step of manufacturing a semiconductor device becomes complicated since a gate electrode is diagonally formed.
The invention is intended to resolve the foregoing problems. It is an object of the invention to obtain a method of manufacturing a semiconductor device capable of shortening a gate length by diagonally tilting a gate electrode by a simple method.
According to one aspect of the present invention, a method of manufacturing a semiconductor device includes the step of forming a gate electrode on a semiconductor substrate, the step of forming a resist on the semiconductor substrate so that the resist contacts only one side face of the gate electrode, and the step of tilting the gate electrode by shrinking or expanding the resist.
According to the invention, it is possible to shorten a gate length by diagonally tilting a gate electrode by a simple method. Further, along with the foregoing, a cutoff frequency can be raised, and a high-frequency semiconductor can be realized.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
Descriptions will be hereinafter given of a method of manufacturing a semiconductor device according to a first embodiment of the invention with reference to
First, as shown in
Next, as shown in
Next, as shown in
Next, the gate electrode 15 is tilted by shrinking the resist 16 as shown in
As described above, a gate length can be shortened by diagonally tilting the gate electrode by the simple method. Further, along with the foregoing, a cutoff frequency can be raised, and a high-frequency semiconductor device can be realized.
In the foregoing first embodiment, descriptions have been given of the case wherein a cross section shape of the gate electrode is Γ. However, a cross section shape of the gate electrode is not limited to the foregoing shape. An ordinary rectangle shape can provide similar effects. However, it is more effective when the cross section shape of the gate electrode is Γ, since the resist gets in below the gate electrode, and therefore, shrinkage or expansion force is easily applied.
In the first embodiment, the cross section shape of the gate electrode is Γ. Meanwhile, in a second embodiment, a gate electrode 17 having a T-shape cross section as shown in
In the third embodiment, a drain electrode 19 and a source electrode 20 are provided on the semiconductor substrate 11, and the gate electrode 15 is tilted to the source side. Thereby, without shifting an exposure position of the gate electrode 15 to the source side, a distance between the drain electrode 19 and the gate electrode 15 can be lengthened. Therefore, it is possible to reduce a capacity Cgd between the gate and the drain, and increase a withstand pressure Vgdo between the gate and the drain. Thereby, not only a high-frequency semiconductor device can be realized, but also a high-gain and high-withstanding pressure semiconductor device can be realized.
In a fourth embodiment, as shown in
In particular, by turning a recess well of the gate electrode 15 upward, it becomes easy that only the recess well is coated with the resist 16, or the resist 16 remains only in the recess well.
In a fifth embodiment, as shown in
Thereby, bond strength of the tilted gate electrode can be improved. Further, by coating with the resist material, the passivation film can be uniformly formed. Coverage becomes thereby improved, and therefore, damages due to degasification from the outside and moisture are hardly caused, and moisture resistance and reliability can be improved.
Structures of the resist material and the passivation film can be applied to semiconductor devices of ordinary gate electrodes other than the tilted gate electrode.
In a sixth embodiment, as shown in
As described above, also in the case of applying the invention to the dual gate, similar effects can be obtained. Further, by adopting the dual gate, available drain current is increased. Therefore, a high-gain device can be realized.
In the foregoing first to sixth embodiments, the gate electrode is tilted by shrinking or expanding the resist. Meanwhile, in the seventh embodiment, as shown in
Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.
The entire disclosure of a Japanese Patent Application No. 2004-183848, filed on Jun. 22, 2004 including specification, claims, drawings and summary, on which the Convention priority of the present application is based, are incorporated herein by reference in its entirety.
Number | Date | Country | Kind |
---|---|---|---|
2004-183848 | Jun 2004 | JP | national |