This application claims the priority benefit of Italian Application for Patent No. 102021000021122, filed on Aug. 4, 2021, the content of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law.
The description relates to semiconductor devices.
One or more embodiments can be applied to semiconductor power devices for the automotive sector, for instance.
A well-controlled creepage distance is a desirable feature in high-voltage semiconductor device packages. The creepage distance denotes the shortest path between two conductive materials measured over the surface of an isolator arranged in between. An adequate creepage distance facilitates achieving isolation between two materials at different voltage and “pollution” levels. Specifications such as IEC CEI 60664-1 apply in that area.
An increased creepage distance in a semiconductor device package is advantageous in high-voltage applications: for instance, a small outline (SO) narrow package option (150 mils body) can be used in the place of a SO wide option (300 mils body) for a same application.
Package singulation is the final step in various manufacturing processes of semiconductor devices where plural semiconductor devices are manufactured simultaneously starting from a same leadframe and individual packages are finally separated from the leadframe with a cutting (shear) operation that severs sacrificial tie bars between the packages.
During package singulation, such tie bars tend to crack the molding compound around them. Also, remainders of the tie bars left exposed at the package surface have a negative effect on the creepage distance.
There is accordingly a need in the art to contribute to overcoming the drawbacks outlined in the foregoing.
One or more embodiments relate to a method.
One or more embodiments relate to a corresponding semiconductor device.
One of more embodiments provide a semiconductor device package that can be regarded as a “tie bar-less” package involving a slight redesign of leadframe without appreciable changes in the assembly flow.
One or more embodiments may involve using a specific tool to extract from the device packages those parts of the leadframe that are used to keep the semiconductor packages connected in a chain until the final singulation step (which step can be performed when the leads are already separated from the leadframe and formed).
One or more embodiments facilitate achieving a desired isolation (creepage distance) between two conductive materials, even in adverse environmental conditions such as high humidity and high pollution.
One or more embodiments facilitate reducing area consumption and achieving cost savings.
Semiconductor devices produced according to embodiments of the present description are exempt from package resin damage as possibly caused by dummy tie bars in conventional solutions.
Improved creepage distance can be likewise achieved by avoiding remainders of dummy tie bars left exposed at the package surface.
One or more embodiments will now be described, by way of example only, with reference to the annexed figures, wherein:
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated.
The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.
The edges of features drawn in the figures do not necessarily indicate the termination of the extent of the feature.
In the ensuing description, various specific details are illustrated in order to provide an in-depth understanding of various examples of embodiments according to the description. The embodiments may be obtained without one or more of the specific details, or with other methods, components, materials, etc. In other cases, known structures, materials, or operations are not illustrated or described in detail so that various aspects of the embodiments will not be obscured.
Reference to “an embodiment” or “one embodiment” in the framework of the present description is intended to indicate that a particular configuration, structure, or characteristic described in relation to the embodiment is comprised in at least one embodiment. Hence, phrases such as “in an embodiment”, “in one embodiment”, or the like, that may be present in various points of the present description do not necessarily refer exactly to one and the same embodiment. Furthermore, particular configurations, structures, or characteristics may be combined in any adequate way in one or more embodiments.
The headings/references used herein are provided merely for convenience and hence do not define the extent of protection or the scope of the embodiments.
As illustrated in
The designation “leadframe” (or “lead frame”) is currently used (see, for instance the USPC Consolidated Glossary of the United States Patent and Trademark Office) to indicate a metal frame that provides support for an integrated circuit chip or die (these terms are used herein as synonyms) as well as electrical leads to interconnect the integrated circuit in the die or chip to other electrical components or contacts.
Leadframes are conventionally created using technologies such as a photo-etching technology. With this technology, metal (e.g., copper) material in the form of a foil or tape is etched on the top and bottom sides to create various pads and leads.
As illustrated, the leadframe strip 12 includes leads 12A intended to provide connection pins for the individual devices 10 as well as so-called tie-bars 12B that connect adjacent semiconductor devices 10 in the chain.
Singulation, as illustrated in
More in detail,
In
The sequence of
As highlighted in
In
As exemplified in the sequence of
In conventional solutions as illustrated in
By way of contrast, the tie bars 12B of
Examples as discussed herein take advantage of the fact that plurality of semiconductor devices 10 manufactured simultaneously (as otherwise conventional in the art) can be coupled in a chain extending in a longitudinal direction and sharing a common substrate such a leadframe strip 12.
Deformable tie bars 12B as discussed herein can thus be provided as deformable portions 1202 of such a common substrate 12.
In a first possible embodiment as exemplified in
As illustrated, the struts 1202 may comprise (optionally at the side thereof facing away from the respective device end side) an engagement portion 1204. As illustrated, such an engagement portion includes a (through) hole 1204 formed in an extension of the strut 1202. As illustrated in
As a result of penetrating into the holes 1204, the pins SP cause the struts 1202 (and the pointed pins 1200 carried thereby) to laterally move away from the package of device 10 into which the pins 1200 penetrate(d) to maintain the devices 10 coupled in a chain during the manufacturing steps prior to singulation.
In response to deformation of the struts 1202, the pins 1200 are extracted from the device packages, thus releasing the devices 10 from the tie bars 12B.
For instance, the pins SP can be arranged in a pair and be provided with conical distal tips. The conical tips of the pins in the pair have respective axes (of the conical tips) located a mutual distance that is larger than the distance between the axes of the holes 1204 provided in pair of tie bars 12B located at opposite sides of a same device 10 in the condition where the pins 1200 still penetrate in the semiconductor device packages (that is, with the tie bars 12B still undeformed).
As a result of the distance between the axes of the (conical tips of the) pins being slightly larger than the distance between the axes of the holes 1204—in the condition where the pins 1200 still penetrate the device packages—the advance movement of the pins SP into the holes 1204 (downwards in
This basic principle underlies both the implementation exemplified in
Specifically, the arrows in
That is, in examples as illustrated herein, engagement formations are provided in the form of holes 1024 formed in the tie bars 12B and a deformation tool SP of the tie bars 12B used for singulation comprises conical pins that are inserted off-center into these holes 1024 and advanced therein.
Advancing the conical pins SP into the holes 1024 (downwards as illustrated in
It will be otherwise appreciated that a similar result can be obtained with a singulation tool including a pair of pins SP (not necessarily having a conical shape) that are inserted into the holes 1204 and then the pins are laterally moved away from each other as indicated by the double-pointed horizontal arrows shown in
The implementation of
In the implementation illustrated in
In the implementation illustrated in
The implementation illustrated in
Examples as illustrated herein take advantage of the possibility of forming the “operative” leads 12A in the leadframe strip 12 at the opposed longitudinal sides of the devices 10. This facilitates providing corresponding arrays of contact pins in the final package so that the two other “transversal” end sides of each device 10 can be left available for the provision of deformable tie bars 12B as discussed herein.
Examples as illustrated herein facilitate manufacturing semiconductor devices 10 where the transversal end sides are exempt from the presence of pins and, more to the point, from the presence of remainders of sacrificial (dummy) tie bars. This is beneficial in increasing the creepage distance.
Also, in so far as releasing the semiconductor devices 10 from the tie bars 12B does not involve severing the tie bars (as is the case of conventional solutions as depicted in
Individual semiconductor devices 10 can thus be produced comprising an (essentially rectangular of square) insulating package with a first pair of opposed longitudinal sides and a second pair of opposed end sides transverse the opposed longitudinal sides in the first pair.
Respective, electrically conductive contact pin arrays such as 12A can thus be left exposed at the first pair of opposed longitudinal sides while the second pair of opposed end sides comprise recesses punctured therein (where the pins 1200 initially penetrated into the device package). These end sides are thus exempt from electrically conductive formations.
Without prejudice to the underlying principles, the details and embodiments may vary, even significantly, with respect to what has been described in the foregoing, by way of example only, without departing from the extent of protection.
The claims are an integral part of the technical teaching on the embodiments as provided herein. The extent of protection is determined by the annexed claims.
Number | Date | Country | Kind |
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102021000021122 | Aug 2021 | IT | national |