The present invention relates to the field of capacitive sensors, and more particularly to methods and integrated systems for reading a plurality of capacitors of a capacitive sensor including an array of capacitors.
Capacitive sensors are largely used as contact or pressure sensors. According to a particular embodiment, they may comprise an array of capacitors ordered in rows and columns connected through row and column lines (or plates), as schematically depicted in
The pressure field on the sensing surface may be easily displayed by a gray scale image, in which the luminance of each pixel is a function of the measured capacitance of a corresponding capacitor of the array.
Several problems have so far prevented realization of relatively low cost systems for reading such capacitive pressure sensors with good precision and with a great flexibility of use such to make them usable in particularly demanding applications. The precision of the sensing (reading) system of these sensors is negatively affected by the fact that the reading of the capacitance of a capacitor of the array is disturbed by the presence of the other capacitors and by parasitic capacitances between adjacent rows and columns. The capacitances affecting the reading of a single capacitor may add up to be 2 or 3 orders of magnitude greater than the capacitance of the selected capacitor being read to be detected. Moreover, a truly multipurpose system suitable to be used in many types of applications should work properly even if it is necessary to vary from time to time the number of addressable rows and columns of the array, depending on the particular application.
It is an object of the present invention to provide a method and a system for reading a capacitive sensor that overcomes the above mentioned problems. The system of the invention can be realized in monolithic form and at a relatively low cost and may be used with sensors of different numbers of rows and columns.
More precisely the invention includes a method for reading a capacitive sensor formed by an array of capacitors ordered in rows and columns functionally connected through row lines, each one electrically constituting a first plate in common to all the capacitors of a row, and through column lines, each one electrically constituting a second plate in common to all the capacitors of a column; the two sets of plates being orthogonal or quasi-orthogonal to each other. The method of the invention may be implemented by a circuit for biasing and reading capacitances that includes circuits for selecting a column line and a row line, and a charge amplifier producing an output voltage representing the capacitance of the selected capacitor intercepted by the selected column and row lines.
The method includes preliminarily resetting the output voltage of the charge amplifier, connecting to a reference voltage all the deselected row and column plates of the array and connecting an auxiliary capacitor and the selected capacitor to an inverting input of the amplifier and as feedback capacitor of the amplifier, respectively, or vice versa, and applying a step voltage on the capacitor that is connected to the inverting input of the amplifier and reading the output voltage at steady-state.
The reading method of the invention contemplates the scanning of all the capacitors of the array, to obtain as many values of capacitances. This “array” of values may be periodically updated at a certain “frame frequency”, to display the way the distribution map of the pressure on the sensor area evolves in time.
The integrated reading system for a capacitive sensor of the invention comprises an input interface circuit connected to the capacitive sensor, forcing to a reference potential all deselected row plates and the column plates of the array and coupling to a biasing and reading circuit of the system the selected capacitor intercepted by the selected row and the selected column. The system also includes a biasing and reading circuit, producing an output voltage representative of the capacitance of the selected capacitor coupled thereto; an analog-to-digital converter in cascade of the biasing and reading circuit converting the representative voltage in a corresponding bit vector; a microprocessor unit controlling the functioning of the system; and an output interface circuit functionally coupled to the microprocessor unit, outputting the read values of capacitance.
The different aspects and advantages of the invention will become even more evident through the following detailed description of several embodiments and by referring to the attached drawings, wherein:
A preferred embodiment of the system of the invention, that may be readily integrated, is depicted in
The processing and control function are executed via an internal bus I
The actual connections of input interface block are stage is depicted in a greater detail in
Two alternative embodiments of the system of the invention are exemplified in
According to the embodiment depicted in
The method of reading the capacitance of CPIX includes:
In this way, the voltage Vo is subject to a variation ΔVO proportional to the variation ΔVI of the voltage VI, according to the following formula:
The charge injection into the feedback capacitor CR, by the neighboring capacitors of the selected capacitor and by the parasitic capacitances CCOL and CROW, is effectively nullified because all deselected rows and columns are grounded.
According to an alternative embodiment, depicted in
that is the output voltage presents a variation that, differently from the first embodiment, is inversely proportional to the selected capacitance CPIX.
The two alternative configurations of
To make the input interface A
A monolithically integrated system of the invention with such a modular input interface circuit, may be used with capacitive sensors having any number of rows and columns of capacitors, provided that the sum of the number of rows and columns does not exceed the number of input channels (modules) of the input interface. In the case the modules of the input interface of the device are more numerous than the sum of rows and columns of the array of capacitors of the sensor to be used, the redundant connection circuits that are not used for coupling a respective row or column connect the respective pin of the device to a reference potential, as if they were connected to deselected rows or columns, without affecting the normal functioning of the integrated system.
Naturally, the method of the invention can be implemented by sequentially scanning the capacitors of the array for producing an array of values representing the map distribution of the quantity (pressure) detected by the capacitive sensor. Such a sequential scan may be repeated with a desired frequency (“frame frequency”) for continuously refreshing the image of the distribution map of the pressure on the sensing area of the sensor.
Each frame of values so produced may be subjected by the microprocessor unit to noise filtering and to appropriate real-time correction processes such as the “gamma correction” and the “fixed pattern noise cancellation”, before being output through a conventional digital output interface
Number | Date | Country | Kind |
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00830780 | Nov 2000 | EP | regional |
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20020122131 A1 | Sep 2002 | US |