Claims
- 1. A method of forming an electronic device having a conducting line, said method comprising:a) providing a semiconductor substrate with a plurality of semiconductor devices and at least one isolation structure, said plurality of semiconductor devices each having a gate and a source; b) forming a nitride film over said isolation structure; c) etching a portion of said nitride film and a portion of said isolation structure thereby exposing a region of said semiconductor substrate beneath said isolation structure and forming a nitride sidewall film on an exposed side surface of said source; and d) forming a silicide on said region of said semiconductor substrate beneath said isolation structure.
- 2. The method of claim 1, wherein said isolation structure is shallow trench isolation or LOCOS.
- 3. The method of claim 1, wherein said plurality of semiconductor devices comprises FLASH memory cells.
- 4. The method of claim 1, wherein said silicide is formed with a metal from the group consisting of titanium, tungsten, molybdenum, cobalt, nickel, platinum, and palladium.
- 5. A method of forming an integrated circuit memory, said method comprising:a) providing a semiconductor substrate with a plurality of FLASH memory cells, each FLASH memory cell having a gate structure with a top surface and a side surface adjacent a source, said FLASH memory cells being adjacent to a plurality of isolation structures; b) forming a nitride film on said isolation structures; c) etching said nitride film forming a nitride sidewall film on said side surface adjacent a source on a plurality of FLASH memory cells; d) etching said isolation structures to form a source line by exposing a plurality of regions of said semiconductor substrate beneath said isolation structures; e) implanting said source line with a dopant species; and f) forming a silicide on said source line.
- 6. The method of claim 5, wherein said isolation structures are formed using shallow trench isolation or LOCOS.
- 7. The method of claim 5, wherein said silicide is formed with a metal from the group consisting of titanium, tungsten, molybdenum, cobalt, nickel, platinum, and palladium.
- 8. A method of forming a conductive line, comprising the steps of:a) forming an isolation structure in a semiconductor body; b) etching a trench through said isolation structure to expose a semiconductor region of said semiconductor body below said isolation structure; c) forming a sidewall film on at least one sidewall of said trench; and d) forming a silicide on said exposed semiconductor region to form said conductive line.
- 9. The method of claim 8 wherein said isolation structure is LOCOS.
- 10. The method of claim 8 wherein said isolation structure is STI.
- 11. The method of claim 8 wherein said semiconductor body further comprises at least one semiconductor device.
- 12. The method of claim 11 wherein said semiconductor device is a FLASH memory device.
- 13. The method of claim 8 wherein said sidewall film is a film from the group consisting of silicon nitride, silicon oxynitride, and a polymer.
- 14. The method of claim 8 wherein said silicide is formed with a metal from the group consisting of titanium, tungsten, molybdenum, cobalt, nickel, platinum, and palladium.
CROSS-REFERENCE TO RELATED PATENT/PATENT APPLICATIONS
The following commonly assigned patent/patent applications are hereby incorporated herein by reference:
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