Claims
- 1. A test system, comprising:
a tester configured to test a component and generate test data; and an outlier identification element configured to receive the test data and identify an outlier in the test data.
- 2. A test system according to claim 1, wherein the outlier identification element is configured to operate in conjunction with a set of configuration data in a recipe file.
- 3. A test system according to claim 1, wherein the test data corresponds to a section group of components on a wafer.
- 4. A test system according to claim 1, wherein the outlier identification element is configured to automatically calibrate a sensitivity of the outlier identification element to the test data.
- 5. A test system according to claim 1, further comprising a data correlation element configured to correlate the test data.
- 6. A test system according to claim 1, wherein the outlier identification element is configured to identify the outlier at run time.
- 7. A test system according to claim 1, further comprising a data smoothing element configured to receive the test data and smooth the test data, and wherein the outlier identification element is configured to receive the smoothed test data and identify the outlier in the smoothed test data.
- 8. A data analysis system for semiconductor test data, comprising:
a supplementary data analysis element configured to identify outliers in the test data; and an output element configured to generate an output report including the identified outliers.
- 9. A data analysis system according to claim 8, wherein the supplementary data analysis element is configured to operate in conjunction with a set of configuration data in a recipe file.
- 10. A data analysis system according to claim 8, wherein the test data corresponds to a section group of components on a wafer.
- 11. A data analysis system according to claim 8, wherein the supplementary data analysis element is configured to automatically calibrate a sensitivity of the outlier identification element to the test data.
- 12. A data analysis system according to claim 8, wherein the supplementary data analysis element includes a data correlation element configured to correlate the test data.
- 13. A data analysis system according to claim 8, wherein the supplementary data analysis element is configured to identify the outliers at run time.
- 14. A data analysis system according to claim 8, wherein the supplementary data analysis element includes a data smoothing element configured to receive the test data and smooth the test data, and wherein the supplementary data analysis element is configured to identify the outliers in the smoothed test data.
- 15. A method for testing semiconductors, comprising:
generating test data for multiple components; and identifying an outlier in the test data at run time.
- 16. A method according to claim 15, further comprising reading configuration data from a recipe file, wherein identifying the outlier includes identifying the outlier according to the configuration data in the recipe file.
- 17. A method according to claim 15, wherein the test data corresponds to a section group of components on a wafer.
- 18. A method according to claim 15, further comprising calibrating a sensitivity for identifying the outlier in the test data.
- 19. A method according to claim 15, further comprising smoothing the test data.
- 20. A method according to claim 15, further comprising correlating the test data to identify similarities in the test data.
CROSS-REFERENCES TO RELATED APPLICATIONS
[0001] This application is a continuation-in-part of U.S. patent application Ser. No. 09/872,195, filed on May 31, 2001, entitled METHODS AND APPARATUS FOR DATA SMOOTHING, and claims the benefit of U.S. Provisional Patent Application No. 60/293,577, filed May 24, 2001, entitled METHODS AND APPARATUS FOR DATA SMOOTHING; U.S. Provisional Patent Application No. 60/295,188, filed May 31, 2001, entitled METHODS AND APPARATUS FOR TEST DATA CONTROL AND ANALYSIS; and U.S. Provisional Patent Application No. 60/374,328, filed Apr. 21, 2002, entitled METHODS AND APPARATUS FOR TEST PROGRAM ANALYSIS AND ENHANCEMENT; and
[0002] incorporates the disclosure of each application by reference. To the extent that the present disclosure conflicts with any referenced application, however, the present disclosure is to be given priority.
Provisional Applications (3)
|
Number |
Date |
Country |
|
60293577 |
May 2001 |
US |
|
60295188 |
May 2001 |
US |
|
60374328 |
Apr 2002 |
US |
Continuation in Parts (1)
|
Number |
Date |
Country |
| Parent |
09872195 |
May 2001 |
US |
| Child |
10154627 |
May 2002 |
US |