Claims
- 1. A method for controlling bow in wafers which utilize doped layers, said method comprising:
depositing a silicon-germanium layer onto a substrate; depositing an undoped buffer layer onto the silicon-germanium layer; and depositing a boron doped layer onto the undoped layer.
- 2. A method according to claim 1 further comprising applying the silicon-germanium layer at a temperature of about 600 degrees C. to about 1000 degrees C.
- 3. A method according to claim 1 wherein depositing a silicon-germanium layer comprises depositing a silicon-germanium layer with a thickness between about 0.1 to about 5.0 micrometers.
- 4. A method according to claim 1 wherein depositing an undoped buffer layer comprises depositing an undoped buffer layer with a thickness between about 0.1 to about 5.0 micrometers.
- 5. A method according to claim 1 wherein depositing a boron doped layer comprises depositing a silicon-boron layer with a thickness between about 5.0 and about 50.0 micrometers.
- 6. A method according to claim 1 wherein a concentration of germanium in the silicon-germanium layer is between about 2.0 percent and about 50.0 percent.
- 7. A method according to claim 1 wherein a concentration of boron in the boron doped layer is between about 5×1019 and about 5×1020 cm−3.
- 8. A wafer comprising:
a substrate layer; a silicon-germanium layer deposited onto said substrate layer; an undoped buffer layer deposited onto said silicon-germanium layer; and a boron doped silicon layer deposited onto said undoped buffer layer.
- 9. A wafer according to claim 8 wherein said silicon-germanium layer has a thickness between about 0.1 and about 5.0 micrometers.
- 10. A wafer according to claim 8 wherein said undoped buffer layer has a thickness between about 0.1 and about 5.0 micrometers.
- 11. A wafer according to claim 8 wherein said silicon-boron layer has a thickness between about 5.0 and about 50.0 micrometers.
- 12. A wafer according to claim 8 wherein a concentration of germanium in said silicon-germanium layer is between about 2.0 percent and about 20.0 percent.
- 13. A wafer according to claim 8 wherein a concentration of boron in said silicon-boron layer is between about 5×1019 and about 5×1020 cm−3.
- 14. A micro-electromechanical system (MEMS) comprising:
a housing; a micro-machine coupled to said housing, at least a portion of said micro-machine comprising boron-doped silicon that has been etched from a wafer which comprises a substrate layer, a silicon-germanium layer deposited onto said substrate layer, an undoped buffer layer deposited onto said silicon-germanium layer, and a silicon-boron layer deposited onto said undoped buffer layer.
- 15. A MEMS according, to claim 14 wherein boron-doped silicon comprises proof masses, motor drive combs, and motor pick-off combs for a tuning fork gyroscope.
- 16. A MEMS according to claim 14 wherein a concentration of boron in said silicon-boron layer is between about 0.1 percent and about 1.0 percent.
- 17. A MEMS according to claim 14 wherein said silicon-boron layer has a thickness between about 5.0 and about 50.0 micrometers.
- 18. A MEMS according to claim 14 wherein said micro-machine comprises one or more of an accelerometer, a resonator, a pressure sensor, a temperature sensor and an air flow sensor.
- 19. A gyroscope comprising:
at least one proof mass; at least one motor drive comb; at least one motor pick-off comb; said proof masses, said motor drive combs, and said motor pick-off combs comprising boron-doped silicon that has been etched from a wafer which comprises a substrate layer, a silicon-germanium layer deposited onto said substrate layer, an undoped buffer layer deposited onto said silicon-germanium layer, and a silicon-boron layer deposited onto said undoped buffer layer.
- 20. A method for reducing and controlling bow in wafers which are formed from stacked and doped silicon layers comprising creating stress-relieving dislocations within the stacked silicon layers.
- 21. A method according to claim 20 wherein creating stress-relieving dislocations within the stacked layers comprises spatially separating doped layers with a silicon-germanium alloy.
- 22. A method according to claim 20 wherein creating stress-relieving dislocations within the stacked layers comprises spatially separating a silicon-germanium layer and a silicon-boron layer with an undoped silicon layer.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH & DEVELOPMENT
[0001] The United States Government has acquired certain rights in this invention pursuant to Contract No. F33615-01-02-5705 issued by the Department of the Air Force.