Patent Application
20230420466
This disclosure is related to infrared (IR) focal plane arrays (FPAs), to methods for operation thereof, and especially to short wave IR (SWIR) FPAs which include germanium on silicon.
Photodetecting devices such as photodetector arrays or “PDAs” (also referred to as “photosensor arrays”) include a multitude of photosites, each photosite including one or more photodiodes for detecting impinging light and capacitance for storing charge provided by the photodiode. Hereinbelow, “photosite” is often replaced with the acronym “PS”. The capacitance may be implemented as a dedicated capacitor and/or using parasitic capacitance of the photodiode, transistors, and/or other components of the PS. Henceforth in this description and for simplicity, the term “photodetecting device” is often replaced with the acronym “PDD”, the term “photodetector array” is often replaced with the acronym “PDA”, and the term “photodiode” is often replaced with the acronym “PD”.
The term “photosite” pertains to a single sensor element of an array of sensors (also referred to “sensel”, as in a portmanteau of the words “sensor” and “cell” or “sensor” and “element”), and is also referred to as “sensor element”, “photosensor element”, “photodetector element”, and so on. Each PS may include one or more PDs (e.g., if color filter array is implemented, PDs which detect light of different parts of the spectrum may optionally be collectively referred to as single PS). The PS may also include some circuitry or additional components in addition to the PD.
Dark current is a well-known phenomenon, and when referring to PDs it pertains to an electric current that flows through the PD even when no photons are entering the device. Dark current in PDs may result from random generation of electrons and holes within a depletion region of the PD.
In some cases, there is a need to provide PSs with photodiodes characterized by a relatively high dark current, while implementing capacitors of limited size. In some cases, there is a need to provide PSs with PDs characterized by a relatively high dark current while reducing effects of the dark current on an output detection signal. In PSs characterized by high dark current accumulation, there is a need for, and it would be advantageous to overcome detrimental effects of dark current on electrooptical systems. Henceforth and for simplicity, the term “electrooptical” may be replaced with the acronym “EO”.
Short-wave infrared (SWIR) imaging enables a range of applications that are difficult to perform using imaging of visible light. Applications include electronic board inspection, solar cell inspection, produce inspection, gated imaging, identifying and sorting, surveillance, anti-counterfeiting, process quality control, and much more. Many existing InGaAs-based SWIR imaging systems are expensive to fabricate, and currently suffer from limited manufacturing capacity.
It would therefore be advantageous to be able to provide SWIR imaging systems using more cost-effective photoreceivers based on PDs that are more easily integrated into the surrounding electronics.
Photodetector arrays which include a plurality of PSs, each being sensitive to a part of the electromagnetic spectrum are known in the art. However, these PDAs are either expensive, insensitive in ranges of interest of the electromagnetic spectrum, and/or inefficient in distance analysis. There is therefore a need in the art for improved PSs and PDAs. Further limitations and disadvantages of conventional, traditional, and proposed approaches will become apparent to one of skill in the art, through comparison of such approaches with the subject matter of the present application as set forth in the remainder of the present application with reference to the drawings.
In some aspects, there is disclosed an IR photodetecting system operable to detect IR radiation, comprising: (a) at least one PS that includes (i) a germanium (Ge) photosensitive area operable to generate electron-hole (e-h) pairs in response to impinging IR photons, the Ge photosensitive area including an absorber doped area having a first polarity, and (ii) a silicon (Si) layer including a diode, the diode including a first doped area of the first polarity and a second doped area of a second polarity opposite to the first polarity, wherein the first doped area is located between the second doped area and the absorber doped area; (b) at least one power source, operable to provide a first area voltage to the first doped area and to provide a second area voltage to the second area; and (c) a controllable power source, operable to (i) provide to the Ge photosensitive area, for a sampling duration of the PS an activation voltage which forces charge carriers of the second polarity (CCSP) to move from the Ge photosensitive area toward the photodiode where the CCSP are collected via a readout electrode electrically connected to the second doped area, and (ii) provide to the Ge photosensitive area, upon ending of the sampling duration, a rest voltage which diminishes the forcing of the CCSP toward the photodiode, thereby ceasing the collection of signals by the PS.
In some aspects, there is disclosed an electro-optical (EO) detection system, comprising: (a) an IR photodetecting system or sensor that includes a plurality of PSs; (b) at least one optical interface for directing light from a field of view (FOV) of the electro-optical detection system onto the IR photodetecting sensor; (c) readout circuitry operable to read from each of the plurality of PSs at least one electric signal corresponding to a number of photons captured by the Ge photosensitive area during the sampling duration of the respective PS; and (d) a processor operable to process the detection data provided by the readout circuitry, which is indicative of the plurality of electric signals, in order to provide an IR image of the FOV.
In some aspects, there is disclosed an IR photodetecting system operable to detect IR radiation, comprising: (a) at least one PS that includes: (i) a Ge photosensitive area operable to generate e-h pairs in response to impinging IR photons, the Ge photosensitive area including an absorber doped area having a first polarity, and (ii) a Si layer including a first doped area, a storage well, a floating diffusion, and a transfer gate; (b) at least one controllable power source operable to modulate voltage to at least one of the first doped area, the Ge photosensitive area and the floating diffusion; and (c) a controller operable to control the controllable power source and the transfer gate for, (i) at one time, to provide voltages to the Ge photosensitive area, to the first doped area, and to the floating diffusion, thereby forcing charge carriers of the second polarity to move from the Ge photosensitive area toward the storage well, (ii) at another time, provide other voltages to the Ge photosensitive area, to the first doped area, and to the floating diffusion, thereby diminishing the forcing of the charge carriers of the second polarity toward the storage well, thereby ceasing the collection of signals by the storage well, and (iii) intermittently transferring charge carriers of the second polarity from the storage well via the transfer gate to the floating diffusion, where they are read via a readout electrode electrically connected to the floating diffusion.
In some aspects, there is disclosed an IR photodetecting system operable to detect IR radiation, comprising: (a) at least one PS that includes: (i) a Ge photosensitive area, operable to generate e-h pairs in response to impinging IR photons, the Ge photosensitive area including an absorber doped area doped with a first polarity, and (ii) a silicon layer in which multiple readout structures are implemented, each readout structure including: (1) a remote doped area doped with a second polarity and (2) an intermediary doped area positioned between the remote doped area and the Ge photosensitive area, the intermediary doped area being doped with a second polarity opposite to the first polarity; (b) a controllable power source, operable to provide controlled voltages to the Ge photosensitive area, to the remote doped area and to the intermediary doped area of each of the multiple readout structures, the controllable power source being operable to: (i) maintain, for a first sampling duration, relative voltages on the Ge photosensitive area, a first remote doped area of a first readout structure out of the multiple readout structures, and a first intermediary doped area of the first readout structure, such that the CCSP are forced to move from the Ge photosensitive area toward the first readout structure by a first pulling force, where the CCSP are collected via a first readout electrode electrically connected to the first remote doped area, (ii) maintain, for the first sampling duration, voltages on the doped areas of a first group of readout structures that includes the rest of the multiple readout structures other than the first readout structure, such that a pulling force applied to the CCSP towards each of the remote doped areas of the first group of readout structures is less than half of the first pulling force, (iii) maintain, for a second sampling duration that is later than the first sampling duration, relative voltages on the Ge photosensitive area, a second remote doped area of a second readout structure out of the multiple readout structures, and a second intermediary doped area of the second readout structure, such that the CCSP are forced to move from the Ge photosensitive area toward the second readout structure by a second pulling force, where the CCSP are collected via a second readout electrode electrically connected to the second remote doped area; (iv) maintain, for the second sampling duration, voltages on the doped areas of a second group of readout structures that includes the rest of the multiple readout structures other than the second readout structure, such that a pulling force applied to the CCSP towards each of the remote doped areas of the second group of readout structures is less than half of the second pulling force; (v) maintain, for a third sampling duration that is later than the second sampling duration, relative voltages on the Ge photosensitive area, the first remote doped area, and the first intermediary doped area, such that CCSP are forced to move from the Ge photosensitive area toward the first readout structure by a third pulling force, where the CCSP are collected via the first readout electrode, and (vi) maintain, for the third sampling duration, voltages on the doped areas of the first group of readout structures, such that a pulling force applied to CCSP towards each of the remote doped areas of the first group of readout structures is less than half of the third pulling force.
In some aspects, there is disclosed a method for detecting IR radiation, comprising: (a) providing first area voltage to a first doped area of a PS and providing second area voltage to a second area of the PS which includes (i) a Ge photosensitive area operable to generate e-h pairs in response to impinging IR photons, the Ge photosensitive area including an absorber doped area having a first polarity, and (ii) a Si layer including a diode, the diode including the first doped area of the first polarity and the second doped area of a second polarity opposite to the first polarity; wherein the first doped area is located between the second doped area and the absorber doped area; (b) while providing the first area voltage and the second area voltage, providing to the Ge photosensitive area for a sampling duration of the PS an activation voltage which forces charge carriers of the second polarity to move from the Ge photosensitive area toward the photodiode where the CCSP are collected via a readout electrode electrically connected to the second doped area; and (c) upon ending of the sampling duration, providing to the Ge photosensitive area a rest voltage which diminishes the forcing of the CCSP toward the photodiode, thereby ceasing the collection of signals by the PS.
In some aspects, there is disclosed a method for detecting IR radiation, comprising: modulating voltage to at least one area of a PS (PS) selected from a group consisting of: a first doped area of the PS, a Ge photosensitive area of the PS and a floating diffusion of the PS, wherein the PS includes at least: (a) the Ge photosensitive area that is operable to generate e-h pairs in response to impinging IR photons and which includes an absorber doped area having a first polarity; and (b) a Si layer including the first doped area, a storage well, the floating diffusion, and a transfer gate. The modulating includes: (a) providing voltages to the Ge photosensitive area, to the first doped area, and to the floating diffusion, thereby forcing charge carriers of the second polarity to move from the Ge photosensitive area toward the storage well; (b) at another time, providing other voltages to the Ge photosensitive area, to the first doped area, and to the floating diffusion, thereby diminishing the forcing of the CCSP toward the storage well, thereby ceasing the collection of signals by the storage well; and (c) intermittently transferring charge carriers of the second polarity from the storage well via the transfer gate to the floating diffusion, where they are read via a readout electrode electrically connected to the floating diffusion.
In some aspects, there is disclosed a method for detecting IR radiation, comprising providing controlled voltages to areas of a PS that includes (i) a Ge photosensitive area that is operable to generate e-h pairs in response to impinging IR photons and which includes an absorber doped area doped with a first polarity, and (ii) doped areas of a multiple readout structures implemented on a Si layer of the PS, including, for each of the multiple readout structures, (a) a remote doped area doped with a second polarity and (b) an intermediary doped area positioned between the remote doped area and the Ge photosensitive area, the intermediary doped area being doped with a second polarity opposite to the first polarity. The providing may include: maintaining, for a first sampling duration, relative voltages on the Ge photosensitive area, a first remote doped area of a first readout structure out of the multiple readout structures, and a first intermediary doped area of the first readout structure, such that charge carriers of the second polarity are forced to move from the Ge photosensitive area toward the first readout structure by a first pulling force, where the CCSP are collected via a first readout electrode electrically connected to the first remote doped area; maintaining, for the first sampling duration, voltages on the doped areas of a first group of readout structures that includes the rest of the multiple readout structures other than the first readout structure, such that a pulling force applied to charge carriers of the second polarity towards each of the remote doped areas of the first group of readout structures is less than half of the first pulling force; maintaining, for a second sampling duration that is later than the first sampling duration, relative voltages on the Ge photosensitive area, a second remote doped area of a second readout structure out of the multiple readout structures, and a second intermediary doped area of the second readout structure, such that charge carriers of the second polarity are forced to move from the Ge photosensitive area toward the second readout structure by a second pulling force, where the CCSP are collected via a second readout electrode electrically connected to the second remote doped area; maintaining, for the second sampling duration, voltages on the doped areas of a second group of readout structures that includes the rest of the multiple readout structures other than the second readout structure, such that a pulling force applied to charge carriers of the second polarity towards each of the remote doped areas of the second group of readout structures is less than half of the second pulling force; maintaining, for a third sampling duration that is later than the second sampling duration, relative voltages on the Ge photosensitive area, the first remote doped area, and the first intermediary doped area, such that charge carriers of the second polarity are forced to move from the Ge photosensitive area toward the first readout structure by a third pulling force, where the CCSP are collected via the first readout electrode; and maintaining, for the third sampling duration, voltages on the doped areas of the first group of readout structures, such that a pulling force applied to charge carriers of the second polarity towards each of the remote doped areas of the first group of readout structures is less than half of the third pulling force.
In some aspects, there is disclosed a method for generating a depth image of a scene based on detections of a SWIR electrooptical imaging system (SEI system), comprising: obtaining a plurality of detection signals of the SEI system each detection signal indicative of amount of light captured by at least one focal plane array detector (FPA) of the SEI system from a specific direction within a FOV of the SEI system over a respective detection time frame, the at least one FPA including a plurality of individual PSs, each PS including a Ge element in which impinging photons are converted to detected electric charge, wherein for each direction out of a plurality of directions within a FOV, different detection signals are indicative of reflected SWIR illumination levels from different distances ranges along the direction; and processing the plurality of detection signals to determine a 3D detection map including a plurality of 3D locations in the FOV in which objects are detected; wherein the processing includes compensating for dark current (DC) levels accumulated during the collection of the plurality of detection signals resulting from the Ge elements; wherein the compensating includes applying different degrees of DC compensation for detection signals detected by different PSs of the at least one FPA.
In some aspects, there is disclosed a sensor operable to detect depth information of an object, comprising: a FPA including a plurality of PSs, each PS operable to detect light arriving from an instantaneous field of view (IFOV) of the PS, wherein different PSs are directed in different directions within a field of view of the sensor; a readout-set of readout circuitries, each being connected to a readout-group of PSs of the FPA by a plurality of switches, and operable to output an electric signal indicative of an amount of light impinging on the PSs of the readout-group when the readout group is connected to the respective readout circuitry via at least one of the plurality of switches; a controller operable to change switching states of the plurality of switches, such that different readout circuits of the readout-set are connected to the readout-group at different times, for exposing different readout circuits to reflections of illumination light from objects located at different distances from the sensor; and a processor, configured to obtain the electric signals from the readout-set indicative of detected levels of reflected light collected from the IFOVs of the readout-group of photosites for determining depth information for the object, indicative of a distance of the object from the sensor.
In order to understand the disclosure and to see how it may be carried out in practice, embodiments will now be described, by way of non-limiting examples only, with reference to the accompanying drawings, in which the following examples corresponding with different aspects of the presently disclosed subject matter are provided:
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.
In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the disclosure. However, it will be understood by those skilled in the art that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as not to obscure the present disclosure.
In the drawings and descriptions set forth, identical reference numerals indicate those components that are common to different embodiments or configurations.
Unless specifically stated otherwise, as apparent from the following discussions, it is appreciated that throughout the specification discussions utilizing terms such as “processing”, “calculating”, “computing”, “determining”, “generating”, “setting”, “configuring”, “selecting”, “defining”, or the like, include action and/or processes of a computer that manipulate and/or transform data into other data, said data represented as physical quantities, e.g. such as electronic quantities, and/or said data representing the physical objects.
The terms “computer”, “processor”, and “controller” should be expansively construed to cover any kind of electronic device with data processing capabilities, including, by way of non-limiting example, a personal computer, a server, a computing system, a communication device, a processor (e.g. digital signal processor (DSP), a microcontroller, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.), any other electronic computing device, and or any combination thereof.
The operations in accordance with the teachings herein may be performed by a computer specially constructed for the desired purposes or by a general-purpose computer specially configured for the desired purpose by a computer program stored in a computer readable storage medium.
As used herein, the phrase “for example,” “such as”, “for instance” and variants thereof describe non-limiting embodiments of the presently disclosed subject matter. Reference in the specification to “one case”, “some cases”, “other cases” or variants thereof means that a particular feature, structure, or characteristic described in connection with the embodiment(s) is included in at least one embodiment of the presently disclosed subject matter. Thus, the appearance of the phrase “one case”, “some cases”, “other cases” or variants thereof does not necessarily refer to the same embodiment(s).
It is appreciated that certain features of the presently disclosed subject matter, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the presently disclosed subject matter, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub-combination.
In embodiments of the presently disclosed subject matter one or more stages illustrated in the figures may be executed in a different order and/or one or more groups of stages may be executed simultaneously and vice versa. The figures illustrate a general schematic of the system architecture in accordance with an embodiment of the presently disclosed subject matter. Each module in the figures can be made up of any combination of software, hardware and/or firmware that performs the functions as defined and explained herein. The modules in the figures may be centralized in one location or dispersed over more than one location.
Any reference in the specification to a method should be applied mutatis mutandis to a system capable of executing the method and should be applied mutatis mutandis to a non-transitory computer readable medium that stores instructions that once executed by a computer result in the execution of the method.
Any reference in the specification to a system should be applied mutatis mutandis to a method that may be executed by the system and should be applied mutatis mutandis to a non-transitory computer readable medium that stores instructions that may be executed by the system.
Any reference in the specification to a non-transitory computer readable medium should be applied mutatis mutandis to a system capable of executing the instructions stored in the non-transitory computer readable medium and should be applied mutatis mutandis to method that may be executed by a computer that reads the instructions stored in the non-transitory computer readable medium.
In order to understand the disclosure and to see how it may be carried out in practice, embodiments will now be described, by way of non-limiting examples only, with reference to the accompanying drawings. It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.
In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the disclosure. However, it will be understood by those skilled in the art that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as not to obscure the present disclosure.
In the drawings and descriptions set forth, identical reference numerals indicate those components that are common to different embodiments or configurations.
Unless specifically stated otherwise, as apparent from the following discussions, it is appreciated that throughout the specification discussions utilizing terms such as “processing”, “calculating”, “computing”, “determining”, “generating”, “setting”, “configuring”, “selecting”, “defining”, or the like, include action and/or processes of a computer that manipulate and/or transform data into other data, said data represented as physical quantities, e.g. such as electronic quantities, and/or said data representing the physical objects.
The terms “computer”, “processor”, and “controller” should be expansively construed to cover any kind of electronic device with data processing capabilities, including, by way of non-limiting example, a personal computer, a server, a computing system, a communication device, a processor (e.g. digital signal processor (DSP), a microcontroller, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.), any other electronic computing device, and or any combination thereof.
The operations in accordance with the teachings herein may be performed by a computer specially constructed for the desired purposes or by a general-purpose computer specially configured for the desired purpose by a computer program stored in a computer readable storage medium.
As used herein, the phrase “for example,” “such as”, “for instance” and variants thereof describe non-limiting embodiments of the presently disclosed subject matter. Reference in the specification to “one case”, “some cases”, “other cases” or variants thereof means that a particular feature, structure, or characteristic described in connection with the embodiment(s) is included in at least one embodiment of the presently disclosed subject matter. Thus, the appearance of the phrase “one case”, “some cases”, “other cases” or variants thereof does not necessarily refer to the same embodiment(s).
It is appreciated that certain features of the presently disclosed subject matter, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the presently disclosed subject matter, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub-combination.
In embodiments of the presently disclosed subject matter one or more stages illustrated in the figures may be executed in a different order and/or one or more groups of stages may be executed simultaneously and vice versa. The figures illustrate a general schematic of the system architecture in accordance with an embodiment of the presently disclosed subject matter. Each module in the figures can be made up of any combination of software, hardware and/or firmware that performs the functions as defined and explained herein. The modules in the figures may be centralized in one location or dispersed over more than one location.
Any reference in the specification to a method should be applied mutatis mutandis to a system capable of executing the method and should be applied mutatis mutandis to a non-transitory computer readable medium that stores instructions that once executed by a computer result in the execution of the method.
Any reference in the specification to a system should be applied mutatis mutandis to a method that may be executed by the system and should be applied mutatis mutandis to a non-transitory computer readable medium that stores instructions that may be executed by the system.
Any reference in the specification to a non-transitory computer readable medium should be applied mutatis mutandis to a system capable of executing the instructions stored in the non-transitory computer readable medium and should be applied mutatis mutandis to method that may be executed by a computer that reads the instructions stored in the non-transitory computer readable medium.
IR system 6200 may include one or more photosites (PSs) 6202. For example, IR system 6200 may include hundreds, thousands, tens of thousands, hundreds of thousands, millions or more PSs 6202, whose detection signals may be processed to generate an image, a video, or a 3D model of a objects in a FOV of IR system 6200 (or of an electrooptical system in which IR system 6200 is integrated). For example, IR system 6200 may include 1280×720 PSs 6202, for generating a HD-resolution image. In other examples, IR system 6200 may include 640×480, 1440×900, or 1920×1080 PSs 6202, or any other deployment of PSs (whether standard or nonstandard, rectangularly tiled, hexagonally tiled (also referred to as “honeycomb tiled”), or any other geometrical arrangement of PS s). Any of the PS arrays discussed throughout the present disclosure may be used as imaging receivers.
PS 6202 includes Si layer 6210 in which diode 6230 is implemented. Diode 6230 includes two doped areas: first doped area 6232 and second doped area 6234. First doped area 6232 has a first polarity (positive in the example of
In addition to the Si layer, PS 6202 further includes a Ge photosensitive area (or simply “Ge area”) 6220, which is operable to generate e-h pairs in response to impinging IR photons (and possibly also to photons in other parts of the electromagnetic spectrum, such as the near IR (NIR) and the visible (VIS) parts of the spectrum. The term “Ge area” pertains to a bulk of material in which light-induced excitation of electrons occurs within the Ge, within a Ge alloy (e.g., SiGe), or on the border of Ge (or Ge alloy) and another material (e.g., Si, SiGe). Specifically, the term “Ge area” pertains both to pure Ge bulks and to Ge—Si bulks. When Ge bulks which include both Ge and Si are used, different concentration of Ge may be used. For example, the relative portion of Ge in the Ge area (whether alloyed with Si or adjacent to it) may range from 5% to 99%. For example, the relative portion of Ge in the Ge area may be between 15% and 40%. It is noted that materials other than Si such as aluminum, nickel, silicide, or any other suitable material may also be part of the Ge area. In some implementations, the Ge area may be a pure Ge area (including more than 99.0% Ge). Ge area 6220 can be deposited on Si layer 6210 in any suitable way, such as—but not limited to—epi growth of uniform layer, selective layer epitaxy method, and so on.
Within Ge area 6220 there is at least one doped area 6222 (also referred to as “absorber doped area”) with the first polarity (i.e., the same polarity of first area 6232; positive in the example of
Geometrically, first doped area 6232 is located between the second doped area and the absorber doped area. This means, in the context of the present disclosure, that most (or all of) the straight lines between points on the Ge area 6220 and points on the second doped area 6234 (of the opposing electric polarity) pass though, below, or above at least one point of the first doped area 6232. This way, controlling the relative voltages in the Ge area 6220, the first doped area 6232 and the second doped area 6234 affects movement of charge carriers generated in the Ge area 6220 to the readout of the respective PS 6202, as discussed below.
IR system 6200 includes at least one power source (e.g., power source 6250 and/or a power source connected to electrode 6235) that is operable to provide first-area voltage to first doped area 6232 and to provide second-area voltage to second area 6234. These voltages are used for biasing diode 6230. Optionally, the biasing may be constant in time. However, this is not necessarily so. In the illustrated examples, the biasing is always active (both VA and VC are set to their high level both during the active readout phase and the idle rest time of the respective PS 6202), but in in some implementations, the biasing voltages are not necessarily active at all times.
IR system 6200 also includes at least one controllable power source 6240 which is operable to:
Referring to the activation period, charge carriers of the second polarity are repelled by the voltage applied to Ge area 6220 and are attracted to the voltage applied to first doped area 6232. These charge carriers move past first doped area 6232 toward second doped area 6234 using a drift velocity resulting from the applied voltage between first doped area 6232 and second doped area 6234, e.g., in depletion region 6280 (which is identified only in
IR system 6200 may optionally include controller 6270 (which may be implemented on the same chip as the PSs 6202, or be part of a larger electrooptical system of which the chip is a part). Optional controller may control the provision of the modulated voltage (or voltages) to the relevant PS electrodes, and may control other parts of the operation of IR system 6200 as well.
A sampling cycle of the PS 6202 includes two phases—a sampling duration during which signal is collected (and later sampled and optionally provided to external modules), and a rest duration during which signal is not collected. The ceasing of the applying of the activation voltage diminishes movement of charge carriers of the second polarity to the readout electrode 6235. Optionally, the sampling cycle of the PS 6202 includes just those two phases, and not any other phases. The movement during the rest duration is diminished, and not intentionally directed to another useful location on the PS. Especially, in some or all implementations, PS 6202 does not include other readout electrodes which are used for collection signal during the rest period. Optionally, the diminishing of the charges results from low lifetime expected for the charge carriers in Ge area 6220.
In case the first polarity is positive polarity, the combination of voltages (VA, VC, VM) during the sampling duration may be one which fulfils the following condition: VC≥VA>VM, and the combination of voltages when the sampling duration concludes (e.g., during the idle duration) fulfils at least the condition that; VM≥VA, and optionally also that VC≥VA
Inducing charge carriers of the second polarity toward the readout electrode in only part of the time may be used for selectively collecting electric signal during times for relatively short spans of times (e.g., corresponding to illumination by a light source). This may be useful, for example, to prevent dark current charge generated in the Ge area 6220 (which may be relatively very high in comparison to the dark current in Si photodetectors) from saturating the capacitance of the detectors. IR system 6200 implements the switching between sampling time and idle time in the semiconductor level, in comparison with readout—circuit electronic switching which is implemented using transistors or other electric components. Implementing the switching in the semiconductor level is characterized by significantly lower noise when compared to the noise introduced by switching in the readout circuitry level (e.g., thermal noise, also referred to as Johnson-Nyquist noise or kTC noise). It is nevertheless noted that the switching in the semiconductor level as discussed above may be combined with other forms of switching, even ones which are implemented in the readout circuitry.
It is noted that any voltage out of the activation voltage and/or the rest voltage may be a single voltage or a range of voltage. The any voltage out of the voltages applied to first doped area 6232 and to second doped area 6234 may also be a single voltage or a range of voltage. For example, the activation voltage may be 1V, 2V, or varying voltage within the range 1-2V. Likewise, the rest voltage may be 0.0V, −0.2V, 0.3V, or varying voltage within the range −0.2-0.3V. Optionally, an amplitude of the rest voltage is lower by at least 0.2V than an amplitude of the activation voltage. Optionally, the rest voltage may be zero or close to zero, but this is not necessarily so.
Referring to the power sources which provide voltage to electrodes 6221, 6233, and 6235, each of these power sources (modulated or constant) may provide voltage to one or more PSs 6202. The power sources (e.g., 6240, 6250) may be included within individual PSs 6202 (as exemplified in
In the illustrated examples, the modulation is performed only on electrode 6221 which provides voltage to Ge area 6220. However, it will be clear to a person who is of skill in the art that equivalent implementations in which modulations on the anode voltage and/or the cathode voltage may also be used to generate movement of charge carriers of the second polarity from Ge area 6220 to second doped area 6234 during an activation duration of the PS 6202, and diminishing of that movement during a resting duration of the PS 6202. Modulations of VA and/or VC may be implemented together with modulation of VM, but optionally the voltage to Ge area 6220 may be maintained constant in case VA and/or VC are modulated. An example of such an implementation is provided below with respect to PS 6502 of
The duration of the sampling cycles may optionally be determined with respect to a frame rate of the IR system 6200. For example, for a 60 fps frame rate, the duration of the sampling cycles may be 1/60 seconds each. If each frame of the 60 fps example require multiple exposure, the sampling cycles may be much shorter, and not necessarily of equal lengths. The sampling cycles may optionally be synchronized with illumination by an associated illumination source (if any). For example, IR system 6200 may be combined with at least one illumination source (e.g., laser, light emitting diode—LED) in a single electrooptical system (e.g., camera, LIDAR, spectrograph), and the sampling duration may start upon emission of light by the at least one light source. Each sampling duration may be associated with a single illumination span, with a plurality of illumination spans (e.g., in some pulsed illumination implementation), and may also be unsynchronized with illumination (e.g., if no illumination or if constant illumination is implemented). The sampling durations and/or the sampling cycles of different PS s 6202 may be synchronized (e.g., starting at the same time), cascaded (e.g., different rows of PS s in a photodetecting array may be triggered one after the other), or otherwise modulated.
The sampling duration may change in different embodiments of the disclosure. Optionally, one or more of the at least one sampling duration of PS 6202 is shorter than 10 nanoseconds. Optionally, one or more of the at least one sampling duration of PS 6202 is between 10-100 nanoseconds. Optionally, one or more of the at least one sampling duration of PS 6202 is between 100-500 nanoseconds. Optionally, one or more of the at least one sampling duration of PS 6202 is between 0.5-5 microseconds. Optionally, one or more of the at least one sampling duration of PS 6202 is longer than 5 microseconds.
While not necessarily so, Si layer 6210 and Ge area 6220 may optionally be doped with the first polarity. This may be used for creating a positive channel (or a negative channel).
Optionally, IR photodetecting system 6200 may include a spectral filter for blocking photons of the visible spectrum from reaching the photodiode. Spectral filters which block other parts of the electromagnetic spectrum (e.g., far IR parts of the spectrum, ultraviolet parts of the spectrum) may also be implemented. Blocking of photons of selected parts of the spectrum from reaching the diode may be implemented in order to prevent accumulation of signal which result from these photons (in the Ge area 6220 and/or in Si layer 6210). Optionally, one or more spectral filters may be implemented on the system level, in an electrooptical system in which IR system 6200 is integrated. For example, a window, a lens, a mirror, a prism, or another optical component which deflects light that is to be sensed by the system may be coated with a spectral filtering coating, or a dedicated spectral filter may be positioned on the incoming optical part. A spectral filter, if implemented, may be implemented on the same chip on which IR system 6200 is implemented, or in any other part of the electrooptical system (not illustrated).
Optionally, IR photodetecting system 6200 (or an electrical system in which the IR sensing chip is integrated) may include a cooling module (e.g., heat transfer fluid, heat sink, cold plate, Peltier cooling plate) for reducing heat caused by charge carrier of the first polarity collected via an electrode electrically coupled to Ge area 6220. It is noted that the current resulting from these charge carriers of the first polarity may be larger than the detection signal collected by the readout circuit. An intrinsic doping of Si layer 6210 and/or of Ge area 6220 may be such that reduce movement of charge carriers of the first polarity, thereby reducing a modulation current of charge carriers of the first polarity. This reduction of the modulation current of the charge carriers of the first polarity (by selecting a suitable doping level, e.g., a low level of doping) facilitates reduce thermal effects of the modulation current, thus reducing power consumption and alleviating (or reducing) the need for costly cooling mechanisms.
Optionally, IR photons from a FOV of the IR photodetecting system 6200 pass through the Si layer 6210 before being absorbed in Ge area 6220 (where they may cause generation of an e-h pair, depending on the quantum efficiency of the detector).
Optionally, IR photodetecting system 6200 may include a passivation layer 6290 between (a) the Ge area 6220 and diode 6230 on one side, and (b) the at least one power source (e.g., 6240, 6250) on the other side. Such passivation layer may be made from SiO2, Si3N4, or any other suitable material. Optionally, IR photodetecting system 6200 may include a planarization layer (e.g., between (a) the Ge area 6220 and diode 6230 on one side, and (b) the at least one power source on the other side). Such planarization layer may be made from SiO2, Si3N4, or any other suitable material. Optional passivation layer 6290 is illustrated in only
Optionally, Ge area 6220 may be is overlayed on top of the Si layer (directly or indirectly on top of it). In other implementations (not shown), at least a part of the Ge area is sunk within the Si layer (e.g., within etched holes) and/or within the passivation layer (if any).
Optionally, IR photodetecting system 6200 may include at least one photo-effective layer bonded to a polished side of the Si layer positioned opposite to a side of the Si layer on which the Ge area is deployed. A photo-effective layer within the context of the present disclosure is a layer which manipulates the illumination passing through it. For example, the photo effective layer may operate as a chromatic filter, as a polarization filter, as any other type of optical filter, as a retarder, a diffraction grating, or any other type of layer which affect the light radiation which traverse the layer.
Optionally, electro-optical detection system 6299 may include various additional components, many of which are known in the art, such as (but not limited to) any combination of one or more of the following components:
Optionally, the processor of electrooptical system 6299 may be further configured to process the detection data in order to determine a presence of at least one object in the FOV.
Stage 6310 includes providing a first voltages combination to: (a) a first doped area of a Si layer of a PS, (b) a second doped area of the Si layer of the PS, which has the opposite doping polarity, and (c) a doped area of a Ge area of the PS, which is connected to the Si layer such as to allow transmission of charge carriers from the Ge area to the Si layer. The provision of the first voltage combination forces charge-carriers of the same polarity as the second doped area to move from the Ge area toward the second doped area of the Si layer, where the CCSP are collected via a readout electrode which is electrically coupled to the second doped area. Stage 6310 includes providing the first voltages combination for a sampling duration of the PS.
Stage 6320 includes providing a second voltages combination to: the first doped area of the Si layer, to the second doped area of the Si layer of a PS, and to the doped area of the Ge area. The provision of the second voltage combination diminishes the forcing of the aforementioned charge carriers, thereby ceasing the collection of signals by the PS. Stage 6320 includes providing the second voltages combination for a rest duration of the PS. While not necessarily so, the rest duration may start directly when the sampling duration ends.
The first voltages combination and the second voltages combination may differ from each other in: (a) the voltage(s) applied to the first doped area of the Si layer; (b) the voltage(s) applied to the second doped area of the Si layer; (c) the voltage(s) applied to the Ge area; or (d) any combination of two or more of (a), (b) and (c). At least in the first voltages combination, a photodiode which includes the first doped area and the second doped area is biased for collection of charge carriers resulting from absorption of photons.
Optionally, diode 6230 is maintained in reverse bias during the sampling duration, and optionally during the entire continuous operation of PS 6202. Diode 6230 is maintained in reverse bias when VC is greater than VA. Optionally, Diode 6230 is maintained at zero bias (or substantially zero bias) during the sampling duration, and optionally during the entire continuous operation of PS 6202. Optionally, VC≥VA during the sampling duration, and optionally during the entire continuous operation of PS 6202.
Stage 6330 of method 6300 includes reading by a readout circuit electrically connected to the PS an electric signal collected at least during the sampling duration, for determining a detection signal for the PS for the specific sampling duration. Stage 6330 is executed after stage 6310 is concluded. Stage 6330 may be executed during stage 6320 and/or after it. The detection signal may be used, for example, for generating an image, by combining detection signals of a plurality of PSs, each being directed to an instantaneous FOV within a FOV of a system.
Stages 6310, 6320, and 6330 may be repeated as a group, each time collecting a different detection signal corresponding to the amount of IR light impinging on the Ge area of the IR photodetecting system. The sampling duration and the rest duration may be kept the same between any two consecutive instances of the repetition, but one or both of those duration may also change.
Stage 6310, 6320 and 6330 may be executed for each out of a plurality of PSs of the IR sensor, and method 6300 may include generating an image (or other detection model such as a depth map of a lidar, or spectrograph analysis) representing objects in the FOV in response of the detection signals of the different PSs. The sampling durations of the different PSs may coincide or differ from one another.
A method for detecting IR radiation by a PS such as PS 6202 is disclosed, the method including the following stages:
In the illustrated example, the modulation is implemented on the first doped area 6440, while the voltages on the Ge area 6492 and the readout electrode are maintained constant. It is nevertheless noted that any suitable type of modulation may be used, modulating the voltages on any one or more of these electrodes, as long as the relative voltages between the electrodes change over time.
It is noted that while the “charge storage region” may seem like a pinned photodiode, the collected charge arrives from the remote Ge area, in comparison to any part of the charge storage region. Suitable filters may be implemented to present charge generation in the Si (e.g., shielding some parts of PS 6402, spectral band-path or high-pass filters permitting SWIR light but not visible or NIR light to pass, and so on).
It is noted that any variation, implementation, feature, and component discussed above with respect to PS 6202 may be applied, mutatis mutandis to PSs 6402, 6404, 6406, and 6408. It is noted that any variation, implementation, feature, and component discussed above with respect to IR system 6200 may be implemented, mutatis mutandis, for any IR system in which PSs 6402, 6404, 6406, or 6408 are implemented.
It is noted that while the operation of PS 6502 is different than that of PS 6202, each readout structure 6570 in combination with GE photosensitive area 6520 may be operated—usually only during part of the runtime of PS 6502—similarly to the Ge area 6220, first doped area 6232 (which correspond in this aspect to the respective intermediary doped area 6532) and second doped area 6234 (which correspond in this aspect to the respective remote doped area 6534). When operated similarly to PS 6502, the flow of charge carriers between the Ge area and the respective readout structure 6570 behaves similarly to the sampling phase of PS 6502 (even though differences are possible, e.g., during to affect of the other readout structures 6570, to relative voltages in all of the electrodes, and so on.). Optionally (e.g., as illustrated in
The IR system in which PS 6502 further includes a controllable power source (partly represented by controllable power units 6540) which is operable to provide controlled voltages to the Ge photosensitive area 6520 (possibly to a part of it, such as absorber doped area 6522), as well as to the remote doped areas 6534 and the intermediary doped areas 6532 of different readout structures (e.g., all of them). The voltages may be provided to the different areas via suitable electrodes, such as (but not limited to) electrodes 6535, 6533, and 6521. It is noted that some of the areas to which voltages are supplied by the controllable power source may receive constant (or substantially constant) voltages, but for at some of these areas, controllable (e.g., modulated) voltages which change with time are provided. In the example illustrated in
Reverting to the controllable power source, it is noted that different voltage schemes may be applied by the controllable power source to the different electrodes of any one or more PS 6502, in order to alternately read charge (and by that alternately reading detection signals) by different readout structures 6570 of any such single PS 6502. For example, controllable power source of PS 6502 may optionally be operable (e.g., by way of being previously configured, by a run-time decision of a controller, etc.) to maintain the following voltages schemes, e.g., for achieving the aims discussed below. It is noted that the reference numbers in the following discussion are given as a non-limiting example pertaining to
The alteration between reading from the first readout structure and the second readout structure may continue of the same principle. It is noted that the disclosed process may also be fitting for reading out of more than two readout structures (e.g., four readout structures in the example of
Referring to the pulling forces discussed above, it is clear that different charge carriers will face different pulling forces toward a doped area, even concurrently (e.g., when known voltages are supplied to the different parts of PS 6502). However, a single charge carrier will face different pulling forces towards the different readout structures 6570, and the relative magnitudes of these forces applied to any given charge carriers may be compared.
While the FIGS. Illustrating PS 6502 illustrate a polarity in which absorber doped area 6522 is doped with a positive polarity, it is noted that reverse polarities may also be implemented (i.e., absorber doped area 6522 is doped with a negative polarity, and the rest of the polarities in PS 6502 are also reversed). It is noted that while PS s 6502 and 6202 are different from one another, a person who is of skill in the art will be able to implement the expanded description of PS 6202, its components, and its ways of operation, for understanding PS 6502, its components, and its ways of operation, mutatis mutandis.
As exemplified in the nonlimiting example of
PS 6502 include a single Ge area 6520 with one (or more) associated electrode 6521 connected thereto. However, unlike PS 6502 which includes only a single anode and a single cathode, PS 6502 includes a plurality of sets of first doped area 6532 and second doped area 6534, as well as associated components (e.g., electrodes). Each set of doped areas and associated elements is denoted with a suffix of a capital letter associated with the set. For example, first doped area 6532 of set A is denoted 6532A, and first doped area 6532 of set B is denoted 6532B. It is noted that while the diagram shows only a single combination of polarities, other combinations of polarities of doped areas and charge carriers may also be implemented, and especially one with the opposite polarities. It is noted that the polarities of the doped areas of different readout structures may different between one readout structure to another in a single PS 6502.
Prior art implementations of photodetector arrays with N-tap photosites have been implemented in rectangular tiling, in which each PS is identical to its neighbors, and the different detection/readout structures of the different PS are activated in identical manner in all of the PSs of the array (e.g., for a four-tap PDA, activating all of the top-left detection structures of the different PSs concurrently, followed by activating all of the top-right detection structures of the different PSs concurrently, followed by activating all of the bottom-right detection structures of the different PSs concurrently, followed by activating all of the bottom-left detection structures of the different PSs concurrently, for a synchronized clockwise modulated detection scheme).
The following discussion pertains to neighboring photosites, each including at least a first readout structure (e.g., 9030A) and a second readout structure (e.g., 9030B), where the first readout structures of the neighboring photosites are adjacent to each other, and the second readout structures of the neighboring photosites are distanced from one another. For example, a distance between the second readout structures of the neighboring PSs may be at least 3 times larger than a distance between the first readout structures of the neighboring PSs. For example, the distance between the second readout structures of the neighboring PSs may be larger than the distance between the first readout structures of the neighboring PSs by at least one (or at least two) width of a readout structures. For example, the distance between the second readout structures of the neighboring PSs may be larger than a width of a PS of the PDA.
Stage 9062 includes controlling collection scheme of the neighboring PSs (e.g., by applying suitable voltages to different areas of the PS, including different parts of the different readout structures), such that the first readout structures of the neighboring PSs are activated (i.e., set to detection mode) concurrently. Optionally, stage 9062 may also include controlling the collection scheme of the neighboring PSs such that the second readout structures of the neighboring photosites are set to idle (e.g., applying reduced pulling force of charge carriers of a detected polarity towards the second readout structures, or even applying repelling force to such charge carriers away from the second readout structures) concurrently with the activation of the first readout structures.
Stage 9064, which is executed after stage 9062, includes controlling collection scheme of the neighboring photosites (e.g., by applying suitable voltages to different areas of the photosite, including different parts of the different readout structures), such that the second readout structures of the neighboring photosites are activated (i.e., set to detection mode) concurrently. Optionally, stage 9062 may also include controlling the collection scheme of the neighboring photosites such that the first readout structures of the neighboring photosites are set to idle (e.g., applying reduced pulling force of charge carriers of a detected polarity towards the first readout structures, or even applying repelling force to such charge carriers away from the first readout structures) concurrently with the activation of the second readout structures.
Optionally, stages 9062 and 9064 may be iterated to collect additional signal. Optionally, stage 9062 and/or stage 9064 also include controlling the collection scheme of the neighboring photosites such that one or more readout structures of each of the neighboring photosites (e.g., third, fourth, etc., such as 9030C, 9040D) are also set to idle concurrently with the activation of the respective first readout structures or second readout structures. It is noted that for photosites which include more than two readout structures, additional stages, similar to 9062 and 9064, may be included for the additional readout structures, mutatis mutandis. As mentioned above, when photosites with more than two readout structures are implemented, and one or more readout structure are activated more than once in a detection of the photosite (e.g., in a single frame of the PDA), any order may be implemented, whether round-robin or otherwise (e.g., ABCDABCDABCD, ABCDBDACDABC, ABABCDCDABABCDCD). If the different photosites include a structure for discarding of charge carriers without reading it, and without them reaching the other readout structures (e.g., structure 6588 discussed above), an additional optional stage, similar to 9062 and 9064, may be included for driving relevant charge carriers towards this structure, mutatis mutandis.
After stage 9062 has been executed at least once (1≤T1 times) and stage 9062 has been executed at least once (1≤T2 times), method 9060 may optionally continue with stage 9066 of determining a detection signal for each of the first readout structures, corresponding to the signal collected by each of the first readout structures during the T1 instances, and with stage 9068 of determining a detection signal for each of the second readout structures, corresponding to the signal collected by each of the second readout structures during the T2 instances. The determined detection signals may be combined, for example (e.g., summed) for each detection frame of the PDA.
Method 9060 may optionally continue with at least one of optional stages 9070, 9072, and 9074.
Stage 9070 includes generating an image of at least a part of the FOV of the PDA, based on the detection signals determined for each of the readout structures, wherein the number of detection signals for each photosite is smaller than a number of readout structures of the photosite (e.g., determining a single detection value for each photosite, based on data collected by two, three four, or more readout structures of the photosite). Optionally, stage 9070 may include determining one or more detection signals for a group of photosites, wherein the overall number of detection signals determined for the group of photosites is smaller than the number of readout structures (RO structures, ROS) in each photosite. For example, determined R, G, and B color signals for a group of four N-tap photosites.
Optional stage 9072 includes determining a distance to an object in a FOV, based on a comparison between a first detection signal of a first readout structure of a photosite and a second detection signal of a second readout structure of the same photosite, wherein each of the first detection signal and the second detection signals are determined based on a plurality of measurements executed during a plurality of instances of stage 9062 or 9064, respectively. For example, stage 9072 may be executed by implementing current assisted photonic demodulator (CAPD) techniques, many of which are known in the art.
Optional stage 9074 includes determining a distance to an object in a FOV, based on a first detection signal of a first readout structure of a photosite, a second detection signal of a second readout structure of the same photosite, and possibly additional detection signals of additional readout structures of the same photosite (if any), wherein each detection signal is based on a single instance (i.e., T1=1, T2=1, etc.), and each detection signal is measured in a sequential manner (optionally somewhat overlapping), after emission of an illumination pulse, wherein the magnitude of the different detection signals and their temporal relation to the timing of the pulse emission are indicative of the distance to the object. An example is provided below.
It is noted that the concurrent activation of neighboring readout structures of neighboring photosites 9020 may be used in order to reduce cross-talks between adjacent photosite, and reduce the amount of pulling force applied by an active readout structure of a neighboring photosite applied at the opposite direction (or otherwise wrong direction) to the direction of the active readout structure of the present photosite. It is noted that while the second readout structures of method 9060 were described as remote from one another, these photosites may be adjacent to other second readout structures of other neighboring photosites, e.g., as exemplified in
Pinned layer 7522 and optionally also pinning layer 7524 are connected via transfer gate 7530 to floating diffusion 7540. Charge carriers that are generated in Ge area 7510 (especially in doped area 7512 of Ge area 7510) are collected at pinned layer 7522 (also referred to as the storage well). During the collection phase, transfer gate 7530 may keep the storage well 7522 separated from floating diffusion 7540, so that all the charge carriers which arrive from Ge area 7510 are collected during a sampling time of the respective photosite. At a later time (such as during an off time of the respective photosite), transfer gate 7530 may connect storage well 7522 and floating diffusion 7540, so that charge collected at storage well 7522 may move to floating diffusion 7540, from where it is read out by at least one electrode. An optional third doped layer 7526 (similar to layer 6470, mutatis mutandis) is exemplified in
Referring to photosites 6402, 6404, 6406, 6408, 7502, 7504, and 7506 (and all the other photosites discussed above), it is noted that the same photosites may be implemented with the inverted polarities to the ones exemplified in the illustrations. That is, areas/parts that are illustrated with negative polarity may be implemented as positively doped, together with implementing as negatively doped areas/parts that are illustrated with positive doping. It is also noted that the doping levels (e.g., −, +, ++) of the different areas may vary in different implementations.
Stage 7610 of method 7600 includes modulating voltage to at least one area of a photosite (PS) selected from a group consisting of: a first doped area of the PS, a Ge photosensitive area of the PS and a floating diffusion of the PS, wherein the photosite includes at least: (a) the Ge photosensitive area that is operable to generate e-h pairs in response to impinging IR photons and which includes an absorber doped area having a first polarity; and (b) a Si layer including the first doped area, a storage well, the floating diffusion, and a transfer gate. The modulating of stage 7610 includes at least the following stages:
Optionally, method 7600 may also include reading by a readout circuit electrically connected to the photosite an electric signal collected at the floating diffusion, for determining a detection signal for the photosite for the specific sampling duration.
The different stages of method 7600 may be executed for each out of a plurality of photosites of the IR sensor, and method 7600 may include generating an image (or other detection model such as a depth map of a lidar, or spectrograph analysis) representing objects in the FOV in response of the detection signals of the different photosites. The sampling durations of the different photosites may coincide or differ from one another.
Any variation discussed with respect to photosites 7502, 7504, and 7506 (as well as with respect to equivalent components of any other photosite discussed above) may be implemented, mutatis mutandis, in an execution of method 7600.
When method 7600 is executed for a photosite which includes two or more floating diffusions connected to the Ge area by a respective plurality of transfer gates (e.g., as discussed above with respect to photosite 7506), stages 7620, 7630 and 7640 may be executed for each of the floating diffusions separately (e.g., in an alternating fashion, a round-robin fashion, or in any other desired order). While not necessarily so, after execution of a first instance of stages 7620 and 7630, a first instance of stage 7640 may be executed for transferring charge carriers of the second polarity from the storage well via a first transfer gate to a first floating diffusion, where they are read via a first readout electrode electrically connected to the first floating diffusion. Following the first instance of stage 7640, a second instance of stages 7620 and 7630 may be carried out, following by a second instance of stage 7640 in which charge carriers of the second polarity are transferred from the storage well via a second transfer gate to a second floating diffusion, where they are read via a second readout electrode electrically connected to the second floating diffusion. Later instances of stages 7620, 7630, 7640 may be executed for transferring charge carriers of the second polarity toward additional floating diffusions for the first time, and/or for floating diffusions for an additional time, as required.
Optionally, method 7600 may also include reading by a readout circuit electrically connected to the photosite an electric signal collected at the floating diffusion, for determining a detection signal for the photosite for the specific sampling duration. The detection signal may be used, for example, for determining a brightness value for a pixel in an image of the FOV. If a photosite with multiple floating diffusion is used, an electric signal may be read from each of the floating diffusions via a suitable electrode. These signals may be used, for example, for determining distance to objects in the FOV.
Method 7700 includes providing controlled voltages to areas of a photosite which includes at least:
The providing of the controlled voltages is used at different times for different ends, which include at least stages 7710, 7720, 7730, 7740, 7750, and 7760.
Stage 7710 includes maintaining, for a first sampling duration, relative voltages on the Ge photosensitive area, a first remote doped area of a first readout structure out of the multiple readout structures, and a first intermediary doped area of the first readout structure, such that charge carriers of the second polarity are forced to move from the Ge area toward the first readout structure by a first pulling force, where the CCSP are collected via a first readout electrode electrically connected to the first remote doped area.
Stage 7720 includes maintaining, for the first sampling duration, voltages on the doped areas of a first group of readout structures that includes the rest of the multiple readout structures other than the first readout structure, such that a pulling force applied to charge carriers of the second polarity towards each of the remote doped areas of the first group of readout structures is less than half of the first pulling force.
Stage 7730 includes maintaining, for a second sampling duration that is later than the first sampling duration, relative voltages on the Ge photosensitive area, a second remote doped area of a second readout structure out of the multiple readout structures, and a second intermediary doped area of the second readout structure, such that charge carriers of the second polarity are forced to move from the Ge area toward the second readout structure by a second pulling force, where the CCSP are collected via a second readout electrode electrically connected to the second remote doped area.
Stage 7740 includes maintaining, for the second sampling duration, voltages on the doped areas of a second group of readout structures that includes the rest of the multiple readout structures other than the second readout structure, such that a pulling force applied to charge carriers of the second polarity towards each of the remote doped areas of the second group of readout structures is less than half of the second pulling force.
Stage 7750 includes maintaining, for a third sampling duration that is later than the second sampling duration, relative voltages on the Ge photosensitive area, the first remote doped area, and the first intermediary doped area, such that charge carriers of the second polarity are forced to move from the Ge area toward the first readout structure by a third pulling force, where the charge carriers of the second polarity are collected via the first readout electrode. and
Stage 7760 includes maintaining, for the third sampling duration, voltages on the doped areas of the first group of readout structures, such that a pulling force applied to charge carriers of the second polarity towards each of the remote doped areas of the first group of readout structures is less than half of the third pulling force.
Optionally, a first voltage applied to first intermediate doped area during the first sampling duration is at least ten times higher than any voltage applied to any intermediate doped area of the first group of readout structures averaged over the first duration.
Optionally, method 7700 may be executed concurrently for a plurality of photosites.
Optionally, method 7700 may further include providing during a discarding-duration voltages to multiple areas of the photosite for driving charge carriers of the second polarity toward an electrode via which the charge carriers are disposed of from the photosite without being read.
As aforementioned, different techniques may be used for determining depth based on outputs of one or more photosites. The discussion below discusses systems and methods which may be used for determining distances of objects in a FOV of a SWIR electrooptical system, as well as other electrooptical systems which are sensitive to other parts of the electromagnetic spectrum.
Stage 5510 includes obtaining a plurality of detection signals of the SEI system each detection signal indicative of amount of light captured by at least one FPA detector of the SEI system from a specific direction within a FOV of the SEI system over a respective detection time frame (i.e., the detection time frame during which the respective detection signal is captured, e.g., measured from the triggering of the illumination by an associated light source such as a laser). The at least one FPA includes a plurality of individual photosites, each photosite including a Ge element in which impinging photons are converted to detected electric charge. It is noted that method 5500 may be implemented for any type of photosites which characterized by a high dark current, even if not including Ge but rather other elements.
For each direction out of a plurality of directions within a FOV, different detection signals (out of the aforementioned plurality of detection signals) are indicative of levels of reflected SWIR illumination from different distances ranges along the direction. An example is provided in a diagram 5710 of
Referring to the example of
Stage 5520 includes processing the plurality of detection signals to determine a three-dimensional (3D) detection map which includes a plurality of 3D locations in the FOV in which objects are detected. The processing includes compensating for dark current (DC) levels accumulated during the collection of the plurality of detection signals resulting from the Ge elements, and the compensating includes applying different degrees of dark current compensation for detection signals detected by different photosites of the at least one focal place array. Referring to the examples of the accompanying drawings, the different detection signals may be obtained at different times by different readout structures of any of the applicable photosites discussed above. Alternatively, the detection signals may be obtained by groups of interconnected photosites, as discussed at a greater detail below. Other implementations may also be used.
In addition to—or instead of compensating for accumulated dark current, the processing may include compensating for high integration noise levels and/or readout noise levels during the reading out of the plurality of detection signals. The compensating may include applying different degrees of noise levels compensation for detection signals detected by different photosites of the at least one focal place array.
The compensating for the collection of dark current, for the readout noise, and/or for the integration noise may be done in any suitable way, such as by using any combination of one or more of the following: software, hardware, and firmware. Especially, the compensation for the collection of dark current may be implemented using any combinations of any one or more of the systems, methods, and computer program products discussed above, or any parts thereof. Some non-limiting examples of the systems, methods, and computer program products which may be used for compensating for dark current and for applying degrees of dark current compensation for detection signals detected by different photosites of the at least one focal place array are discussed above with respect to
In some implementations, the compensating may be executed during the obtaining of the plurality of detection signals (e.g., in the hardware level of the sensor), and the processing may be executed on detection signals which are already compensating for dark current accumulation (e.g., as discussed in published patent applications by the applicant, TriEye LTD of Tel Aviv).
Referring to the compensating within stage 5520, optionally the compensating may include: subtracting a first dark current compensation offset from a first detection signal detected by a first photosite corresponding to a first detection range; and subtracting a second dark current compensation offset, that is different than the first dark current compensation offset, from a second detection signal detected by the first photosite corresponding to a second detection range which is further away from the SEI system than the first detection range.
Optionally, method 5500 may include coordinating of active illumination (e.g., by at least one light source of the SEI system) and the acquisition of the detection signals. Optionally, method 5500 may include: (a) triggering emission of first illumination (e.g., laser, LED) in coordination with initiating of an exposure of a first gated image in which a plurality of first detection signals are detected for different directions out of the plurality of directions; (b) triggering emission of second illumination (e.g., laser, LED) in coordination with initiating of an exposure of a second gated image in which a plurality of second detection signals are detected for the different directions; and (c) triggering emission of third illumination (e.g., laser, LED) in coordination with initiating of an exposure of a third gated image in which a plurality of third detection signals are detected for the different directions. In such a case, the processing of stage 5520 may optionally include: determining a presence of a first object in a first 3D location within a first direction out of the different directions based on at least one detection signal from each image out of the first image, the second image, and the third image, and determining a presence of a second object in a second 3D location within a second direction out of the different directions based on at least one detection signal from each image out of the first image, the second image, and the third image, wherein a distance of the first object from the SEI system is at least twice a distance of the second object from the SEI system.
Optionally, the applying of the different degrees of DC compensation for detection signals detected by different photosites of the at least one FPA may include using detected dark current levels of different reference photosites which are shielded from light arriving from the FOV.
Optionally, the compensating may include applying different degrees of DC compensation for detection signals detected concurrently by different photosites of the at least one FPA.
Referring to integration noise and to readout noise, it is noted that the compensation for such noises may be correlated by the at least one processor executing method 5500 to the number of illumination pulses used for illuminating parts of the FOV during the acquisition of the respective detection signals. The different number of illumination pulses may result in significant non-linearity of the detected signal, which is optionally corrected as part of the processing prior to the determining of the distance/3D location of different objects in the FOV.
Referring to the use of DADS for determining the distance/3D location for different objects in the FOV, it is noted that different translation functions of DADS (e.g., tuples) to distance may be used for different directions within the FOV, e., in order to compensate for non-uniformity of the detection channel across the FOV (e.g., of the sensor and/or the detection objects), for non-uniformity of illumination (e.g., using multiple light sources, light source non-uniformity or optics non-uniformity), and so on.
As mentioned above, different detection signals from the same direction within the FOV correspond to different detection windows, which may be of the same distance, or of different distances. For example, a detection window may correspond to a range of distances which is about 50 m (e.g., between 80 m from the SEI system and 130 m from the SEI system). In different examples, some or all of the detection windows used for determining a distance/3D location for an object in the FOV may be of a range of distances which is between 0.1 m-10 m, between 5 m-25 m, between 20 m-50 m, between 50 m-100 m, between 100 m-250 m, and so on. The distances ranges associated with different detection signals may overlap. For example, a first detection window may detect returning light from objects whose distances from the SEI system is between 0 m and 50 m, a second window may correspond to objects between 25 m and 75 m, and a third window may correspond to objects between 50 and 150 m.
Method 5500 may be executed by any one or more processors, such as, but not limited to, processors of any of the aforementioned systems. There is disclosed a system for generating a depth image of a scene based on detections of a short-wave infrared (SWIR) electrooptical imaging system (SEI system), the system including at least one processor configured to: obtain a plurality of detection signals of the SEI system each detection signal indicative of amount of light captured by at least one FPA detector of the SEI system from a specific direction within a FOV of the SEI system over a respective detection time frame, the at least one FPA including a plurality of individual photosites, each photosite including a Ge element in which impinging photons are converted to detected electric charge, wherein for each direction out of a plurality of directions within a FOV, different detection signals are indicative of reflected SWIR illumination levels from different distances ranges along the direction; and to process the plurality of detection signals to determine a three-dimensional (3D) detection map including a plurality of 3D locations in the FOV in which objects are detected, wherein the processing includes compensating for dark current (DC) levels accumulated during the collection of the plurality of detection signals resulting from the Ge elements, wherein the compensating includes applying different degrees of DC compensation for detection signals detected by different photosites of the at least one FPA.
Optionally, the compensating may include: subtracting a first DC compensation offset from a first detection signal detected by a first DE corresponding to a first detection range; and subtracting a second DC compensation offset, that is different than the first DC compensation offset, from a second detection signal detected by the first DE corresponding to a second detection range which is further away from the SEI system than the first detection range.
Optionally, the at least one processor may be further configured to: (a) trigger emission of first illumination in coordination with initiating of an exposure of a first gated image in which a plurality of first detection signals are detected for different directions out of the plurality of directions; (b) trigger emission of second illumination in coordination with initiating of an exposure of a second gated image in which a plurality of second detection signals are detected for the different directions; and (c) trigger emission of third illumination in coordination with initiating of an exposure of a third gated image in which a plurality of third detection signals are detected for the different directions. In such a case, the at least one processor may be further configured to determine, as part of the determining of the 3D detection map: (a) a presence of a first object in a first 3D location within a first direction out of the different directions based on at least one detection signal from each image out of the first image, the second image, and the third image, and (b) a presence of a second object in a second 3D location within a second direction out of the different directions based on at least one detection signal from each image out of the first image, the second image, and the third image, wherein a distance of the first object from the SEI system is at least twice a distance of the second object from the SEI system. The gated image (or equivalent thereof) may be achieved by utilizing the different readout structures of photosites of a PDA, e.g., in any of the ways discussed above.
Optionally, the applying of the different degrees of DC compensation for detection signals detected by different photosites of the at least one FPA includes using detected dark current levels of different reference photosites which are shielded from light arriving from the FOV. Optionally, the compensating may include applying different degrees of DC compensation for detection signals detected concurrently by different photosites of the at least one FPA. Optionally, one or more processors (and possibly all) out of the at least one processor may be part of the SEI system.
Referring to the aforementioned diagrams, method 5500 as well as any combination of two or more stages thereof may be executed by any of the processors discussed above with respect to the previous diagrams. Referring to the aforementioned diagrams, method 4600 as well as any combination of two or more stages thereof may be executed by any of the processors discussed above with respect to the previous diagrams. It is noted that while method 5500 and the associated systems were discussed in relation to generating depth images of scenes based on detections of SWIR electro optical imaging systems, similar methods and systems may be used mutatis mutandis for generating depth images of scenes based on detections of electro optical imaging systems which are characterized in high dark currents or other noise and interferences to the signals, even when operating in other parts of the electromagnetic spectrum.
Sensor 5200 includes FPA 5290 which in turns includes a plurality of photosites 5212, each being operable to detect light arriving from an view IFOV of the PS. Different PSs 5212 are directed in different directions within a FOV 5390 of sensor 5200. For example, referring to FOV 5390 of
It is noted optionally, all of the PSs 5212 of a single readout-group 5210 are physically adjacent to one another (i.e., each PS 4212 of a readout-group 5210 is physically adjacent to at least one other PS 5212 of the readout-group 5210, so as to create at least one continuous path through adjacent PSs 5212 between any two PSs 5212 of the readout-group 5210).
Nevertheless, non-continuous readout-groups may also be implemented (e.g., if some PSs 5212 of FPA 5290 are defective, if some PSs 5212 of FPA 5290 are unused (e.g., for saving power), or for any other reason. If FPA 5290 includes more than one readout-group 5210, the readout-groups 5210 may include the same number of PSs 5212 (but not necessarily so), may include the same type of PSs 5212 (but not necessarily so), may be arranged in the same geometrical configuration (e.g., in 1×3 arrays, as illustrated in the examples of
Sensor 5200 includes at least one readout-set 5240 which includes multiple readout circuitries 5242. Each of the multiple readout circuitries 5242 in a single readout-set 5240 is connected to the same readout-group 5210 of PSs 5212 of FPA 5290 by a plurality of switches 5232 (collectively denoted 5230). A readout circuitry 5242 reads a signal from one or more PSs 5212 which are connected to the readout circuitry 5242, and outputs data (e.g., in an analog or digital manner) which is indicative of the levels of light to which the respective one or more PSs 5212 were subject. The outputted data may be provided to a processor, communicated to another system, stored in a memory module, or used in any other way. Different readout circuitries 5242 of the single readout-set are connected to the various PSs 5122 of the respective readout-group 5210 and operable to output an electric signal indicative of an amount of light impinging on the PSs 5212 of the readout-group 5210 when the readout group 5210 is connected to the respective readout circuitry 5242 via at least one of the plurality of switches 5230. It is noted that switches 5232 may be implemented in any suitable switching technology, such as any combination of one or more transistors. Switches 5232 may be implemented as part of FPA 5290, but this is not necessarily so. For example, some or all of switches 5232 may be included in a readout wafer which is electrically (and optionally also physically) connected to FPA 5290. Readout circuits 5242 may be implemented as part of FPA 5290, but this is not necessarily so. For example, some or all of readout circuits 5242 may be included in a readout wafer which is electrically (and optionally also physically) connected to FPA 5290.
In addition, sensor 5200 also includes at least one controller 5250, which is configured and operable to change switching states of the plurality of switches 5230, such that different readout circuits 5242 of the readout-set 5240 are connected out to the readout-group 5210 (i.e., to the PSs 5212 of the readout group 5210) at different times, for exposing different readout circuits 5242 to reflections of illumination light from objects located at different distances from sensor 5200. Illumination light may be emitted by a light source 5260 included in the sensor 5200 or in any electrooptical system in which sensor 5200 is implemented (e.g., a camera, a telescope, a spectrometer). Illumination light may also be emitted by another light source which is associated with sensor 5200 (whether it is controlled by it or by a common controller with it), or by any other light source.
Sensor 5200 also includes a processor 5220 configured to obtain the electric signals from the readout-set 5240 indicative of detected levels of reflected light collected from the IFOVs of the PSs 5212 of the readout-group 5210, for determining depth information for the object, indicative of a distance of the object from the sensor 5200. Such an object may be, for example, tower 5382 in the background of FOV 5390, or tree 5384 in the foreground of FOV 5390. For example, processor 5200 may implement method 5500, or any technique described above (e.g., with respect to
In
For example, at different times during a sampled frame, all of the PSs 5212 may be sequentially connected to one readout circuit 5242 at a time, so that in all times light is collected by all of the PSs 5212 of the readout-group 5210 is measured, but by different readout circuitries 5242 at different times. Such an example is provided in diagram 5410 of
Sensor 5200 is operable to detect depth information of an object in its FOV. it is noted that sensor 5200 may be a variation of any of the sensors discussed above (under any term), with the adaptation discussed below (which include controller 5250 and its functionality, as well as the associated switches). Many of the details, options, and variations discussed above with respect to the different sensors are not repeated, for reasons of brevity, and may be implemented in sensor 5200, mutatis mutandis.
In addition, sensor 5200 may also be operate in other detection modes, providing detection outputs which do not include depth information. For example, in some detection modes sensor 5200 may operate as a camera, providing a 2D image in which different detection values are indicative of amount of light reflected from a part of the FOV within one (or more) detection duration. It is noted that such detection modes may involve active illumination of the FOV, but this is not necessarily so.
Referring to sensor 5200, and to the systems, methods, and sensors discussed with respect to
Referring to all PSs discussed above and throughout the present disclosure, any of those PSs may optionally include a guard ring (not illustrated) or trenching, completely, incompletely, or partly surrounding the PS (or parts thereof). Such partial or complete trenching or guard ring are not illustrated in the diagrams for reasons of clarify and simplicity of the diagrams. Many uses and ways of implementations are known to a person who is of skilled in the art, and are not disclosed here for reasons of brevity.
However, other modifications, variations and alternatives are also possible. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.
In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word ‘comprising’ does not exclude the presence of other elements or steps then those listed in a claim. Furthermore, the terms “a” or “an,” as used herein, are defined as one or more than one. Also, the use of introductory phrases such as “at least one” and “one or more” in the claims should not be construed to imply that the introduction of another claim element by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim element to disclosures containing only one such element, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an.” The same holds true for the use of definite articles. Unless stated otherwise, terms such as “first” and “second” are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other prioritization of such elements. The mere fact that certain measures are recited in mutually different claims does not indicate that a combination of these measures cannot be used to advantage.
While certain features of the disclosure have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will now occur to those of ordinary skill in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the disclosure. It will be appreciated that the embodiments described above are cited by way of example, and various features thereof and combinations of these features can be varied and modified. While various embodiments have been shown and described, it will be understood that there is no intent to limit the disclosure by such disclosure, but rather, it is intended to cover all modifications and alternate constructions falling within the scope of the disclosure, as defined in the appended claims.
This is a 371 application from international patent application PCT/IB2021/061033 filed Nov. 27, 2021, which claims priority from U.S. provisional patent applications No. 63/118,745 filed Nov. 27, 2020, No. 63/136,429, filed Jan. 12, 2021, and No. 63/194,977, filed May 29, 2021.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/IB2021/061033 | 11/27/2021 | WO |
| Number | Date | Country | |
|---|---|---|---|
| 63194977 | May 2021 | US | |
| 63136429 | Jan 2021 | US | |
| 63118745 | Nov 2020 | US |
