Claims
- 1. A device comprising:
a substrate; an AlxGayInzN structure including a n-type layer, a p-type layer, and an active layer, positioned proximate to the substrate; a first mirror stack, interposing the substrate and a bottom side of the AlxGayInzN structure; a wafer bonded interface, interposing the first mirror stack and a selected one of the substrate and AlxGayInzN structure, having a bonding temperature; and a p and an n contact, the p contact electrically connected to the p-type layer, the n contact electrically connected to the n-type layer.
- 2. A device, as defined in claim 1, further comprising:
at least one intermediate bonding layer, adjacent the wafer bonded interface; and one of the intermediate bonding layer and the substrate is selected to be compliant.
- 3. A device, as defined in claim 2, wherein the AlxGayInzN device is a vertical cavity optoelectronic structure.
- 4. A device, as defined in claim 3, wherein the AlxGayInzN device further including a current constriction layer within the p-type layer.
- 5. A device, as defined in claim 2, wherein the substrate is compliant and is selected from a group that includes gallium phosphide (GaP), gallium arsenide (GaAs), indium phosphide (InP), and silicon (Si).
- 6. A device, as defined in claim 2, wherein the intermediate bonding layer is compliant and selected from a group that includes dielectrics and alloys containing halides, ZnO, indium, tin, chrome (Cr), gold, nickel, and copper, and II-VI materials.
- 7. A device, as defined in claim 2, further comprising a second mirror stack positioned adjacent a top side of the AlxGayInzN structure.
- 8. A device, as defined in claim 7, wherein at least one of the first and second mirror stacks is selected from a group that includes dielectric distributed Bragg reflectors and composite distributed Bragg reflectors.
- 9. A device, as defined in claim 1, further comprising a second mirror stack positioned adjacent the AlxGayInzN structure.
- 10. A device, as defined in claim 9, wherein at least one of the first and second mirror stacks is selected from a group that includes dielectric distributed Bragg reflectors and composite distributed Bragg reflectors.
- 11. A device, as defined in claim 1, wherein the AlxGayInzN device further including a current constriction layer within the p-type layer.
- 12. A device, as defined in claim 1, wherein the substrate is compliant and is selected from a group that includes gallium phosphide (GaP), gallium arsenide (GaAs), indium phosphide (InP), and silicon (Si).
- 13. A device, as defined in claim 1, wherein the AlxGayInzN device is a vertical cavity optoelectronic structure.
- 14. A method for fabricating a AlxGayInzN structure, comprising the steps of:
attaching a host substrate to a first mirror stack; fabricating a AlxGayInzN structure on a sacrificial growth substrate; creating a wafer bond interface; removing the sacrificial growth substrate; and depositing electrical contacts to the AlxGayInzN structure.
- 15. A method for fabricating an AlxGayInzN structure, as defined in claim 14, wherein the step for removing the sacrificial growth substrate comprises the step of laser melting.
- 16. A method for fabricating an AlxGayInzN structure, as defined in claim 14, further comprising the step of attaching an intermediate bonding layer at the wafer bond interface.
- 17. A method for fabricating an AlxGayInzN structure, as defined in claim 16, wherein one of the host substrate and the intermediate bonding layer is selected to be compliant.
- 18. A method for fabricating a AlxGayInzN structure, as defined in claim 14, further comprising the step of attaching a second mirror stack on top of the AlxGayInzN structure.
- 19. A method for fabricating a AlxGayInzN structure comprising the steps of:
fabricating a AlxGayInzN structure to a sacrificial growth substrate; attaching a first mirror stack on top of a AlxGayInzN structure; wafer bonding a host substrate to the first mirror stack to create a wafer bond interface; removing the sacrificial growth substrate; and depositing electrical contacts to the AlxGayInzN structure.
- 20. A method for fabricating an AlxGayInzN structure, as defined in claim 19, wherein the step for removing the sacrificial growth substrate comprises the step of laser melting.
- 21. A method for fabricating an AlxGayInzN structure, as defined in claim 19, further comprising the step of attaching an intermediate bonding layer at the wafer bond interface.
- 22. A method for fabricating an AlxGayInzN structure, as defined in claim 19, wherein one of the host substrate and the intermediate bonding layer is selected to be compliant.
- 23. A method for fabricating a AlxGayInzN structure, as defined in claim 19, further comprising the step of attaching a second mirror stack on top of the AlxGayInzN structure.
STATEMENT AS TO RIGHTS UNDER FEDERALLY SPONSORED RESEARCH AND DEVELOPMENT
[0001] This invention was made with government support under Agreement Number MDA972-96-3-0014 awarded by the Defense Advanced Research Projects Agency (DARPA). The Federal Government has certain rights to this invention.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09245435 |
Feb 1999 |
US |
Child |
09923711 |
Aug 2001 |
US |