This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2022-057276, filed on Mar. 30, 2022, the entire contents of which are incorporated herein by reference.
The present invention relates to a microcontroller and an update method for a microcontroller.
Microcontroller units (also referred to below as “MCUs”) start execution of instructions starting with address 0 in a memory space when executing programs. Conventionally, there have been MCUs that use an area where the address 0 exists in the memory space (referred to here as bank0) as a remappable space, and that execute programs while remapping programs to be executed to bank0 as needed.
Japanese Patent Application Laid-Open Publication No. 2012-141667 discloses an interruption control device that can ensure immediate execution of an interruption process in a processor where a plurality of interruption requests share one interruption vector without modifying the processor itself and even if the interruption vector address is stored in a non-writable area.
In updating a program stored in a memory, storing an update program for updating the program in the same memory results in a reduction in usable capacity of the memory.
The present invention takes into consideration this problem, and an object thereof is to provide a microcontroller and an update method for a microcontroller by which it is possible to mitigate a reduction in the usable capacity of a memory, while enabling updating of programs stored in the memory.
One aspect of the present invention provides a microcontroller, including: a memory unit; a processor that reads a program stored in the memory unit from the memory unit and executes a process; a remapping information storage area that stores an address that designates an area to be remapped by the processor; an overwrite flag storage area that stores a flag that determines whether or not to overwrite the program stored in the memory unit; and a reset information storage area to store information for resetting the processor and the remapping information storage area when information indicating resetting of the processor and the remapping information storage area is written to the reset information storage area.
Another aspect of the present invention provides an update method for a microcontroller including: a reset information writing step of writing, to a reset information storage area, information indicating resetting of a processor that executes a process by reading a program stored in a memory unit from the memory unit, and a remapping information storage area that stores an address that designates an area to be remapped by the processor; and a dedicated remapping reset step of resetting the processor and the remapping information storage area based on the information written to the reset information storage area.
According to the present invention, it is possible to provide a microcontroller and an update method for a microcontroller by which it is possible to mitigate a reduction in the usable capacity of a memory, while enabling updating of programs stored in the memory.
Examples of embodiments of the present invention will be explained below with reference to the drawings. The same or equivalent components and portions in the drawings are assigned the same reference characters. The dimensional ratios in the drawings are exaggerated for ease of description, and in some cases differ from the actual ratios.
Before describing in detail an example of an embodiment of the present invention, a comparison example of the embodiment of the present invention will be described below.
As shown in
In the MCU, there are cases in which it is necessary to overwrite a user program stored in the flash ROM for the purpose of updating functions or the like. Below, examples are described of a case in which a user program stored in the flash ROM is overwritten.
In the state shown in
When the flag of the overwrite flag register is set to 1, then as shown in
Next, as shown in
If the flash ROM boot program area is remapped to bank0 and the CPU is reset, then as shown in
When the CPU executes the overwrite program, then as shown in
When overwriting is complete, then as shown in
However, in this configuration, in order to update the user program, an overwriting mode remapping program needs to always be stored in a portion of the RAM area including the SRAM in order to update user programs. This presents the problem that the area of the RAM usable as the working memory for the user program is reduced.
The MCU according to the present embodiment enables the overwriting of a flash ROM without storing an overwriting mode remapping program in a portion of the area of the RAM.
The flash ROM 101 is a rewritable non-volatile memory that stores programs that are read therefrom and executed by the CPU 104. The SRAM 102 is a volatile memory used as the working memory for a program when the CPU 104 executes the program. The flash ROM 101 and the SRAM 102 are examples of memory units of the present invention.
The remapping register 103 is an example of a remapping information storage area of the present invention, and is a register to which an address designating an area to be remapped to bank0 is written. The address of the remapping register 103 is written by the CPU 104 via the data bus 110. The CPU 104 is an example of a processor of the present invention, and reads and executes, via the instruction bus 109, programs stored in the flash ROM 101 and programs stored in the SRAM 102. When reading programs stored in the flash ROM 101, the CPU 104 reads programs remapped to bank0 on the basis of the address stored in the remapping register 103, for example.
The overwrite processing unit 105 is a processor that performs a process of overwriting programs in the flash ROM 101 if a flag for overwriting the flash ROM 101 is set in the overwrite flag register 108. The process of overwriting programs performed by the overwrite processing unit 105 is executed by the CPU 104 issuing an instruction to overwrite the program via the data bus 110. When performing the process to overwrite the program in the flash ROM 101, the overwrite processing unit 105 first deletes the program to be overwritten from the flash ROM 101, and then executes a process to write a new program to the flash ROM 101.
The dedicated remapping reset register 106 is an example of a reset information storage area of the present invention, and is a register to which information for performing a reset dedicated to remapping is written. Information for the dedicated remapping reset register 106 to perform a reset dedicated to remapping is written by the CPU 104 via the data bus 110. By writing a flag of 1 to the dedicated remapping reset register 106, for example, the reset dedicated to remapping is performed. The reset dedicated to remapping refers to resetting the remapping register 103 and the CPU 104 while not resetting the overwrite flag register 108. The dedicated remapping reset register 106 may be constituted of a 1-bit flip-flop, for example. Here, resetting the remapping register 103 refers to overwriting the address stored in the remapping register, and resetting the CPU 104 refers to causing the CPU to execute programs in the memory space starting with bank0. Also, resetting the overwrite flag register refers to overwriting the flag of the overwrite flag register.
The communication I/F 107 communicates with units outside of the MCU 100. For example, the communication I/F 107 receives, from outside of the MCU 100, the overwrite program stored in the flash ROM 101, overwrite instructions for programs in the flash ROM 101, and the like. As a result of the CPU 104 reading, via the data bus 110, programs and instructions received by the communication I/F 107, the CPU 104 recognizes that an overwrite instruction for a program was transmitted from outside.
The overwrite flag register 108 is an example of an overwrite flag storage area of the present invention, and is a register in which a flag for determining whether or not to overwrite a program in the flash ROM 101 is stored. The flag of the overwrite flag register 108 is stored by the CPU 104 via the data bus 110. For example, a flag indicating 1 is stored in the overwrite flag register 108 when overwriting is to be performed, and a flag indicating 0 is stored when overwriting is not to be performed.
By having the above configuration, the MCU 100 according to the embodiment of the present invention can update programs stored in the flash ROM 101 without storing, in the SRAM area, a program for resetting the remapping register 103 and the CPU 104.
Next, the operation of the MCU 100 will be described.
In step S101, when an overwriting instruction for a program and the actual program with which the original program is to be overwritten are transmitted from outside, the CPU 104 writes a flag for overwriting to the overwrite flag register 108 in the following step S102. Here, 1 is written to the overwrite flag register 108 as the flag for overwriting.
In the next step S103, the CPU 104 writes information for performing a reset dedicated to remapping to the dedicated remapping reset register 106. Here, a flag of 1 for performing a reset dedicated to remapping is written to the dedicated remapping reset register 106.
When 1 is written as the flag to the dedicated remapping reset register 106, the MCU 100 resets the CPU 104 and the remapping register 103 in the next step S104. Because 1 is written as a flag to the overwrite flag register 108, the MCU 100 executes overwriting of the program written to the flash ROM 101 in the next step S105.
By the above process, the MCU 100 according to the embodiment of the present invention can update programs stored in the flash ROM 101 without storing, in the SRAM area, a program for resetting the remapping register 103 and the CPU 104, similar to those described in the comparison example. Thus, it is possible to mitigate a reduction in the usable capacity of a memory, while enabling updating of programs stored in the memory.
Also, as a result of the MCU 100 according to embodiment of the present invention executing the above process, it is possible to update programs stored in the flash ROM 101, without jumping to a bank aside from the bank0 and executing the overwriting mode remapping program in the manner described in the comparison example. Thus, it is possible to reduce the time necessary to update programs.
In each of the embodiments above, an aspect was described in which the program for the resetting process is installed in advance in the flash ROM, but the configuration is not limited thereto. The program may be stored in a non-transitory storage medium such as a CD-ROM (compact disc read-only memory), a DVD-ROM (digital versatile disc read-only memory), or a USB (universal serial bus) memory. Alternatively, the program may be downloadable from an external device via a network.
Above, embodiments of the present invention were described in detail with reference to the affixed drawings, but the technical scope of the present invention is not limited to the examples. It is obvious that a person with typical knowledge in the technical field of the present invention could conceive of various modifications or revisions within the scope of the technical concept disclosed in the claims, and any of the various modifications and revisions are naturally understood to belong to the technical scope of the present invention.
Number | Date | Country | Kind |
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2022-057276 | Mar 2022 | JP | national |