The invention generally relates to microphones and, more particularly, the invention relates to MEMS microphones having reduced parasitic capacitance.
A conventional MEMS microphone typically has a static substrate/backplate and a flexible diaphragm that together form a variable capacitor. In operation, audio signals cause the movable diaphragm to vibrate, thus varying the distance between the diaphragm and the backplate and producing a changing capacitance. The backplate often is formed from a portion of a silicon-on-insulator (SOI) wafer or formed on or in a bulk silicon wafer. Current MEMS microphone designs using SOI wafers tend to have a very large backplate area compared to the diaphragm, causing the diaphragm-to-backplate parasitic capacitance to be relatively substantial, e.g., on the order of 730 fF. This parasitic capacitance decreases the sensitivity of the microphone and increases its total harmonic distortion (THD), both of which are key performance parameters for MEMS microphone.
In accordance with one embodiment of the invention, a method of forming a MEMS microphone provides a silicon-on-insulator (SOI) wafer, forms a backplate in a portion of the SOI wafer, and forms a diaphragm adjacent to and movable relative to the backplate. The backplate has at least one trench that substantially circumscribes a central portion of the backplate.
In accordance with another embodiment of the invention, a MEMS microphone includes a SOI wafer, a backplate formed in a portion of the SOI wafer, and a diaphragm adjacent to and movable relative to the backplate. The backplate has at least one trench that substantially circumscribes a central portion of the backplate.
In some embodiments, the diaphragm may have an outer portion and the at least one trench may substantially align with the outer portion of the diaphragm. The diaphragm may have springs formed in an outer portion of the diaphragm. The springs couple the diaphragm to the SOI wafer. The diaphragm may have an area radially inward from the springs and the backplate may have an area radially inward from the at least one trench. The diaphragm area and the backplate area may be substantially the same size. The diameter of the backplate area may be about 12 μm less than or greater than the diameter of the diaphragm area. Tethers may be formed in the backplate. Each tether may be between two adjacent trenches. The tethers couple the backplate area to the SOI wafer. The at least one trench may be filled with a dielectric material. Additional trenches may be formed in the backplate radially outward from the at least one trench. These additional trenches in the backplate may be aligned near the sides of the diaphragm springs.
In accordance with another embodiment of the invention, a method of forming a MEMS microphone forms a backplate in a portion of a SOI wafer and forms a diaphragm adjacent to and movable relative to the backplate. The method further forms springs in an outer portion of the diaphragm. The springs couple the diaphragm to the SOI wafer. The portion radially inward from the springs defines a diaphragm area. The method further forms at least one trench in the backplate that substantially circumscribes a central portion of the backplate. The at least one trench is substantially aligned with a periphery of the diaphragm area. A MEMS microphone may be formed according to this method.
The foregoing features of various embodiments of the invention will be more readily understood by reference to the following detailed description, taken with reference to the accompanying drawings, in which:
In illustrative embodiments, the diaphragm and backplate of a MEMS microphone are configured in such a manner to reduce the parasitic capacitance between these two components. This is accomplished by using at least one trench or gap in the backplate to isolate the active sensing area from the static portion of the backplate. The active backplate sensing area is formed to have about the same size and shape as the movable, inner portion of the diaphragm. This configuration substantially eliminates the parasitic capacitance from the static portion of the backplate, in some embodiments, reducing the current diaphragm-to-backplate parasitic capacitance by as much as seven times, thus increasing the signal sensitivity and reducing the total harmonic distortion (THD) in MEMS microphones. Details of illustrative embodiments are discussed below.
As shown in
In the embodiment shown in
It should be noted that various embodiments are sometimes described herein using words of orientation such as “top,” “bottom,” or “side.” These and similar terms are merely employed for convenience and typically refer to the perspective of the drawings. For example, the substrate 4 is below the diaphragm 14 from the perspective of
In operation, audio signals cause the diaphragm 14 to vibrate, thus varying the distance between the diaphragm 14 and the backplate 12 and producing a changing capacitance. Such audio signals may contact the microphone 10 from any direction. For example, the audio signals may travel upward, first through the backplate 12, and then partially through and against the diaphragm 14. In other embodiments, the audio signals may travel in the opposite direction. Conventional on-chip or off-chip circuitry (not shown) converts this changing capacitance into electrical signals that can be further processed. This circuitry may be secured within the same package as the microphone 10, or within another package. It should be noted that discussion of the specific microphone 10 shown in
As shown, the backplate 12 has a central portion with through-holes 16. The backplate 12 also has a series of trenches 20 that substantially circumscribe the through-holes 16 located in the central portion of the backplate 12. The trenches 20 create an active sensing area 12a located radially inward from the trenches 20, and effectively isolates this backplate area 12a (e.g., diameter d shown in
The backplate 12 also includes tethers 26 that couple the active backplate area 12a to the remaining portion of the backplate 12b and the substrate/SOI wafer 4. The tethers 26 are formed between two adjacent trenches 20 and may extend in a radially outward direction from the backplate area 12a, although other configurations may be used. Preferably, the number of tethers 26 coincides with the number of diaphragm springs 22 (discussed in more detail below), although more or less tethers 26 may be used. The minimum width of each tether 26 (i.e., the distance between adjacent trenches 20) primarily depends on the number of tethers 26 and the intended operating parameters of the microphone 10. The minimum width of each tether 26 should be wide enough to sustain any shock event, such as an overpressure, the microphone 10 may experience. For example, as shown in
The backplate trenches 20 may have any width, w (shown in
As shown in FIGS. 1 and 3-5, the diaphragm 14 has a number of springs 22 formed in an outer portion of the diaphragm 14. The springs 22 movably connect the inner, movable area of the diaphragm 14 to a static/stationary portion 28 of the microphone 10, which includes the substrate/SOI wafer 4. The inner, movable area of the diaphragm 14 is located radially inward from the springs 22 (e.g., diameter d′ shown in
In order to reduce the parasitic capacitance between the backplate 12 and the diaphragm 14, the backplate area 12a is formed to have about the same size and shape as the inner, movable area of the diaphragm 14. For example, a microphone 10 having an inner, movable diaphragm area of about a 500 μm diameter would, preferably, have a backplate area 12a diameter of about 500 μm. However, due to topological variations during processing, the trenches 20 are preferably formed slightly radially inward from the springs 22 in the periphery of the inner, movable area of the diaphragm 14, such as shown in
As shown in
The process begins at step 100, which etches trenches 38 in the top layer of a silicon-on-insulator wafer 4. These trenches 38 ultimately form the backplate through-holes 16 and the one or more trenches or gaps 20 in the backplate 12. In step 102, the process adds sacrificial oxide 42 to the walls of the trenches 38 and along at least a portion of the top surface of the top layer of the SOI wafer 4. Among other ways, this oxide 42 may be grown or deposited.
After adding the sacrificial polysilicon 44, the process etches a hole 46 into the sacrificial polysilicon 44 (step 104, see
Nitride 48 for passivation and metal for electrical connectivity may also be added (see
The process then both exposes the diaphragm 14, and etches holes through the diaphragm 14 (step 108). As discussed below in greater detail, one of these holes (“diaphragm hole 52”) ultimately assists in forming a pedestal 54 that, for a limited time during this process, supports the diaphragm 14. As shown in
After adding the photoresist 56, the process exposes the diaphragm hole 52 (step 112). The process forms a hole (“resist hole 58”) through the photoresist 56 by exposing that selected portion to light (see
After forming the resist hole 58, the process forms a hole 60 through the oxide 42 (step 114). In illustrative embodiments, this oxide hole 60 effectively forms an internal channel that extends to the top surface of the SOI wafer 4.
It is expected that the oxide hole 60 initially will have an inner diameter that is substantially equal to the inner diameter of the diaphragm hole 52. A second step, such as an aqueous HF etch, may be used to enlarge the inner diameter of the oxide hole 60 to be greater than the inner diameter of the diaphragm hole 52. This enlarged oxide hole diameter essentially exposes a portion of the bottom side of the diaphragm 14. In other words, at this point in the process, the channel forms an air space between the bottom side of the diaphragm 14 and the top surface of the backplate 12.
Also at this point in the process, the entire photoresist layer 56 may be removed to permit further processing. For example, the process may pattern the diaphragm 14, thus necessitating removal of the existing photoresist layer 56 (i.e., the mask formed by the photoresist layer 56). Other embodiments, however, do not remove this photoresist layer 56 until step 122 (discussed below).
The process then continues to step 116, which adds more photoresist 56, to substantially fill the oxide and diaphragm holes 60, 52 (see
The embodiment that does not remove the original mask thus applies a sufficient amount of photoresist 56 in two steps (i.e., first the mask, then the additional resist to substantially fill the oxide hole 60), while the embodiment that removes the original mask applies a sufficient amount of photoresist 56 in a single step. In both embodiments, as shown in
In addition, the process may form the backside cavity 18 at this time, such as shown in
At this point, the sacrificial materials may be removed. The process removes the sacrificial polysilicon 44 (step 118, see
As shown in
Stated another way, a portion of the photoresist 56 is within the prior noted air space between the diaphragm 14 and the backplate 12; namely, it interrupts or otherwise forms a part of the boundary of the air space. In addition, as shown in the figures, this photoresist 56 extends as a substantially contiguous apparatus through the hole 52 in the diaphragm 14 and on the top surface of the diaphragm 14. It is not patterned before removing at least a portion of the sacrificial layers. No patterning steps are required to effectively fabricate the microphone 10.
To release the diaphragm 14, the process continues to step 122, which removes the photoresist 56/pedestal 54 in a single step, such as shown in
It should be noted that a plurality of pedestals 54 may be used to minimize the risk of stiction between the backplate 12 and the diaphragm 14. The number of pedestals used is a function of a number of factors, including the type of wet etch resistant material used, the size and shape of the pedestals 54, and the size, shape, and composition of the diaphragm 14. Discussion of a single pedestal 54 therefore is for illustrative purposes.
The process may then complete fabrication of the microphone 10. Specifically, among other things, the microphone 10 may be tested, packaged, or further processed by conventional micromachining techniques. To improve fabrication efficiency, illustrative embodiments of the invention use batch processing techniques to form the MEMS microphone 10. Specifically, rather than forming only a single microphone, illustrative embodiments simultaneously form a two dimensional array of microphones on a single wafer. Accordingly, discussion of this process with a single MEMS microphone is intended to simplify the discussion only and thus, not intended to limit embodiments to fabricating only a single MEMS microphone 10.
As described herein, embodiments using a backplate 12 having one or more trenches 20 that substantially circumscribe a central portion of the backplate 12 substantially reduce the diaphragm-to-backplate parasitic capacitance by isolating the active sensing area 12a from the static portion of the backplate 12b. This configuration increases the signal sensitivity and reduces the THD in MEMS microphones.
Although the above discussion discloses various exemplary embodiments of the invention, it should be apparent that those skilled in the art can make various modifications that will achieve some of the advantages of the invention without departing from the true scope of the invention.
The present application is a continuation-in-part of U.S. patent application Ser. No. 12/133,599 filed Jun. 5, 2008, entitled MICROPHONE WITH ALIGNED APERTURES, which claims priority to U.S. provisional patent application Ser. No. 60/942,315, filed Jun. 6, 2007, entitled MICROPHONE WITH ALIGNED APERTURES, each disclosure of which is incorporated herein by reference in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
5870482 | Loeppert et al. | Feb 1999 | A |
7346178 | Zhe et al. | Mar 2008 | B2 |
7838323 | Utsumi et al. | Nov 2010 | B2 |
7839052 | Wu et al. | Nov 2010 | B2 |
Number | Date | Country | |
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20090202089 A1 | Aug 2009 | US |
Number | Date | Country | |
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60942315 | Jun 2007 | US |
Number | Date | Country | |
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Parent | 12133599 | Jun 2008 | US |
Child | 12411768 | US |