Claims
- 1. A multifunction modulator circuit comprising:
- means for splitting an electromagnetic signal into two component signals;
- means for inducing a phase quadrature relationship between the two component signals;
- means for adjusting the amplitude of each of the two component signals through a range of values including both positive and negative values; and
- summing means for vectorially combining said two component signals to provide a modified signal;
- wherein said adjusting means comprises a first circuit cell operative with a first of said component signals in response to a first control signal, and a second circuit cell operative with a second of said component signals in response to a second control signal, each of said circuit cells having a four-terminal device comprising:
- a first terminal for receiving one of said component signals, a second terminal to be loaded with a load; a third terminal for outputting a reflected signal to said summing means, and a fourth terminal to be loaded with a load, wherein a magnitude and a sense of said reflected signal depends on a loading of said second terminal and a loading of said fourth terminal, said reflected signal being proportional to said one of said component signals received at said first terminal; and
- means responsive to one of said control signals for loading said second and said fourth terminals with a load to provide the magnitude and the sense of said reflected signal;
- wherein in said first circuit cell said four-terminal device is a Lange coupler, said loading means comprises a first field effect transistor coupled to said second terminal and a second field effect transistor coupled to said fourth terminal, each of said transistors of said first circuit cell being biased with said first control signal to serve as a resistor, said first circuit cell having a first bias resistor and a second bias resistor connected respectively to gate terminals of said first and said second transistors for applying said first control signal to said first and said second transistors;
- in said second circuit cell said four-terminal device is a Lange coupler, said loading means comprises a first field effect transistor coupled to said second terminal and a second field effect transistor coupled to said fourth terminal, each of said transistors of said second circuit cell being biased with said second control signal to serve as a resistor, said second circuit cell having a first bias resistor and a second bias resistor connected respectively to gate terminals of said first and said second transistors for applying said second control signal to said first and said second transistors; and
- in each of said first and second circuit cells, resistances of said first and second bias resistors have values greater by an order of magnitude than a characteristic impedance of transmission lines of said first and second circuit cells.
- 2. A modulator circuit according to claim 1 wherein said modified signal is a phase shifted signal.
- 3. A modulator circuit according to claim 1 further comprising an input Lange coupler, wherein said splitting means and said phase quadrature inducing means are included within said input Lange coupler.
- 4. A modulator circuit according to claim 3 wherein said summing means comprises a Wilkinson coupler.
- 5. A modulator circuit according to claim 1 wherein said splitting means comprises a Wilkinson coupler.
- 6. A modulator circuit according to claim 5 further comprising an output Lange coupler, wherein said summing means and said quadrature means are included within said output Lange coupler.
- 7. A modulator circuit according to claim 1 wherein said modified signal can be represented by a vector having any direction within a range of 360 degrees, said modified signal being a phase shifted signal; and wherein said first control signal has a constant value and said second control signal has a constant value to provide said phase shifted signal.
- 8. A modulator circuit according to claim 1 wherein said modified signal is an attenuated signal.
- 9. A modulator circuit according to claim 1 wherein said modified signal has phase modulation.
- 10. A modulator circuit according to claim 1 wherein said modified signal has amplitude modulation.
- 11. A modulator circuit according to claim 1 wherein said modified signal is a single side-band frequency converted signal.
- 12. A modulator circuit according to claim 1 wherein said modified signal can be represented by a vector having any direction within a range of 360 degrees, said modified signal being an attenuated signal; wherein
- said first control signal has a constant value and said second control signal has a constant value to provide said attenuated signal.
- 13. A modulator circuit according to claim 1 wherein said modified signal can be represented by a vector having any direction within a range of 360 degrees, said modified signal being a modulated signal having phase and amplitude modulation; wherein
- said first control signal has a time-varying value and said second control signal has a time-varying value to provide said modulated signal.
- 14. A modulator circuit according to claim 1 wherein said modified signal can be represented by a vector having any direction within a range of 360 degrees, said modified signal being a single side-band frequency converted signal; wherein
- said first control signal is a sinusoid and said second control signal is a sinusoid in phase quadrature with said first control signal to provide said frequency-converted signal.
- 15. A method of operating a multifunction modulator circuit comprising the steps of:
- splitting an electromagnetic signal into two component signals;
- inducing a phase quadrature relationship between the two component signals;
- adjusting the amplitude of each of the two component signals through a range of values including both positive and negative values;
- combining said component signals by a vectorial summation to provide a modified signal;
- wherein said adjusting step comprises applying a first of the component signals to a first circuit cell and a second of the component signals to a second circuit cell; and
- in each of the respective circuit cells, processing the respective component signal by transmitting the component signal through a Lange coupler, loading the Lange coupler with a field effect transistor which presents an impedance to the Lange coupler, and regulating the impedance by a control signal at a gate terminal of the transistor;
- wherein said step of regulating the impedance comprises a step of connecting the control signal via a bias resistor to the gate terminal of the transistor in a respective one of the circuit cells, and a further step of providing to the bias resistor a resistance having a value greater by an order of magnitude than a characteristic impedance of a transmission line in said respective one of the circuit cells.
- 16. A multifunction modulator circuit comprising:
- means for splitting an electromagnetic signal into two component signals;
- means for inducing a phase quadrature relationship between the two component signals;
- means for adjusting the amplitude of each of the two component signals through a range of values including both positive and negative values; and
- summing means for vectorially combining said two component signals to provide a modified signal;
- wherein said adjusting means comprises a first circuit cell operative with a first of said component signals in response to a first control signal, and a second circuit cell operative with a second of said component signals in response to a second control signal, each of said circuit cells having a four-terminal device comprising:
- a first terminal for receiving one of said two component signals, a second terminal to be loaded with a load; a third terminal for outputting a reflected signal to said summing means, and a fourth terminal to be loaded with a load, wherein a magnitude and a sense of said reflected signal depends on a loading of said second terminal and a loading of said fourth terminal, said reflected signal being proportional to said one of said two component signals received at said first terminal; and
- means responsive to one of said first and second control signals for loading said second and said fourth terminals with a load to provide the magnitude and the sense of said reflected signal;
- wherein in said first circuit cell said four-terminal device is a coupler for the electromagnetic signal, said loading means comprises a first transistor coupled to said second terminal and a second transistor coupled to said fourth terminal, each of said transistors of said first circuit cell being biased with said first control signal to serve as a resistor, said first circuit cell having a first bias resistor and a second bias resistor connected respectively to gate terminals of said first and said second transistors for applying said first control signal to said first and said second transistors; and
- in said second circuit cell said four-terminal device is a coupler for the electromagnetic signal, said loading means comprises a first transistor coupled to said second terminal and a second transistor coupled to said fourth terminal, each of said transistors of said second circuit cell being biased with said second control signal to serve as a resistor, said second circuit cell having a first bias resistor and a second bias resistor connected respectively to gate terminals of said first and said second transistors for applying said second control signal to said first and said second transistors; and
- in each of said cells, resistances of said first and second bias resistors have values greater by an order of magnitude than a characteristic impedance of transmission lines of said first and second circuit cells.
Parent Case Info
This is a continuation of application Ser. No. 07/977,679 filed on Nov. 18, 1992, now abandoned.
US Referenced Citations (19)
Foreign Referenced Citations (3)
Number |
Date |
Country |
2056347 |
May 1971 |
DEX |
59-100601 |
Sep 1984 |
JPX |
61-222309 |
Feb 1986 |
JPX |
Continuations (1)
|
Number |
Date |
Country |
Parent |
977679 |
Nov 1992 |
|