MONOLITHIC INTEGRATED CIRCUIT OF A FIELD-EFFECT SEMICONDUCTOR DEVICE AND A DIODE

Abstract

A field-effect semiconductor device such as a HEMT or MESFET is monolithically integrated with a Schottky diode for feedback, regeneration, or protection purposes. The field-effect semiconductor device includes a main semiconductor region having formed thereon a source, a drain, and a gate between the source and the drain. Also formed on the main semiconductor region, preferably between gate and drain, is a Schottky electrode electrically coupled to the source. The Schottky electrode provides a Schottky diode in combination with the main semiconductor region. A current flow is assured from Schottky electrode to drain without interruption by a depletion region expanding from the gate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic sectional view of a monolithic combination of a HEMT and a Schottky diode built on the novel principles of the present invention.

FIG. 2 is a top plan view of the HEMT/diode combination of FIG. 1.

FIG. 3 is an equivalent circuit diagram of the HEMT/diode combination of FIG. 1.

FIG. 4 is a schematic sectional view of a monolithic combination of a normally-off HEMT and a Schottky diode embodying the principles of the invention, shown together with a schematic diagram of associated initialization and power supply circuitry.

FIG. 5 is a block diagram showing in more detail the initializer circuit included in the initialization and power supply circuitry of FIG. 4.

FIG. 6, consisting of (A) and (B), is a diagram of waveforms useful in explaining how the HEMT/diode combination of FIG. 4 is initialized by the initializer circuit of FIG. 5.

FIG. 7 is a view similar to FIG. 4 but showing another preferred monolithic combination of a normally-off HEMT and a Schottky diode embodying the invention.

FIG. 8 is also a view similar to FIG. 4 but showing a monolithic combination of a normally-off MESFET and a Schottky diode embodying the invention.

FIG. 9 shows an equivalent circuit diagram of the embodiments of FIGS. 4, 7 and 8.

FIG. 10 is a top plan view showing an alternative shape and position of a Schottky electrode on the main semiconductor region according to the position.

Claims

1. A monolithic integrated circuit of a field-effect semiconductor device and a Schottky diode, comprising: (a) a main semiconductor region having a major surface;(b) a source on the major surface of the main semiconductor region;(c) a drain on the major surface of the main semiconductor region spaced from the source;(d) gate means interposed between the source and the drain on the major surface of the main semiconductor region; and(e) a Schottky electrode formed on the major surface of the main semiconductor region in Schottky contact therewith in order to provide a Schottky diode in combination with the main semiconductor region, the Schottky electrode being positioned away from the source across at least the gate means and electrically coupled to the source.

2. The monolithic integrated circuit as recited in claim 1, wherein the Schottky electrode is wholly positioned between the gate means and the drain.

3. The monolithic integrated circuit as recited in claim 1, wherein the Schottky electrode encircles the drain.

4. The monolithic integrated circuit as recited in claim 1, wherein the main semiconductor region comprises two contiguous semiconductor layers having different band gaps to provide a two-dimensional carrier gas layer as a channel between the source and the drain.

5. The monolithic integrated circuit as recited in claim 1, wherein the main semiconductor region comprises an active layer itself providing a channel between the source and the drain.

6. The monolithic integrated circuit as recited in claim 1, wherein the gate means comprises a gate electrode in Schottky contact with the major surface of the main semiconductor region.

7. The monolithic integrated circuit as recited in claim 1, wherein the gate means comprises: (a) a gate insulator; and(b) a gate electrode in contact with the major surface of the main semiconductor region via the gate insulator.

8. The monolithic integrated circuit as recited in claim 1, wherein the gate means comprises: (a) first insulating means on the major surface of the main semiconductor region;(b) a carrier storage on the first insulating means, the carrier storage being capable of accepting and storing carriers;(f) second insulating means on the carrier storage; and(g) a gate electrode on the second insulating means;(h) the carrier storage being capable of storing carriers to such an extent that the source and the drain are held electrically disconnected from each other even without application of a bias voltage to the gate electrode.

9. A monolithic integrated circuit of a normally-off field-effect semiconductor device and a Schottky diode, comprising: (a) a main semiconductor region having a major surface;(b) a source on the major surface of the main semiconductor region;(c) a drain on the major surface of the main semiconductor region spaced from the source;(d) first insulating means on the major surface of the main semiconductor region and between the source and the drain;(e) a carrier storage on the first insulating means, the carrier storage being capable of accepting and storing carriers;(f) second insulating means on the carrier storage;(g) a gate on the second insulating means, the carrier storage having carriers stored therein to such an extent that the source and the drain are held electrically disconnected from each other even without application of a bias voltage to the gate; and(h) a Schottky electrode formed on the major surface of the main semiconductor region in Schottky contact therewith in order to provide a Schottky diode in combination with the main semiconductor region, the Schottky electrode being positioned away from the source across at least the gate and electrically coupled to the source.

10. The monolithic integrated circuit as recited in claim 9, further comprising initializer means for initializing the field-effect semiconductor device by causing the carrier storage to store a sufficient amount of carriers for normally-off operation of the device.

11. The monolithic integrated circuit as recited in claim 10, wherein the initializer means comprises means for applying between the gate and the source an initializer voltage which is higher than a gate-source voltage to be applied therebetween in order to turn the device on in normal operation, thereby causing carriers to be stored in the carrier storage to such an extent that the source and the drain are held electrically disconnected from each other even without voltage application to the gate.

12. The monolithic integrated circuit as recited in claim 11, wherein the initializer means further comprises means for ascertaining, after application of the initializer voltage, whether the carrier storage has stored therein a sufficient amount of carriers to hold the source and the drain electrically disconnected from each other even without voltage application to the gate.

13. The monolithic integrated circuit as recited in claim 10, wherein the initializer means comprises: (a) an initializer pulse generator for applying between the gate and the source any required number of initializer pulses of greater amplitude than a gate voltage to be applied therebetween in order to turn the device on in normal operation and hence for causing carriers to be stored in the carrier storage; and(b) means for ascertaining, after application of each initializer pulse, whether the carrier storage has stored therein a sufficient amount of carriers to hold the source and the drain electrically disconnected from each other even without voltage application to the gate.

14. The monolithic integrated circuit as recited in claim 13, wherein the ascertaining means of the initializer means comprises: (a) a first threshold pulse generator for applying between the gate and the source a first threshold pulse representative of one limit of a target range in which the threshold of the device is desired to be;(b) a second threshold pulse generator for applying between the gate and the source a second threshold pulse representative of another limit of the target threshold range; and(c) means for finding whether the device has turned on or off upon application of each of the first and the second threshold pulse.