Claims
- 1. A MOSFET structure comprising:
- a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region;
- a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region;
- a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region; and
- a blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region,
- wherein said source region, said drain region, said tip region and said buried region are all p-type regions.
- 2. A MOSFET structure comprising:
- a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region;
- a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region;
- a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region; and
- a blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region,
- wherein said source region, said drain region, said tip region, and said buried region are all n-type regions.
- 3. A MOSFET structure as recited in claim 2 wherein said blocking region is an n-type region.
- 4. A MOSFET structure comprising:
- a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region;
- a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region;
- a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region, said source, drain, tip and buried regions being n-type regions; and
- a substantially intrinsic blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region.
- 5. A MOSFET structure comprising:
- a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region;
- a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region;
- a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region, said source, drain, tip and buried regions being n-type regions; and
- a p-type blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region.
CROSS REFERENCE TO RELATED APPLICATION
This is a division of application Ser. No. 926,318, filed 10/31/86 now U.S. Pat. No. 4,746,624.
US Referenced Citations (3)
Divisions (1)
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Number |
Date |
Country |
Parent |
926318 |
Oct 1986 |
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