Patent Application
20200236823
The present invention relates generally to a device and a method for controlling the temperature of a multi-die power module.
Due to limitations in semiconductor manufacturing processes, there is a practical limit in the total semiconductor area for a single power die. Hence, a high power module typically contains several dies in parallel to achieve a given current rating.
However, due to non-ideal constraints on geometry and electrical parameter variations, the temperature distribution within the set of parallel dies is typically non-uniform. As a consequence, the hottest die limits the total amount of power the module can dissipate and the non-uniform temperature distribution causes unequal aging of each die, limiting the effectiveness of using parallel devices.
The present invention aims to allow a temperature control of a multi-die power module that is reliable using a closed-loop temperature control in order to increase the lifespan of the multi-die power module by reducing local hot spot temperatures.
To that end, the present invention concerns a method for controlling the temperature of a multi-die power module comprising plural dies, a multi-die temperature control device receiving an input signal and driving independantly the dies of the multi-die power module, characterized in that the method is executed by the multi-die temperature control device and comprises the steps of:
obtaining a signal that is representative of the temperature of one die among the dies of the multi-die power module when the die is not conducting,
obtaining signals that are representative of a reference temperature that is dependent of the temperature of all the dies of the multi-die power module when the dies are not conducting,
comparing the signal that is representative of the temperature of one die to the signal that is representative of the reference temperature,
reducing the duration of the conducting time of the die or reducing the duration of the conducting time of the other dies of the multi-die power module according to the comparison result.
The present invention concerns also a multi-die temperature control device that controls the temperature of a multi-die power module comprising plural dies, the multi-die temperature control device receiving an input signal and driving independantly the dies of the multi-die power module, characterized in that the multi-die temperature control device comprises:
means for obtaining a signal that is representative of the temperature of one die among the dies of the multi-die power module when the die is not conducting,
means for obtaining signals that are representative of a reference temperature that is dependent of the temperature of all the dies of the multi-die power module when the dies are not conducting,
means for comparing the signal that is representative of the temperature of one die to the signal that is representative of the reference temperature,
means for reducing the duration of the conducting time of the die or reducing the duration of the conducting time of the other dies of the multi-die power module according to the comparison result.
Thus, the multi-die temperature control device is able to balance the temperatures across the set of parallel dies independently of the loading condition and without any additional sensors.
According to a particular feature, the input signal is a pulse width modulated signal composed of consecutive periodic cycles of time and the signal that is representative of the temperature of one die among the dies of the multi-die power module and the signal that is representative of the reference temperature are obtained within the same cycle of time.
Thus, the multi-die temperature control device is able to compare the temperature of one die to the most recent reference temperature. The multi-die temperature control device operation can be updated independantly of the number of dies in the system and load condition.
According to a particular feature, the signal that is representative of the temperature of one die and the signal that is representative of the reference temperature are obtained by providing a current to the gate of the die and to the gates of the dies.
Thus, only one circuit is necessary to acquire the temperature of one die and the reference temperature. A low cost and simple method for sensing the temperature can be easily integrated into gate drivers for power devices.
According to a particular feature, the signal that is representative of the reference temperature is representative of an equivalent resistor value of the internal gate resistor values of the dies put in parallel.
Thus, the reference temperature is a value close to the mean temperature of the power devices put in parallel. The reference temperature can be deduced without any further complex calculations.
The characteristics of the invention will emerge more clearly from a reading of the following description of example embodiments, the said description being produced with reference to the accompanying drawings.
The multi-die power module 15 comprises N dies noted D1 to DN. Each resistor R1 to RN is representative of an equivalent internal gate resistor of dies D1 to DN.
The multi-die temperature control device 10 receives an input signal IN and drives independently the dies D1 to DN through respective amplifiers 1101 to 110N. The amplifiers 1101 to 110N further comprise die temperature sensing means.
The multi-die temperature control device 10 uses a closed-loop temperature control that can be either relative or absolute temperature from the dies D1 to DN in order to increase the lifespan of the multi-die power module 15 by reducing local hot spot temperatures.
According to the present invention, a reference temperature and an individual die temperature are determined in a single pulse width modulation cycle. The reference temperature and the individual die temperature are used for controlling the temperature of the dies D1 to DN of the multi-die power module 15.
The resistors R1 to RN are respectively the internal gates of the dies D1 to DN.
The temperatures are derived according to an internal gate resistance measurement technique, which depends on using the internal gate resistance of the dies within the power module as a temperature sensitive parameter.
According to the present invention, the reference temperature is derived from an equivalent resistor value of the internal gate resistor values of the dies put in parallel and may be considered as an approximate average temperature of the dies D1 to DN.
The internal gate resistance R of a die can be approximated as R=a*t+b where a and b are contants, according to a calibrated table of values relating the temperature to the resistance, b>>a and t is the temperature of the die. For example, a=0.003 Ω/°C. and b=13 Ω, for a modern IGBT power device.
The reference temperature is determined as the mean of the voltages Tj,1 to Tj,N measured using a current I1 to IN passing through the internal gate resistor of the dies D1 to DN when all the dies D1 to DN are not conducting, i.e. the measurement is performed by measuring the equivalent resitor value of the internal gate resistors put in parallel.
The reference temperature is determined when all the dies D1 to DN are not conducting, i.e. in a OFF state.
Since practical power electronic converters feature periods of inactivity during the commutation cycle, this allows for the generation of the reference temperature point without interrupting of the converter.
The individual temperature of a die Dn is determined when the die Dn is not conducting and all the other dies are conducting, i.e. in a ON state.
The multi-die temperature controller 10 provides respectively a current I1 to IN to each amplifier 1101 to 110N that comprise the die temperature sensing means.
The multi-die temperature controller 10 activates the temperature sensing means with the measurement signals M1 to MN.
The multi-die temperature controller 10 provides gate signals PW1 to PWN to each die D1 to DN.
The multi-die temperature controller 10 receives signals Tj,1 to Tj,N representative of the temperature of each die D1 to DN. The mean of the signals Tj,1 to Tj,N is calculated and provided to an analogue to digital converter comprised in an I/O interface of the multi-die temperature control device.
According to the invention, the multi-die temperature control device controls the temperature of a multi-die power module comprising plural dies, the multi-die temperature control device receives an input signal and drives independantly the dies of the multi-die power module. The multi-die temperature control device comprises:
means for obtaining a signal that is representative of the temperature of one die among the dies of the multi-die power module when the die is not conducting,
means for obtaining signals that are representative of a reference temperature that is dependent of the temperature of all the dies of the multi-die power module when the dies are not conducting,
means for comparing the signal that is representative of the temperature of one die to the signal that is representative of the reference temperature,
means for reducing the duration of the conducting time of the die or reducing the duration of the conducting time of the other dies of the multi-die power module according to the comparison result.
The pulse width modulated signal PWn received by the amplifier including temperature sensing means 110n with n=1 to N is provided to the gates of transistors T1n and T2n.
The drain of the transistor T1n is connected to a positive power supply Vdd, the source of the transistor T1n is connected to a first terminal of a resistor R1n. A second terminal of the resistor R1n is connected to a first terminal of the internal gate resistor Rn.
The source of the transistor T2n is connected to a first terminal of a resistor R2n. A second terminal of the resistor R2n is connected to a first terminal of the internal gate resistor Rn.
The drain of the transistor T2n is connected to the drain of a transistor T3n and to an anode of a diode Din and the voltage at that point noted Tj,n is dependent of the resistor of the internal gate resistor of the die Dn that varies according to temperature. The source of the transistor T3n is connected to a negative power supply Vss.
The signal Mn which activates the measurement of the die Dn temperature is provided to the gate of the transistor T3n.
The current In provided to the amplifier including temperature sensing means 110n is provided to the anode of the diode Din.
The cathode of the diode Din is connected to a voltage Vclamp, which limits the voltage Tj,n. The mean of the voltages Tj,1 to Tj,N is provided to the input of the analogue to digital converter that is comprised in the I/O interface of the multi-die temperature controller 10.
The current dispaching means is comprised in the I/O interferface of the multi-die temperature controller 10 that will be disclosed hereinafter.
The current dispatching means provide a current I1 to IN to the amplifiers including temperature sensing means 1101 to 110N.
When the temperature of a single die Dn is sensed, the current I is the equal to the current In provided to the die Dn.
When the reference temperature is sensed, the current I is the equal to the sum of currents I1 to IN provided to the dies D1 to DN.
The multi-die temperature control device 10 has, for example, an architecture based on components connected together by a bus 401 and a processor 400 controlled by a program as disclosed in
The bus 401 links the processor 400 to a read only memory ROM 402, a random access memory RAM 403 and an input output I/O IF interface 405.
The memory 403 contains registers intended to receive variables and the instructions of the program related to the algorithm as disclosed in
The processor 400 receives through the input output I/O IF 405 measurement of the junction temperatures Tj,1 to Tj,N of the dies D1 to D6, an input signal IN and outputs the pulse width modulated signals PW1 to PWN, the measurement signal M1 to Mn and the current I1 to IN.
The read-only memory, or possibly a Flash memory 402, contains instructions of the program related to the algorithm as disclosed in
The multi-die temperature control device 10 may be implemented in software by execution of a set of instructions or program by a programmable computing machine, such as a PC (Personal Computer), a DSP (Digital Signal Processor) or a microcontroller; or else implemented in hardware by a machine or a dedicated component, such as an FPGA (Field-Programmable Gate Array) or an ASIC (Application-Specific Integrated Circuit).
In other words, the multi-die temperature control device 10 includes circuitry, or a device including circuitry, enabling the multi-die temperature control device 10 to perform the program related to the algorithm as disclosed in
According to the present invention, within one cycle 50, the multi-die temperature controller 10 commands one amplifier including temperature sensing means 110n by providing a measurement signal Mn during a time period 51 in order to measure the internal gate resistor Rn value that is dependent of the temperature of the die Dn. At the same time, the multi-die temperature controller 10 provides a pulse width modulated signal PWn to the amplifier including temperature sensing means 110n that puts the die Dn in a non conducting state during the time period 51 whereas all the other dies are in a conducting state.
Within the same cycle 50, the multi-die temperature controller 10 commands all the amplifiers including temperature sensing means 1101 to 110N by providing a measurement signal M1 to MN during a time period 52 in order to measure the equivalent resistor value of the internal gate resistor values R1 to RN put in parallel that are dependent of the temperature of the dies D1 to DN. At least during the same time period 52, the multi-die temperature controller 10 provides a pulse width modulated signal PW1 to PWN to the amplifiers including temperature sensing means 1101 to 110N that puts the dies D1 to DN in a non conducting state at least during the time period 52.
Within the cycle 50a, the multi-die temperature controller 10 commands one amplifier including temperature sensing means 1101 by providing a measurement signal M1 during the time period 51a in order to measure the internal gate resistor R1 value that is dependent of the temperature of the die D1. At the same time, the multi-die temperature controller 10 provides a pulse width modulated signal PW1 to the amplifier including temperature sensing means 1101 that puts the die D1 in a non conducting state during the time period 51a whereas all the other dies D2 to DN are in a conducting state.
Within the cycle 50a, the multi-die temperature controller 10 commands all the amplifiers including temperature sensing means 1101 to 110N by providing a measurement signal M1 to MN during a time period 52a in order to measure the equivalent resistor value of the internal gate resistor values R1 to RN put in parallel that are dependent of the temperature of the dies D1 to DN. At least during the same time period 52a, the multi-die temperature controller 10 provides a pulse width modulated signal PW1 to PWN to the amplifiers including temperature sensing means 1101 to 110N that put the dies D1 to DN in a non conducting state at least during the time period 52a.
Within the cycle 50b, the multi-die temperature controller 10 commands one amplifier including temperature sensing means 110N by providing a measurement signal MN during the time period 51b in order to measure the internal gate resistor RN value that is dependent of the temperature of the die DN. At the same time, the multi-die temperature controller 10 provides a pulse width modulated signal PWN to the amplifier including temperature sensing means 110N that puts the die DN in a non conducting state during the time period 51b whereas all the other dies D1 to DN−1 are in a conducting state.
Within the cycle 50b, the multi-die temperature controller 10 commands all the amplifiers including temperature sensing means 1101 to 110N by providing a measurement signal M1 to MN during a time period 52b in order to measure the equivalent resistor value of the internal gate resistor values R1 to RN put in parallel that are dependent of the temperature of the dies D1 to DN. At least during the same time period 52b, the multi-die temperature controller 10 provides a pulse width modulated signal PW1 to PWN to the amplifiers including temperature sensing means 1101 to 110N that put the dies D1 to DN in a non conducting state at least during the time period 52b.
Within the cycle 50c, the multi-die temperature controller 10 commands one amplifier including temperature sensing means 110n by providing a measurement signal Mn during the time period 51c in order to measure the internal gate resistor Rn value that is dependent of the temperature of the die Dn. At the same time, the multi-die temperature controller 10 provides a pulse width modulated signal PWn to the amplifier including temperature sensing means 110n that puts the die Dn in a non conducting state whereas all the other dies are in a conducting state.
Within the cycle 50c, the multi-die temperature controller 10 commands all the amplifiers including temperature sensing means 1101 to 110N by providing a measurement signal M1 to MN during a time period 52c in order to measure the equivalent resistor value of the internal gate resistor values R1 to RN put in parallel that are dependent of the temperature of the dies D1 to DN. At least during the same time period 52c, the multi-die temperature controller 10 provides a pulse width modulated signal PW1 to PWN to the amplifiers including temperature sensing means 1101 to 110N that put the dies D1 to DN in a non conducting state at least during the time period 52c.
The present algorithm will be disclosed in an example wherein it is executed by the processor 400 of the multi-die temperature controller 10.
At step S60, the processor 400 commands the generation of a measurement signal command the I/O interface 405 in order to perform a measurement of the internal gate resistor value that is dependent of the temperature of the die Dn.
The processor 400 commands the I/O interface 405 in order to transfer a pulse width modulated signal PWn that is at low level at least during the time period 51 and commands the I/O interface 405 in order to transfer a measurement signal PWn that enables the current In to flow through the internal gate resistor of the die Dn whereas all the other dies are in a conducting state.
The processor 400 commands an analogue to digital converter comprised in the I/O interface 405 in order to sample the voltage value Tj,n after a time period which is for example equal to the half of the duration of the time period 51.
At next step S61, the processor 400 memorizes the sampled voltage into the memory 403.
At next step S62, the processor 400 commands the generation of a measurement signals command the I/O interface 405 in order to perform a measurement of the reference temperature that is representative of the equivalent resistor value of the internal gate resistor values put in parallel that is dependent of the temperatures of the dies Dn to Dn.
The multi-die temperature controller 10 commands all the amplifiers including temperature sensing means 1101 to 110N by providing a measurement signal M1 to MN during a time period 52 in order to measure the equivalent resistor value of the internal gate resistor values R1 to RN put in parallel that is dependent of the temperature of the dies D1 to DN. At least during the same time period 52, the multi-die temperature controller 10 commands the I/O interface in order to provide a pulse width modulated signal PW1 to PWN to the amplifiers including temperature sensing means 1101 to 110N that puts the dies D1 to DN in a non conducting state at least during the time period 52.
The processor 400 commands the analogue to digital converter comprised in the I/O interface 405 in order to sample the average value of the voltage values Tj,1 to Tj,N after a time period which is for example equal to the half of the duration of the time period 52.
At next step S63, the processor 400 memorizes the sampled average voltage value into the memory 403.
At next step S64, the processor 400 updates the pulse width modulated signal PWn signal to be provided to the die Dn by comparing the values stored at steps S61 and S63.
For example, if the value Tj,n is higher than the reference value, the processor 400 reduces the duration of the conducting time of the die Dn during at least one pulse width modulated cycle.
For example, if the value Tj,n is lower than the reference value, the processor 400 decreases the duration of the conducting time of the dies D1 to Dn−1 and Dn+1 to DN during at least 1 pulse width modulated cycle.
At next step S65, the processor 400 selects another die that is different from the die Dn and returns to step S60.
Naturally, many modifications can be made to the embodiments of the invention described above without departing from the scope of the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 17164063.4 | Mar 2017 | EP | regional |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2018/008879 | 3/1/2018 | WO | 00 |
