Multiprocessor system and its operational method

Information

  • Patent Application
  • 20070174557
  • Publication Number
    20070174557
  • Date Filed
    January 24, 2007
    17 years ago
  • Date Published
    July 26, 2007
    17 years ago
Abstract
The multiprocessor system includes multiple cells having identical functions, and each of the multiple cells has a processor, a cache memory, and a main memory. The multiple cells include the first cell as a request cell, the second cell as a home cell, and the third cell as an owner cell. The latest version of the target data stored in the main memory of the second cell is stored in the cache memory of the third cell. When the first cell issues a read request for the target data to the second cell, the second cell issues a snoop request to the third cell in response to the read request. The third cell directly transmits the target data to the first cell in response to the snoop request. Also, the third cell issues the reply write back to the second cell in response to the snoop request. The first cell issues a request write back to the same address as that of the target data in the second cell. The second cell discards the reply write back when the reply write back from the third cell is received later than the request write back from the first cell.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a block diagram showing a configuration of the distributed shared memory type multiprocessor system.



FIG. 2 is a conceptual view showing operations of the conventional multiprocessor system.



FIG. 3 is a conceptual view showing operations of the conventional multiprocessor system.



FIG. 4 is a conceptual view showing operations of the multiprocessor system of the present invention.



FIG. 5 is a table showing an example of the information stored in the directory concerned in the embodiment of the present invention.



FIG. 6 is a block diagram showing a configuration of the cache coherency circuit concerned in the present embodiment.



FIG. 7 is a block diagram showing a configuration of the main pipe unit concerned in the present embodiment.



FIG. 8 is a table showing an example of the snoop management table concerned in the present embodiment.



FIG. 9 is a table showing an abstract of the method of updating the directory concerned in the present embodiment.



FIG. 10 is a diagram showing an example of the operational flow of the multiprocessor system concerned in the present embodiment.



FIG. 11 shows cache statuses, a snoop management table and a table showing transition of the information stored in the directory.


Claims
  • 1. A multiprocessor system comprising: multiple cells respectively including a processor, a cache memory and a main memory; anda network for connecting the multiple cells,wherein a third cell stores in the cache memory, a latest version of target data in a main memory of a second cell,wherein a first cell issues a read request for said target data to said second cell,wherein said second cell issues a snoop request to said third cell in response to said read request,wherein said third cell directly transmits said latest version of target data to said first cell in response to said snoop request and transmits a reply write back to said second cell,wherein said first cell issues a request write back to a same address as that of said target data in said second cell, andwherein said second cell discards said reply write back if said reply write back from said third cell is received from said first cell after said request write back.
  • 2. The multiprocessor system according to claim 1, wherein each of the cells further comprises a directory,wherein the first cell let the request write back include directory update information for coherency between the status of the cache in the first cell and the directory of the second cell, andwherein if the second cell receives the reply write back after the request write back, the second cell discards the reply write back and updates the status of the directory based on the directory update information.
  • 3. The multiprocessor system according to claim 2, wherein each of the cells further comprises a snoop management table,wherein the read request includes a request cell information showing the request issuing source and an address information showing the read target address, andwherein the request cell information and the address information are registered in the snoop management table in response to the read request.
  • 4. The multiprocessor system according to claim 3, wherein each of the cells further comprises a write back detection circuit,wherein the snoop management table includes the registered request cell information and a detection flag corresponding to the address information, andwherein the write back detection circuit of the second cell detects the request write back for the same address as the read target address indicated by the registered address information, and if the request write back is detected, the detection flag is validated.
  • 5. The multiprocessor system according to claim 4, wherein the request write back includes a request write back cell information showing the request issuing source, and a write back address information showing the write back target address, andwherein the write back detection circuit of the second cell compares each of the request write back cell information and the write back address information with the request cell information and address information registered in the snoop management table, in order to detect the request write back for the same address as the read target address.
  • 6. The multiprocessor system according to claim 4, wherein each of the cells further comprises a discard determination circuit, andwherein the discard determination circuit of the second cell references a detection flag in response to the reply write back from the third cell, and if the detection flag is validated, the reply write back is discarded.
  • 7. The multiprocessor system according to claim 6, wherein the write back detection circuit of the second cell validates the detection flag and the directory update information shown by the request write back is stored in the snoop management table in response to the detection flag as validated, andwherein the discard determination circuit of the second cell references the detection flag and the directory update information in response to the reply write back from the third cell, and the reply write back is discarded and the status of the directory are updated based on the directory update information.
  • 8. The multiprocessor system according to claim 3, wherein the second cell initializes the request cell information and address information as registered in the snoop management table in response to the reply write back.
  • 9. The multiprocessor system according to claim 2, wherein the directory includes information showing the cells having the latest data regarding the data of all addresses in the main memory of the own cell, wherein the read request includes a request cell information showing the request issuing source and an address information showing the read target address, andwherein the second cell references the directory in response to the read request, to recognize that the latest version of the read target address data is stored in the third cell, and the third cell issues a snoop request.
  • 10. The multiprocessor system according to claim 9, wherein the issued snoop request includes the information contained in the read request, andwherein the third cell recognizes that the transmission destination of the target data is the first cell based on the request cell information included in the snoop request, and the target data read from the cache is directly transmitted to the first cell.
  • 11. A method of operating a multiprocessor system, the multiprocessor system comprising multiple cells respectively including a processor, a cache memory, and a main memory, wherein a latest version of a target data stored in the main memory of a second cell is stored in the cache memory of a third cell,the operational method comprising:(A) a step wherein the first cell issues a read request for the target data to the second cell;(B) a step wherein the second cell issues a snoop request to the third cell in response to the read request;(C) a step wherein the third cell directly transmits the target data to the first cell in response to the snoop request;(D) a step wherein the third cell issues a reply write back to the second cell in response to the snoop request;(E) a step wherein the first cell issues a request write back for the same address as that of the target data in the second cell; and(F) a step wherein the second cell discards the reply write back when the reply write back from the third cell is received later than the request write back from the first cell.
  • 12. The method of operating the multiprocessor system according to claim 11, wherein each of the cells further comprises a directory,wherein in the Step (E) above, the request write back includes directory update information for coherency between the status of the cache contained in the first cell and the status of the directory of the second cell, andwherein in the Step (F) above, the second cell discards the reply write back and updates the status of the directory based on the directory update information.
Priority Claims (1)
Number Date Country Kind
17533/2006 Jan 2006 JP national