BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing a configuration of the distributed shared memory type multiprocessor system.
FIG. 2 is a conceptual view showing operations of the conventional multiprocessor system.
FIG. 3 is a conceptual view showing operations of the conventional multiprocessor system.
FIG. 4 is a conceptual view showing operations of the multiprocessor system of the present invention.
FIG. 5 is a table showing an example of the information stored in the directory concerned in the embodiment of the present invention.
FIG. 6 is a block diagram showing a configuration of the cache coherency circuit concerned in the present embodiment.
FIG. 7 is a block diagram showing a configuration of the main pipe unit concerned in the present embodiment.
FIG. 8 is a table showing an example of the snoop management table concerned in the present embodiment.
FIG. 9 is a table showing an abstract of the method of updating the directory concerned in the present embodiment.
FIG. 10 is a diagram showing an example of the operational flow of the multiprocessor system concerned in the present embodiment.
FIG. 11 shows cache statuses, a snoop management table and a table showing transition of the information stored in the directory.