with concurrent directory accessing

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CPC
G06F12/0828

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/0828with concurrent directory accessing

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Cache coherence using dynamic coarse-grained tracking
- Patent number 12,360,903
- Issue date Jul 15, 2025
- Microsoft Technology Licensing, LLC
- Dimitrios Kaseridis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,360,843
- Issue date Jul 15, 2025
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Credit aware central arbitration for multi-endpoint, multi-core system
- Patent number 12,360,844
- Issue date Jul 15, 2025
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and methods for direct data reads from memory
- Patent number 12,353,329
- Issue date Jul 8, 2025
- Intel Corporation
- Robert Blankenship
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing probe filter accesses for processing in memory requests
- Patent number 12,332,795
- Issue date Jun 17, 2025
- Advanced Micro Devices, Inc.
- Michael Warren Boyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level cache security
- Patent number 12,332,790
- Issue date Jun 17, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware coherence for memory controller
- Patent number 12,321,270
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for a redundant array of independent disks (RAI...
- Patent number 12,298,907
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Tong Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory coherence protocol for communicating data associated with a...
- Patent number 12,292,832
- Issue date May 6, 2025
- Synopsys, Inc.
- Karthik Thucanakkenpalayam Sundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chassis servicing and migration in a scale-up NUMA system
- Patent number 12,282,662
- Issue date Apr 22, 2025
- Hewlett Packard Enterprise Development LP
- Thomas Edward McGee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache size change
- Patent number 12,271,314
- Issue date Apr 8, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software-defined coherent caching of pooled memory
- Patent number 12,253,948
- Issue date Mar 18, 2025
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lock-free read access to vector data structures
- Patent number 12,242,727
- Issue date Mar 4, 2025
- SAP SE
- Christian Bensberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CXL memory module, memory data swap method and computer system
- Patent number 12,235,766
- Issue date Feb 25, 2025
- BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
- Jin Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore, multibank, fully concurrent coherence controller
- Patent number 12,223,165
- Issue date Feb 11, 2025
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware coherence signaling protocol
- Patent number 12,197,331
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual network pre-arbitration for deadlock avoidance and enhanced...
- Patent number 12,182,398
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for event messages in a cache coherent interconnect
- Patent number 12,164,428
- Issue date Dec 10, 2024
- ARTERIS, INC.
- Michael Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,159,030
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global coherence operations
- Patent number 12,141,601
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherence shared state suppression
- Patent number 12,135,646
- Issue date Nov 5, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive cache indexing for a storage device
- Patent number 12,105,629
- Issue date Oct 1, 2024
- Samsung Electronics Co., Ltd.
- Zongwang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ferroelectric memory chiplet in a multi-dimensional packaging with...
- Patent number 12,086,410
- Issue date Sep 10, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive credit-based replenishment threshold used for transaction...
- Patent number 12,079,471
- Issue date Sep 3, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ferroelectric memory chiplet in a multi-dimensional packaging
- Patent number 12,079,475
- Issue date Sep 3, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to enter and exit a cache coherent interconnect
- Patent number 12,072,805
- Issue date Aug 27, 2024
- ARTERIS, INC.
- Mohammed Khaleeluddin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tag update bus for updated coherence state
- Patent number 12,056,051
- Issue date Aug 6, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-random way selection
- Patent number 12,045,644
- Issue date Jul 23, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level cache security
- Patent number 12,038,840
- Issue date Jul 16, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE SIZE CHANGE
- Publication number 20250231878
- Publication date Jul 17, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL NETWORK PRE-ARBITRATION
- Publication number 20250231684
- Publication date Jul 17, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATION HUB
- Publication number 20250199986
- Publication date Jun 19, 2025
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Denis DUTOIT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER
- Publication number 20250181238
- Publication date Jun 5, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COHERENCE SIGNALING PROTOCOL
- Publication number 20250147888
- Publication date May 8, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE EVICT DUPLICATION MANAGEMENT
- Publication number 20250147893
- Publication date May 8, 2025
- Akeana, Inc.
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-PACKAGE MEMORY WITH UNIVERSAL CHIPLET INTERCONNECT EXPRESS
- Publication number 20250123990
- Publication date Apr 17, 2025
- Debendra DAS SHARMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MANAGING EVENT MESSAGES IN A CACHE COHERENT I...
- Publication number 20250103497
- Publication date Mar 27, 2025
- Arteris, Inc
- Michael FRANK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Consistency for Compressed Data Across Graphics Cores
- Publication number 20250103501
- Publication date Mar 27, 2025
- Apple Inc.
- Mladen Wilder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE SHARED CACHE OPERATION ENGINE
- Publication number 20250094044
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20250060873
- Publication date Feb 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENT MEMORY SYSTEM
- Publication number 20250028642
- Publication date Jan 23, 2025
- Samsung Electronics Co., Ltd.
- Krishna T. MALLADI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL COHERENCE OPERATIONS
- Publication number 20250028551
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCE SHARED STATE SUPPRESSION
- Publication number 20250013569
- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCK-FREE READ ACCESS TO VECTOR DATA STRUCTURES
- Publication number 20250004642
- Publication date Jan 2, 2025
- Christian BENSBERG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SNOOP FILTER WITH DISAGGREGATED VECTOR TABLE
- Publication number 20240419594
- Publication date Dec 19, 2024
- Microsoft Technology Licensing, LLC
- Jason Lawrence PANAVICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENT HIERARCHICAL CACHE LINE TRACKING
- Publication number 20240419595
- Publication date Dec 19, 2024
- Akeana, Inc.
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF FORMING FERROELECTRIC CHIPLET IN A MULTI-DIMENSIONAL PACK...
- Publication number 20240402908
- Publication date Dec 5, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCE USING DYNAMIC COARSE-GRAINED TRACKING
- Publication number 20240403219
- Publication date Dec 5, 2024
- Microsoft Technology Licensing, LLC
- Dimitrios KASERIDIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing Device, Data Processing Method and System, and Related De...
- Publication number 20240362165
- Publication date Oct 31, 2024
- Huawei Cloud Computing Technologies Co., Ltd.
- Xiao Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY DEVICE AND METHOD FOR IMPLEMENTING CACHE SCHEDULING US...
- Publication number 20240354252
- Publication date Oct 24, 2024
- MetisX CO., Ltd.
- Do Hun KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-RANDOM WAY SELECTION
- Publication number 20240345868
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG UPDATE BUS FOR UPDATED COHERENCE STATE
- Publication number 20240345956
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL CACHE SECURITY
- Publication number 20240320154
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FERROELECTRIC MEMORY CHIPLET IN A MULTI-DIMENSIONAL PACKAGING WITH...
- Publication number 20240311006
- Publication date Sep 19, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CXL MEMORY MODULE, MEMORY DATA SWAP METHOD AND COMPUTER SYSTEM
- Publication number 20240311305
- Publication date Sep 19, 2024
- Beijing Superstring Academy of Memory Technology
- Jin DAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE ARBITRATION
- Publication number 20240281278
- Publication date Aug 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MANAGEMENT USING SHARED CACHE LINE STORAGE
- Publication number 20240241830
- Publication date Jul 18, 2024
- Akeana, Inc.
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CCIX INTERFACE BASED ON USE OF QoS FIELD
- Publication number 20240241829
- Publication date Jul 18, 2024
- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Jin-Suk MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS
- Publication number 20240184446
- Publication date Jun 6, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING

with concurrent directory accessing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Cache coherence using dynamic coarse-grained tracking

Multicore shared cache operation engine

Credit aware central arbitration for multi-endpoint, multi-core system

System, apparatus and methods for direct data reads from memory

Reducing probe filter accesses for processing in memory requests

Multi-level cache security

Hardware coherence for memory controller

Systems and methods for a redundant array of independent disks (RAI...

Memory coherence protocol for communicating data associated with a...

Chassis servicing and migration in a scale-up NUMA system

Cache size change

Software-defined coherent caching of pooled memory

Lock-free read access to vector data structures

CXL memory module, memory data swap method and computer system

Multicore, multibank, fully concurrent coherence controller

Hardware coherence signaling protocol

Virtual network pre-arbitration for deadlock avoidance and enhanced...

System and method for event messages in a cache coherent interconnect

Multicore shared cache operation engine

Global coherence operations

Configurable cache for coherent system

Cache coherence shared state suppression

Adaptive cache indexing for a storage device

Ferroelectric memory chiplet in a multi-dimensional packaging with...

Adaptive credit-based replenishment threshold used for transaction...

Ferroelectric memory chiplet in a multi-dimensional packaging

System and method to enter and exit a cache coherent interconnect

Tag update bus for updated coherence state

Pseudo-random way selection

Multi-level cache security

Patents Applicationslast 30 patents

CACHE SIZE CHANGE

VIRTUAL NETWORK PRE-ARBITRATION

COMMUNICATION HUB

MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER

HARDWARE COHERENCE SIGNALING PROTOCOL

CACHE EVICT DUPLICATION MANAGEMENT

ON-PACKAGE MEMORY WITH UNIVERSAL CHIPLET INTERCONNECT EXPRESS

SYSTEM AND METHOD FOR MANAGING EVENT MESSAGES IN A CACHE COHERENT I...

Consistency for Compressed Data Across Graphics Cores

MULTICORE SHARED CACHE OPERATION ENGINE

CONFIGURABLE CACHE FOR COHERENT SYSTEM

COHERENT MEMORY SYSTEM

GLOBAL COHERENCE OPERATIONS

CACHE COHERENCE SHARED STATE SUPPRESSION

LOCK-FREE READ ACCESS TO VECTOR DATA STRUCTURES

SNOOP FILTER WITH DISAGGREGATED VECTOR TABLE

COHERENT HIERARCHICAL CACHE LINE TRACKING

METHOD OF FORMING FERROELECTRIC CHIPLET IN A MULTI-DIMENSIONAL PACK...

CACHE COHERENCE USING DYNAMIC COARSE-GRAINED TRACKING

Computing Device, Data Processing Method and System, and Related De...

CACHE MEMORY DEVICE AND METHOD FOR IMPLEMENTING CACHE SCHEDULING US...

PSEUDO-RANDOM WAY SELECTION

TAG UPDATE BUS FOR UPDATED COHERENCE STATE

MULTI-LEVEL CACHE SECURITY

FERROELECTRIC MEMORY CHIPLET IN A MULTI-DIMENSIONAL PACKAGING WITH...

CXL MEMORY MODULE, MEMORY DATA SWAP METHOD AND COMPUTER SYSTEM

PIPELINE ARBITRATION

CACHE MANAGEMENT USING SHARED CACHE LINE STORAGE

APPARATUS AND METHOD FOR CCIX INTERFACE BASED ON USE OF QoS FIELD

MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS