This relates generally to microelectronic devices, and more particularly to adhesion layers for assembly of microelectronic devices.
A microelectronic device may include a die that is attached to a package substrate at a die attach surface of the die. The die may be attached to the package substrate by a die attach material, such as an adhesive or solder. The die attach surface may be smooth, as a result of fabrication processes, such as backgrinding, used to make the die. The smoothness of the die attach surface may provide limited mechanical support for adhesion of the die attach material. Stress between die and the package substrate, such as resulting from thermal expansion, may cause the die attach material to separate from the die attach surface, undesirably degrading performance of the microelectronic device.
In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic die is attached to a package substrate of the microelectronic device by a die attach material. The microelectronic device includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer includes nanoparticles. Adjacent nanoparticles are adhered to each other. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.
The drawings are not necessarily drawn to scale. Example embodiments are not limited by the illustrated ordering of acts or events, as some acts or events may occur in different orders and/or concurrently with other acts or events. Furthermore, not all illustrated acts or events are required to implement a methodology in accordance with example embodiments.
A microelectronic device includes a microelectronic die, such as a silicon integrated circuit, a device having a substrate of a compound semiconductor material (such as silicon carbide, gallium nitride, or gallium arsenide), a microelectronic mechanical system (MEMS) device, an optoelectronic device, or a discrete semiconductor component (such as a power transistor). The microelectronic die has a die attach surface, such as a surface opposite from a component surface, the component surface having bond pads coupled to various components of the microelectronic die. Material of the microelectronic die at the die attach surface may be electrically conductive or semiconducting, such as metal or semiconductor material. Alternatively, the material of the microelectronic die at the die attach surface may be electrically nonconductive or semi-insulating, such as sapphire, glass, undoped gallium nitride, or high purity silicon. The microelectronic device includes a package substrate, such as a die pad of a lead frame, or a die pad of a ceramic chip carrier. The microelectronic die is attached to the package substrate by a die attach material. The die attach material may be electrically conductive, such as solder or adhesive containing electrically conductive particles of metal or carbon. Alternatively, the die attach material may be electrically nonconductive, such as a polymer adhesive free of electrically conductive particles. The microelectronic device includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer includes nanoparticles. Adjacent nanoparticles are adhered to each other. The nanoparticle layer may be directly coupled to the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer, having metal, aluminum oxide or similar material. The nanoparticles attach to the intermediate layer (if present) by molecular bonds, such as metallic bonds, covalent bonds, or similar bonds. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles. Mechanical adhesion of the die attach material to the die attach surface may be advantageously higher than a comparable microelectronic device with no nanoparticle layer, because the die attach material contacts the nanoparticles in an interlocking configuration. Separation of the die attach surface from the package substrate due to stress may thus be reduced or avoided, and so reliability of the microelectronic device may thus be improved.
For the purposes of this disclosure, if an element is referred to as being “coupled” to another element, it may be directly coupled to the other element, or intervening elements may exist. If an element is referred to as being “directly coupled” to another element, no other intervening elements are intentionally disposed. Similarly, if an element is referred to as being “on” another element, it may be directly on the other element, or intervening elements may exist. If an element is referred to as being “directly on” another element, no other intervening elements are intentionally disposed.
In this example, the microelectronic device 100 includes an intermediate layer 110 directly contacting the die attach surface 104. For example, the intermediate layer 110 may include one or more metal layers such as a layer stack of titanium, nickel, and silver, which exhibits desired adhesion to silicon surfaces. Metal in the intermediate layer 110 may reduce a sheet resistance of a substrate of the microelectronic die 102, advantageously reducing debiasing of regions of the substrate due to lateral currents in the substrate. The intermediate layer 110 may include one or more dielectric materials (such as aluminum oxide or silicon monoxide), which exhibit desired adhesion to dielectric surfaces. Other materials for the intermediate layer 110 are within the scope of this example.
The microelectronic device 100 includes a nanoparticle layer 112 coupled to the die attach surface 104. In this example, the nanoparticle layer 112 directly contacts the intermediate layer 110, and so is coupled to the die attach surface 104 through the intermediate layer 110. The nanoparticle layer 112 may extend continuously across the die attach surface 104, as depicted in
The microelectronic device 100 includes a package substrate 116. For example, the package substrate 116 may include metal, ceramic, glass, printed circuit board material such as (fiberglass reinforced plastic), or other material appropriate for supporting the microelectronic die 102. A surface of the package substrate 116 facing the microelectronic die 102 may be electrically conductive, or electrically nonconductive. The package substrate 116 may be part of a lead frame 118, which may include external leads 120. The bond pads 108 may be electrically coupled to the external leads 120 by wire bonds 122, as depicted in
The microelectronic die 102 is attached to the package substrate 116 by a die attach material 124. In this example, the die attach material 124 directly contacts the package substrate 116. The die attach material 124 extends into the nanoparticle layer 112 and contacts at least a portion of the nanoparticles 114. Some instances of the die attach material 124 may include an adhesive material, such as epoxy or urethane. Instances of the die attach material 124 which include the adhesive material may also include electrically conductive particles such as silver particles, nickel particles, carbon particles, nickel-coated copper particles, or similar particles, to provide electrical conductivity in the die attach material 124. Other instances of the die attach material 124 may include primarily solder, and so may include mixtures of metals such as zinc, bismuth, tin, indium, or antimony.
In versions of this example, the material of the microelectronic die 102 at the die attach surface 104, the intermediate layer 110 (if present), the nanoparticle layer 112, the die attach material 124, and the package substrate 116 are electrically conductive. Those versions may provide desired electrical coupling of the microelectronic die 102 to the package substrate 116, such as to provide a substrate bias to the microelectronic die 102 during operation of the microelectronic device 100. Alternately, in other versions of this example, any of the material of the microelectronic die 102 at the die attach surface 104, the intermediate layer 110 (if present), the nanoparticle layer 112, the die attach material 124, and the package substrate 116 are electrically nonconductive. Those versions may provide a desired electrical isolation of the microelectronic die 102 at the die attach surface 104.
The microelectronic device 100 may further include one or more package elements, such as an encapsulation material 126 around the microelectronic die 102 and the package substrate 116. Other package elements, such as a metal lid over the microelectronic die 102, are within the scope of this example.
In this example, the microelectronic device 200 includes a lead frame 218. The bond pads 208 are electrically coupled to the lead frame 218 by bump bonds 222. The microelectronic device 200 further includes a package substrate 216, which (in this example) is a clip 216 electrically coupled to the lead frame 218.
The microelectronic device 200 includes a nanoparticle layer 212 coupled to the die attach surface 204. In this example, the nanoparticle layer 212 directly contacts the die attach surface 204. The nanoparticle layer 212 includes nanoparticles 214, as depicted in
The microelectronic die 202 is attached to the package substrate 216 by a die attach material 224. In this example, the die attach material 224 directly contacts the package substrate 216. The die attach material 224 extends into the nanoparticle layer 212 and contacts at least a portion of the nanoparticles 214. The die attach material 224 may include any of the materials disclosed with regard to the die attach material 124 of
The nanoparticle layer 212 may be configured to cover a plurality of areas of the die attach surface 204, with gaps 228 in the nanoparticle layer 212 between the areas, as depicted in
The microelectronic device 200 may further include one or more package elements, such as an encapsulation material 226 around the microelectronic die 202 and the package substrate 216. Other package elements, such as a metal lid over the microelectronic die 202, are within the scope of this example.
Nanoparticle layers 312 are formed on the die attach surface 304. The nanoparticle layers 312 may be formed directly on the die attach surface 304, as depicted in
The nanoparticle layers 312 may be formed by an additive process 334 that dispenses a nanoparticle dispersion 336 onto the die attach surface 304.
Referring to
Referring to
Referring to
The microelectronic die 302 is disposed on the layer of die attach material 324 so that the nanoparticle layer 312 directly contacts the layer of die attach material 324. The microelectronic die 302 may be disposed on the layer of die attach material 324, such as by a pick and place operation.
Referring to
The microelectronic device 300, which includes the microelectronic die 302 attached to the package substrate 316 by the die attach material 324 through the nanoparticle layer 312, may be further formed by adding package elements (e.g., encapsulation material or mechanical package elements such as a lid). Other methods of further forming the microelectronic device 300 are within the scope of this example, and other package elements of the microelectronic device 300 are within the scope of this example.
In this example, an intermediate layer 410 is formed on the die attach surface 404. The intermediate layer 410 may have a composition and electrical conductivity as disclosed with regard to the intermediate layer 110 of
Nanoparticle dispersion 436 is dispensed onto the intermediate layer 410, such as by a spin-coat apparatus 444 as depicted in
Referring to
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Referring to
The microelectronic device 400, which includes the microelectronic die 402 attached to the package substrate 416 by the die attach material 424 through the nanoparticle layer 412 and the intermediate layer 410, may be further formed by adding package elements (e.g., encapsulation material or mechanical package elements, such as a lid). Other methods of further forming the microelectronic device 400 are within the scope of this example, and other package elements of the microelectronic device 400 are within the scope of this example.
Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims. Various features of the examples disclosed herein may be combined in other manifestations of example microelectronic devices. For example, features disclosed in reference to
This application is a division of U.S. patent application Ser. No. 15/914,761, filed Mar. 7, 2018, the contents of all of which are herein incorporated by reference in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
7109591 | Hack et al. | Sep 2006 | B2 |
7327039 | Charles et al. | Feb 2008 | B2 |
7368824 | Hosseini et al. | May 2008 | B2 |
7476981 | Bergmann | Jan 2009 | B2 |
7781260 | Sane et al. | Aug 2010 | B2 |
7960834 | Funaki | Jun 2011 | B2 |
8555491 | Boureghda et al. | Oct 2013 | B2 |
8586480 | Zommer | Nov 2013 | B1 |
8853006 | Shimonishi et al. | Oct 2014 | B2 |
8912637 | Zhang | Dec 2014 | B1 |
9111782 | Zommer | Aug 2015 | B2 |
9397063 | Haba | Jul 2016 | B2 |
9425161 | Viswanathan et al. | Aug 2016 | B2 |
9583453 | Shearer et al. | Feb 2017 | B2 |
9589860 | Viswanathan et al. | Mar 2017 | B2 |
11031364 | Cook | Jun 2021 | B2 |
20050064183 | Lunsford et al. | Mar 2005 | A1 |
20050072461 | Kuchinski et al. | Apr 2005 | A1 |
20050230042 | Hashimoto | Oct 2005 | A1 |
20080122118 | Basheer et al. | May 2008 | A1 |
20080145607 | Kajiwara et al. | Jun 2008 | A1 |
20080169574 | Molkkari et al. | Jul 2008 | A1 |
20080237822 | Raravikar et al. | Oct 2008 | A1 |
20090166852 | Hu | Jul 2009 | A1 |
20090278244 | Dune et al. | Nov 2009 | A1 |
20120106111 | Mazzochette et al. | May 2012 | A1 |
20120292009 | Kohler et al. | Nov 2012 | A1 |
20140042624 | Zommer | Feb 2014 | A1 |
20140238485 | Mizuno et al. | Aug 2014 | A1 |
20150041827 | Iwata et al. | Feb 2015 | A1 |
20160240505 | Tatsumi et al. | Aug 2016 | A1 |
20170323844 | Karlicek, Jr. | Nov 2017 | A1 |
Number | Date | Country |
---|---|---|
10206818 | Aug 2003 | DE |
Entry |
---|
Patent Cooperation Treaty Search Report, PCT/US2019/020664, dated Oct. 10, 2019, 2 pages. |
Number | Date | Country | |
---|---|---|---|
20210265299 A1 | Aug 2021 | US |
Number | Date | Country | |
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Parent | 15914761 | Mar 2018 | US |
Child | 17315102 | US |