This application is related to application Ser. No. 13/346,760 filed on Jan. 10, 2012 by Mainstream Engineering Corp. in the name of Justin J. Hill, Ph.D. entitled A METHOD TO ENHANCE THE POWER FACTOR OF THERMOELECTRIC LAMINATES BASED ON VERTICALLY ORIENTED AND DENSELY ARRAYED NANOWIRES (Our Ref.: 62950US), the disclosure of which is incorporated by reference herein.
The present invention is directed to nanostructured thermoelectric elements and the like, and a method for enhancement thereof, namely by combining layer-by-layer assembly of silica or mesoporous silica precursors or other suitable compounds within ordered nanoporous templates, then upon nanowire growth, removal of the template followed by layer-by-layer growth thermoelectric material in the voids; thereby creating a thermoelectric support. These hierarchical templates can be either fabricated freestanding or fabricated directly on support materials such as electrically conductive or insulating material. Furthermore, inclusion of material within the hierarchical nanopores facilitates the directed fabrication of ultra-high aspect ratio nanostructures.
In the primary currently preferred first embodiment, the composite thermoelectric laminates according to the present invention can increase the total power output of a thermoelectric device. In addition, a new process fabricates conformal (or conformable) thermoelectric nanowire arrays embedded within a composite thermoelectric matrix, which are grown on any shaped support when s the initial support is composed of aluminum, zinc, tin, antimony, titanium, magnesium, niobium, tantalum or any other metal that undergoes electrochemical formation of ordered nanopores. The materials listed are known producers of arrayed nanopores under anodic electrochemical oxidation (abbreviated hereto forth as “anodization” or “anodized”). In another contemplated embodiment, the advantages of these nanostructures can be leveraged in applications where ultra high surface area, vertically oriented and arrayed nanostructures are desired such as in batteries, capacitors, electrochemistry, chemical conversion, photovoltaic devices and many other chemical and physical applications as will be apparent to those skilled in such applications.
In a thermoelectric material, the redistribution of charge carriers is simultaneously associated with the formation of an electric field and a temperature gradient. Thus, the external application of a thermal gradient across the material results in the formation of an electrical bias. Likewise, an externally applied bias across the thermoelectric will cause heat to flow through the material. The degree that a particular material responds to either imposition is measured by the material's thermoelectric figure of merit, zT
where σ, S, κe, κl and Tav are the thermoelectric material's electrical conductivity, Seebeck coefficient, thermal conductivity due to electrons and phonons (lattice contribution), and average temperature, respectively. Thermoelectric efficiency increases with both zT in Equation. (1) and the Carnot efficiency (′c=1j Tcold=Thot), which is given by the ratio of temperatures from heat-source to heat-sink.
Theoretical calculations show the immense potential that ultra-low diameter nanostructures can have on zT. [see, e.g., Hicks and Dresselhaus; Thermoelectric figure of merit of a one-dimensional conductor. Phys. Rev. B, 1993, (47), 16631-16634]. Such calculations show, however, that significant enhancements in zT are only observed once the confinement length (i.e. nanowire diameter) drops below 20 nm. Only at dimensions below 10 nm is the nanostructure confinement on the order of or less than that of the phonon wavelength. A 100-fold increase in phonon scattering has been found as nanowire diameter decreased from 20 to 1 nm, while electron scattering only decreased by a factor of 2. [see, Kim, Stroscio, Bhatt, Mickevicius and Mitin; Electron-Optical-Phonon Scattering Rates in a Rectangular Quantum Wire. J. Appl. Phys., 1991, (70), 319-325]. Therefore, achieving zT, 4 likely requires nanostructures with diameters less than 5 nm.
It is possible to reduce the diameter of the AAO below its natural lower limit by incorporation of other materials within or on the walls of the AAO pores. This has been accomplished through filling the AAO pores with mesoporous silica, coating the AAO pores with mesoporous silica [see, Hill, Cotton and Ziegler; Alignment and Morphology Control of Ordered Mesoporous Silicas in Anodic Aluminum Oxide Channels by Electrophoretic Deposition. Chem. Mater., 2009, (21), 1841-1846], or layer-by-layer deposition on the AAO template [see Liu, Wang, Indacochea and Wang; Interference color of anodized aluminum oxide (AAO) films for sensor application, Sensors and Smart Structures Technologies for Civil, Mechanical, and Aerospace Systems 2009, 2009, (7292), 729217-11]. Furthermore, the fabrication of thermoelectric nanostructures within ultra-low diameter nanopores has been predicted and partially verified to substantially enhance factors contributing to thermoelectric performance.
While ultra-low diameter nanowires show significant increase in zT, the low diameters limit the maximum power output of the device. The total power output of a thermoelectric device is the power factor (or PF),
PF=S2σ
where S and σ are the Seebeck coefficient and electrical conductivity respectively. PF is very similar to zT but does not account for the thermal conductivity of the thermoelectric material, as this is only a factor in efficiency. The PF is instead representative of the amount of energy that can be produced by the device. Increasing the PF of a nanostructured thermoelectric device will allow for greater energy generation in applications where maximum energy needs to be produced from an excess of heat.
A primary object of the present invention is the ability to increase the thermoelectrically active area of the device beyond the area of the nanowires. This has been accomplished by selectively removing the AAO template following wall coating of the nanostructures (henceforth referred to as the pore size reduction medium [PRM]) and filling of nanostructures with thermoelectric material. This freestanding nanostructure can then be supported by filling the nanoscale void with thermoelectric material, thereby increasing the total power output of the device.
These and further features, objects and advantages of the present invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings wherein:
a is a perspective view of a piece of aluminum or any of the other above-mentioned sitable materials that has been shaped to be conformal with a heat generating surface prior to the first step employed in the general inventive method of the present invention;
b shows the aluminum piece shown in
c shows the AAO template of
d shows the AAO template of
e shows the AAO template of
f shows the wall-coated AAO/PRM template of
g shows the hierarchical AAO/PRM template of
h shows a freestanding nanostructure array on the aluminum remaining from selective aluminum oxide etching of the templates obtained in
i shows a nanostructure array obtained from selective etching of the templates of
a-c are SEM images of AAO fabricated with different pore sizes;
a is an optical photograph of the thermoelectric nanowire film, and
a and b are SEM images of a Bi2Te3 thermoelectric nanowire array obtain from the method shown in
a-c are graphs showing the effect of thermoelectric backfilling on composite thermal conductivity, power factor, and zT of the device as nanostructure diameter decreases; and
Once the nanoporous template is filled with a thermoelectric material, the AAO can be selectively dissolved, leaving behind and array of ultra-high aspect ratio PRM-coated or bare nanostructures. This array, while fragile, has better efficiency in a thermoelectric device due to the fact that all thermal energy is transported through the thermoelectric nanostructure material. Though the AAO has a low thermal conductivity, as low as 0.1 W/mK, and the bare PRM-coated nanostructure array is more desirable, it is also possible to support the PRM-coated nanostructure array in another material with a lower thermal conductivity material by simple dip coating methods to minimize the heat transport through the array. Alternatively, as presented in this invention, the nanostructures may be supported by further electrodeposited thermoelectric material of the composition previously presented. Controlling the pore density and interpore distance to force a confinement effect within the backfilled thermoelectric material will maximize the zT and power factor of the device.
In particular,
b now shows the conformal aluminum work-piece 100 after anodization, creating a aluminum supported AAO nanoporous template composed of an aluminum oxide matrix 101 containing a plurality of nanopores 102 that can be used as a structure-directing medium for nanostructure fabrication. The aluminum support 100 acts as an electrode to the nanostructure bottoms when fabricated within the template 101. Alternatively, the aluminum can be removed to create a conformal AAO template. The spacing and pore diameter of the nanopores 102 found within the AAO template 101 are uniform and can be controlled by altering the voltage or acid concentration/composition of the anodization process. Lower applied voltage for a given acid electrolyte generally reduces the pore diameter and spacing (increase pore density). The lower limit of AAO pore diameter is approximately 10 nm which achieves one of the primary objects of the present invention, namely AAO pore wall coating or inclusion of mesoporous material within the AAO pores to further reduce the diameter of the, now hierarchically structured, template.
In Step 2a, a material can be used to coat the nanopores with a pore reduction material to obtain wall-coated nanopores 104 (denoted heretofore as PRM) in order to shrink the diameter down below the lower limit obtained with anodization.
Alternatively, with reference to Step 2b electric fields can be used to both (a) deposit a PRM within the AAO nanopores and (b) to form and axially align pores intrinsic to mesoporous PRMs 105 within the AAO nanopores to create a Type II hierarchical structure. The result is shown in the AAO template in
In Step 3a, thermoelectric or suitable material can be electrodeposited into the template, forming high aspect ratio nanowires with the result shown in
f shows the Type I hierarchical template 100 in which in Step 3c a nanostructure material 107 is included, resulting in reduced diameter nanopores 104. The coated nanopores 104 can be roughened to enhance thermoelectric material performance. Furthermore, the coated nanopores 104 have a reduced pore diameter. If the pore diameter, and thus nanostructure, is reduced below 20 nm and the nanostructure includes a thermoelectric material, significant thermoelectric performance enhancements should occur. Moreover, this method can be used to investigate the separation of thermal and electrical conductivity at the nanoscale as well as to evaluate nanoscale effects on thermopower. This device, along with theoretical modeling, can be used as an apparatus to evaluate phonon particle characteristics due to the controllability of the nanostructure diameter.
Alternatively to Step 3a, the nanopores 102 can be filled in Step 3b with material with a reduced diameter due to the PRM so as to create the Type II hierarchical structure shown in
The resulting AAO 101 in
As seen in Step 5, the PRM-coated nanostructure array can be supported in another material with a similar thermoelectric material 110 by simple dip coating methods. The material 110 acts to structurally support the PRM-coated nanostructure array as well as minimize the amount of heat transported through item 110 as well as increase the power factor of the laminate since it is also thermoelectrically active. The resulting array shown in
a-c are SEM images of AAO produced in accordance with the present invention with different pore sizes. As shown, the pores are 150, 50 and 10 nm, respectively. These AAO templates were fabricated on transparent and conductive tin-doped indium oxide, on glass and as such could be incorporated into a solar cell device or other structure that requires optical transparency.
a-c are mathematical representations of the predicted behavior of a nanostructured thermoelectric device with a backfilled thermoelectric support.
b and 5c shows how the power factor and zT respectively are affected by utilizing a thermoelectric backfilling technique. Seen in the alumina supported devices, as the nanostructure diameter decreases the power factor of the device increases, until a 10 nm diameter, then drops as the diameter approaches 0 nm. This is due to the increased phonon confinement effect seen in the composite thermal conductivity (
While we have shown and described several embodiments in accordance with the present invention, it should be clearly understood that the same is susceptible to numerous changes and modifications as will now be apparent to one skilled in this art but without departing from our inventive concept. Therefore, we do not intend to be limited to the details shown and described herein but intend to cover all such changes and modifications as are encompassed by the scope of the appended claims.
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