Patent Application
20140359089
The disclosure relates generally to a switching fabric for a computer-based system.
With the continued growth of the internet, web-based companies and systems and the proliferation of computers, there are numerous data centers that house multiple server computers in a location that is temperature controlled and can be externally managed as is well known.
However, what is needed is a system and method for packet switching functionality focused on network aggregation that reduces size and power requirements of typical systems while reducing cost all at the same time and it is to this end that the disclosure is directed.
The disclosure is particularly applicable to a network aggregation system and method as illustrated and described below and it is in this context that the disclosure will be described. It will be appreciated, however, that the system and method has greater utility since the system and method can be implemented using other elements and architectures that are within the scope of the disclosure and the disclosure is not limited to the illustrative embodiments described below.
The system and method also supports a routing using a tree-like or graph topology that supports multiple links per node, where each link is designated as an Up, Down, or Lateral link, or both, within the topology. In addition, each node in the system maybe be a combination computational/switch node, or just a switch node, and input/output (I/O) can reside on any node as described below in more detail. The system may also provide a system with a segmented Ethernet Media Access Control (MAC) architecture which may have a method of re-purposing MAC IP addresses for inside MACs and outside MACs, and leveraging what would normally be the physical signaling for the MAC to feed into the switch. The system may also provide a method of non-spoofing communication, as well as a method of fault-resilient broadcasting, which may have a method of unicast misrouting for fault resilience. In the context of network security, a spoofing attack is a situation in which one person or program successfully masquerades as another by falsifying data and thereby gaining an illegitimate advantage.
The system may also provide a rigorous security between the management processors, such that management processors can “trust” one another. In the example system shown in
The system may also provide a network proxy that has an integrated microcontroller in an always-on power domain within a system on a chip (SOC) that can take over network proxying for the larger onboard processor, and which may apply to a subtree. The system also provide a multi-domaining technique that can dramatically expand the size of an addressable fabric with only trivial changes to the Routing Header and the routing table.
A middle rack 303b illustrates another configuration of a rack in the network aggregation system in which one or more Calxeda computing units 306e, f can integrate into existing data center racks that already contain a top-of-rack switch 308a. In this case, the IT group can continue to have their other computing units connected via 1 Gb Ethernet up to the existing top-of-rack switch and the internal Calxeda computing units can be interconnected via 10 Gb XAUI fabric and can connected up to the existing top-of-rack switch via either 1 Gb or 10 Gb Ethernet interconnects as shown in
The data center in a rack 400 uses a proprietary system interconnect approach that dramatically reduces power and wires and enables heterogeneous systems, integrating existing Ethernet-based servers and enabling legacy applications. In one aspect, a complete server or storage server is put in a disk or SSD form factor, with 8-16 SATA interfaces with 4 ServerNodes™ and 8 PCIe x4 interfaces with 4 ServerNodes™. It supports disk and/or SSD+ServerNode™, using a proprietary board paired with a disk(s) and supporting Web server, user applications, cloud applications, disk caching, etc.
The Calxeda XAUI system interconnect reduces power, wires and the size of the rack. There is no need for high powered, expensive Ethernet switches and high-power Ethernet Phys on the individual servers. It dramatically reduces cables (cable complexity, costs, significant source of failures). It also enables a heterogeneous server mixture inside the rack, supporting any equipment that uses Ethernet or SATA or PCIe. It can be integrated into the system interconnect.
The herein presented aspects of a server-on-a-chip (SOC) with packet switch functionality are focused on network aggregation. The SOC is not a fully functionally equivalent to an industry-standard network switch, such as, for example, a Cisco switch or router. But for certain applications discussed throughout this document, it offers a better price/performance ratio as well as a power/performance ratio. It contains a layer 2 packet switch, with routing based on source/destination MAC addresses. It further supports virtual local area network (VLAN), with configurable VLAN filtering on domain incoming packets to minimize unnecessary traffic in a domain. The embedded MACs within the SOC do have complete VLAN support providing VLAN capability to the overall SOC without the embedded switch explicitly having VLAN support. It can also wake up the system by management processor notifying the management processor on link state transitions to reprogram routing configurations to route around faults. Such functionality does not require layer3 (or above) processing (i.e., it is not a router). It also does not offer complete VLAN support, support for QoS/CoS, address learning, filtering, spanning tree protocol (STP), etc.
In more detail, the ovals shown in the tree-oriented topology in
The switch architecture calls for a routing frame to be prepended to the Ethernet frame. The switch operates only against fields within the routing frame, and does not inspect the Ethernet frame directly.
In some cases, there may be Preamble, Start of Frame, and Inter-Frame gap fields across XAUI, depending on the specific micro-architecture. The routing frame header processor may standardize these fields. The XAUI interface may need some or all of these fields. In this case, the Routing Header processor at area 910d needs to add these going into the switch, and to remove them leaving the switch. To reduce the number of bytes that need to be sent over XAUI, these three fields may be removed (if the XAUI interface allows it). In this case, the Routing Header processor at area 910b will need to strip these going into the switch, and add them back leaving the switch.
The routing frame header processor receives an Ethernet frame from a MAC, sending a routing frame to the switch. It also standardizes the preamble, start of frame, and inter-frame gap fields, prepends a Routing Header, and receives a routing frame from the switch, sending the Ethernet frame into a MAC. This processor then strips the Routing Header and standardizes the preamble, start of frame, and inter-frame gap fields. Note that all frames that are flowing within the fabric are routing frames, not Ethernet frames. The Ethernet frame/routing frame conversion is done only as the packet is entering or leaving the fabric via a MAC. Note also that the routing logic within the switch may change the value of fields within the routing frame. The Ethernet frame is never modified (except the adding/removing of the preamble, start of frame, and inter-frame gap fields).
The routing frame is composed of the routing frame header plus the core part of the Ethernet frame, and is structured as shown in Table 1, below:
The routing frame header consists of the fields shown in Table 2, below:
If a switch receives a packet that fails the checksum, the packet is dropped, a statistic counter is incremented, and the management processor is notified.
The routing frame processor differentiates between several destination MAC address encodings. As a reminder, MAC addresses are formatted as shown in
Further, other novel aspects can be found in Table 3 under “Node Encoded Unicast” as well as “Link Encoded Unicast,” allowing one internal node or link to address all external MAC sections, and the “Neighbor Multicast” entry, allowing a multicast to neighboring nodes.
Note that the values Node Encoded Magic Number, Link Encoded Magic Number, and Neighbor Multicast Magic Number are constant identifiers used for uniquely identifying these MAC address types. The term “magic number” is a standard industry term for a constant numerical or text value used to identify a file format or protocol.
The header processor contains a MAC Lookup CAM (Content Addressable Memory), macAddrLookup, that maps from 6 byte MAC addresses to 12-bit Node IDs, as shown in Table 4, below.
The number of rows in this CAM is implementation dependent, but would be expected to be on the order of 256-1024 rows. The management processor initializes the CAM with Node ID mappings for all the nodes within the fabric. There are two types of rows, depending upon the setting of the Node Local bit for the row. The Node Local field allows a 4:1 compression of MAC addresses in the CAM for default MAC addresses, mapping all four MACs into a single row in the CAM table, which is Table 5, below.
The arbitrary rows in the CAM allow mapping of the MAC address aliases to the nodes. Linux (and the MACs) allow the MAC addresses to be reassigned on a network interface (e.g., with ifconfig eth0 hw ether 00:80:48:BA:D1:30). This is sometime used by virtualization/cloud computing to avoid needing to re-ARP after starting a session.
The switch architecture provides for a secondary MAC Lookup CAM that only stores the 3 bytes of the NIC Specific part of the MAC address for those addresses that match the Switch OUI. The availability of this local OUI CAM is determined by the implementation. See Table 6, below.
The maximum number of nodes limitation for three types of MAC address encodings may be evaluated as follows:
1. Default MAC Addressees—management processor sets Node Local mappings for each of the nodes in the fabric. There is one entry in the CAM for each node. Max # of nodes is controlled by maximum # of rows in the MAC Address Lookup CAM.
2. Node Encoded Addresses—All the MACs are reprogrammed to use Node Encoded Addresses. In this way the Node IDs are directly encoded into the MAC addresses. No entries in the MAC Lookup CAM are used. Max # of nodes is controlled by maximum # of rows in the Unicast lookup table (easier to make big compared to the Lookup CAM).
3. Arbitrary MAC Address Aliases—Takes a row in the CAM. As an example, a 512-row CAM could hold 256 nodes (Node local addresses)+1 MAC address alias per node.
Since the Lookup CAM is only accessed during Routing Header creation, the management processor actually only needs to populate a row if the MAC address within the fabric is being used as a source or destination MAC address within a packet. In other words, if two nodes never will talk to each other, a mapping row does not need to be created. But usually the management processor won't have that knowledge, so it's expected that mappings for all nodes are created in all nodes.
Table 7 defines how to set fields within the Routing Header for all the fields except for destination node and port.
Table 8 defines how to set destination node and port for addresses within the fabric:
Table 9 defines how to set destination node and port for addresses outside the fabric:
Additionally, the management processor software architecture of the system and method disclosed here currently depends on the ability of management processor nodes to “trust” each other. This more rigorous security on management processor to management processor communication is desirable, as well a better security on private management LANs across the fabric.
The multi-domain fabric architecture that has been described addresses the lack of VLAN support by creating secure “tunnels” and domains across the fabric, and it can interoperate with VLAN protected router ports on a 1:1 basis.
The approach to domain management in the system and method disclosed here is as follows: Support multiple domain IDs within the fabric. Allow each of the MACs within a node (management processor, MAC0, MAC1, Gateway) to be assigned to a domain ID individually (and tagged with domain 0 if not set). Allow each of the MACs within a node to have a bit indicating access to the management domain. The domain IDs associated with a MAC could only be assigned by the management processor, and could not be altered by the A9. For frames generated by MACs (both inside and outside), the routing frame processor would tag the routing frame with the domain ID and management domain state associated with that MAC. Domains would provide the effect of tunnels or VLANs, in that they keep packets (both unicast and multicast) within that domain, allowing MACs outside that domain to be able to neither sniff nor spoof those packets. Additionally, this approach would employ a five-bit domain ID. It would add options to control domain processing, such as, for example, a switch with a boolean per MAC that defines whether packets are delivered with non-defined (i.e., zero) domain ID, or a switch that has a boolean per MAC that defines whether packets are delivered with defined (non-zero) but non-matching domain IDs. A further option in the switch could turn off node encoded MAC addresses per MAC (eliminating another style of potential attack vector).
To keep management processor to management processor communication secure, the management domain bit on all management processor MACs could be marked. Generally, the management processor should route on domain 1 (by convention). Such a technique allows all the management processor's to tunnel packets on the management domain so that they cannot be inspected or spoofed by any other devices (inside or outside the fabric), on other VLANs or domains. Further, to provide a secure management LAN, a gateway MAC that has the management domain bit set could be assigned, keeping management packets private to the management processor domain. Additionally, the switch fabric could support “multi-tenant” within itself, by associating each gateway MAC with a separate domain. For example, each gateway MAC could connect to an individual port on an outside router, allowing that port to be optionally associated with a VLAN. As the packets come into the gateway, they are tagged with the domain ID, keeping that traffic private to the MACs associated with that domain across the fabric.
The switch supports a number of registers (aka CSRs, aka MMRs) to allow software or firmware to control the switch. The actual layout of these registers will be defined by the implementation. The fields listed in Table 10 are software read/write. All these registers need to have a mechanism to secure them from writing from the A9 (could be secure mode or on a management processor private bus).
The registers shown in Table 11 are contained within the Switch implementation, but need not be software accessible.
Note that software should be able to update the routing tables (unicastRoute) and the macAddrLookup CAM atomically with respect to active packet routing. One implementation will be to hold off routing access to these tables during an update operation.
Network Proxy
As is known, some protocols require a processor to be fully powered-up. Some examples are: 1) ARP packets—must respond because, if no response, then the processor becomes “unreachable”; 2) TCP SYN packets—must respond because, if no response, then an application is “unreachable”; 3) IGMP query packets—must respond because if no response, then multicast to the processor is lost; and 4) DHCP lease request—must generate because, if no lease request, then the processor will lose its IP address. Thus, when proxying, each incoming packet can be identified and then handled accordingly, as described below in more detail.
A proxy use sequence for the node in
Keep Alive Messages
It is common in servers for there to be an ongoing set of messages between servers that fall into the category of keep alive messages.
A keep alive is a message sent by one device to another to check that the link between the two is operating, or to prevent this link from being broken. A keep alive signal is often sent at predefined intervals. After a signal is sent, if no reply is received the link is assumed to be down and future data will be routed via another path or to another node.
Variants of the keep alive messages are used to see not only whether a node is available, but also whether the OS or even an application running on the node is available.
One side effect of these keep alive messages targeting a node is that it may make it difficult for the node to transition to a deep power saving state because it keeps getting hit with these periodic messages to check availability. This is another class of message that can be handled with this network proxy technique and offload response of these keep alive messages to the management processor, allowing the main processors to stay in a deep power saving state (sleep, hibernate, or powered off).
One MAC on a particular node can proxy for one or more other MACs on the same node by using Port Remapping Proxy. For example, if the processor 905 shown in
There is a Port Remapping (portRemap) field for each of the four MACs in the fabric switch that allows packets destined for a particular MAC to be routed to a another MAC instead. There is also a single bit Port Remapping Enable (portRemapEnable[ ]) field for each channel which determines whether the Port Remapping field should apply to packets received on this channel or not.
To begin proxying for another MAC, in one embodiment, the management processor 906 may first disable the MAC Channel FIFOs for the MAC that will be proxied for, any packets in the FIFOs should be allowed to drain first and then the MAC and DMA can be shutdown. Then, the Port Remapping fields can be used to indicate how the packets meant for the MAC that is being proxied for are to be redirected. Once these fields are programmed, any packets that are subsequently received that are destined for the MAC that is being proxied for on a Link or MAC Channel that has Port Remapping enabled would be redirected to the proxy MAC.
To end proxying for another MAC, the MAC Channel FIFOs should be first enabled and started, the MAC and DMA should be enabled and then the Port Remapping fields should be changed. Once the Port Remapping fields are changed, the MAC Channel will start receiving packets that were sent to it. For example, when the switch is to deliver a packet to an internal MAC0 port (e.g.
The Port Remapping Enable field allows some Link or MAC Channels to have packets received on those channels to be redirected based on the Port Remapping while other Link or MAC Channels the packets received will not be redirected based on Port Remapping. For example, enable Port Remapping for all channels except for the management processor MAC Channel, so that packets received on all channels except for the management processor MAC Channel that are destined for an internal MAC0 port (e.g.
In the system, one Node can proxy for a set of other Nodes. This would be used when an entire branch of the Fabric is to be powered off. When one Node acts as the proxy for a range of Nodes, the MACs on the proxy Node represent the MACs for all of the Nodes in the range. In other words, if a packet is being sent to MAC1 on a Node that is being proxied for, the packet will be delivered to MAC1 on the proxy Node.
In the Routing process, the switch first looks at whether the Routing Header indicates the packet is a multicast packet or a unicast packet (702.) For unicast packets, the switch further looks at the Destination Node ID of the Routing Header to decide whether the packet is delivered to an internal port within the node, or gets routed to other XAUI connected nodes. This is done by first comparing the Destination Node ID (dstNode) in the Routing Header with myNodeID (704.)
If the Destination Node ID (dstNode) matches myNodeID, there is a myNodeID hit and the packet will be routed to an internal port. The switch must then determine the port to which the packet should be routed. To determine the port to which the packet should be routed, the switch checks if the Port Remap Proxy is enabled for the current channel, and whether the port identified by the Destination Port ID (dstPort) in the Routing Header is being remapped to another port (706.) If the dstPort does not match the portRemap[dstPort] then a Port Remap Proxy hit has occurred When a Port Remap Proxy hit occurs, the switch sends the packet to the port given by portRemap[dstPort](710) and inserts the packet into the FIFO for rerouting (712) and the process is completed for that packet.
If the dstPort matches the portRemap[dstPort], then no proxy is occurring for that port and the switch sends the packet to the port given by dstPort (714) and inserts the packet into the FIFO for rerouting (712) and the process is completed for that packet.
In the Node Range Based Node Proxy embodiment, if the Destination Node ID (dstNode) does not match myNodeID, a Node Proxy Lookup is done (708) to check if the packet is destined for a Node for which the current Node is proxying. It requires checking whether Node Range Proxy is enabled for the current channel and whether the Destination Node ID (dstNode) in the Routing Header is within the Node ID range. The Node ID range causes the packet to be delivered to an internal port within the node if the following boolean equation is true:
(nodeRangeEnable[chan]&&(nodeRangeLo<=Destination_Node<=nodeRangeHi))
This allows a node to proxy for a subtree of nodes whose Node IDs fall in a numerical range. This Node Proxy Lookup is done prior to the Routing Table lookup, so that the Routing Table memory access can be avoided if the Node Proxy Lookup hits.
If the Node Proxy hits, the packet will be routed to an internal port and the switch must then determine the port to which the packet should be routed. The processes to determine the port to which the packet should be routed 706, 714, 710, and 712 are the same as described above with reference to
If the Node Proxy Lookup fails, then the switch reads the unicast routing table entry based on the dstNode (716) and determines the link to route the packet to based on a routing algorithm and Routing Table entry (718), inserts the packet into the FIFO (712) and the process is completed for the packet.
In the method using the routing table, the processes 702-706 and 710-714 are the same as described above with reference to
proxyEnable[chan]&&unicastRoute[dstNode][nodeProxyEnable]
If the above boolean equation is true, then a Node Proxy hit has occurred and the method proceeds to process 706 as described above. If the above boolean equation is false, then the switch determines which link to route the packet to based on a routing process and a Routing Table entry (756), inserts the packet into the FIFO (712) and the process is completed for the packet.
The Routing Table based Proxy embodiment differs from the Node Range based Proxy embodiment in that any node in the fabric can be proxied for regardless of the Node ID number while in the Node Range embodiment, the Node IDs that are to be proxied for must be in numerical order.
It is also possible to have one node proxy for another using the macAddrLookup mechanism described above. The MAC Lookup CAM takes a MAC address as input and returns a destination node and port. By changing the CAM to return a different node and port for a given MAC address, traffic destined for one system can be directed to another.
Specifically, when the system configures one server as a proxy for another, the management processors across the cluster need to change the MAC Lookup CAM on all of the nodes of a cluster to change the line for the MAC that is being shifted to point to the new destination server. As can be seen in Table 6 above, the required change is just to the Node ID field. Since all of the management processors are in contact with each other across the fabric, the change can be initiated by any node, but the CAM entry needs to be consistent across all nodes.
One benefit of this approach is that a set of MAC addresses can be shared across a set of nodes. When there is insufficient load to require all of the nodes, the MAC addresses can be consolidated across a subset of the nodes with the others powered off. When the load increases additional servers can be powered on and the shared set of MAC addresses redistributed to balance the load.
In a traditional desktop computer, the computer to be woken is shut down (sleeping, hibernating, or soft off; i.e., ACPI state G1 or G2), with power reserved for the network card, but not disconnected from its power source. The network card listens for a specific packet containing its MAC address, called the magic packet, broadcast on the broadcast address for that particular subnet (or an entire LAN, though this requires special hardware or configuration). The magic packet is sent on the data link or layer 2 in the OSI model and broadcast to all NICs within the network of the broadcast address; the IP-address (layer 3 in the OSI model) is not used. When the listening computer receives this packet, the network card checks the packet for the correct information. If the magic packet is valid, the network card takes the computer out of hibernation or standby, or starts it up.
The magic packet is a broadcast frame containing anywhere within its payload: 6 bytes of ones (resulting in hexadecimal FF FF FF FF FF FF), followed by sixteen repetitions of the target computer's MAC address. Since the magic packet is only scanned for the string above, and not actually parsed by a full protocol stack, it may be sent as a broadcast packet of any network- and transport-layer protocol. It is typically sent as a UDP datagram to port 0, 7 or 9, or, in former times, as an IPX packet.
Using the Network Proxy architecture just described, the management processor can support these Wake-On-LAN packets. It will get these broadcast packets, will know the MAC addresses for the other MACs on the node, and be able to wake up the main processor as appropriate. No further functionality is needed in the switch to support these Wake-on-LAN packets.
While the foregoing has been with reference to a particular embodiment of the invention, it will be appreciated by those skilled in the art that changes in this embodiment may be made without departing from the principles and spirit of the disclosure, the scope of which is defined by the appended claims.
This patent application is a continuation in part of and claims priority under 35 USC 120 and 121 to U.S. patent application Ser. No. 12/794,996 filed on Jun. 7, 2010 which in turn claims the benefit under 35 USC 119(e) to U.S. Provisional Patent Application Ser. No. 61/256,723 filed on Oct. 30, 2009 and entitled “System and Method for Enhanced Communications in a Multi-Processor System of a Chip (SOC), which are both incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61256723 | Oct 2009 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 12794996 | Jun 2010 | US |
| Child | 13692741 | US |
