a) and 5(b) are schematic sectional views showing a first step in the process of manufacturing a non-volatile semiconductor memory according to an embodiment of the present invention;
a) and 6(b) are schematic sectional views showing a second step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
a) and 7(b) are schematic sectional views showing a third step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
a) and 8(b) are schematic sectional views showing a fourth step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
a) and 9(b) are schematic sectional views showing a fifth step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
a) and 10(b) are schematic sectional views showing a sixth step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
a) and 11(b) are schematic sectional views showing a seventh step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
a) and 12(b) are schematic sectional views showing an eighth step in the process of manufacturing a non-volatile semiconductor memory according to the embodiment of the present invention;
Number | Date | Country | Kind |
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2006-56284 | Mar 2006 | JP | national |