Nonvolatile memory device and method for fabricating the same

Abstract

A nonvolatile (e.g., flash) memory device includes a substrate having a plurality of isolation areas and active areas; a trench formed on the isolation area; a first electrode layer formed on an inner wall of the trench; a first gate oxide layer formed between the inner wall of the trench and the first electrode layer; a junction area formed on the active area; a second gate oxide layer formed on the entire surface of the substrate including the first electrode layer, the first gate oxide layer, the trench and the junction area; a tunnel oxide layer formed on a part of the second gate oxide layer corresponding to the active area; and a second electrode layer formed on the active area and in the trench.

Description

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a view representing a flash memory device according to the related art;

FIG. 2 is a view representing a flash memory device according to an exemplary embodiment of the present invention; and

FIGS. 3 a to 3h are views representing the method for fabricating the flash memory device according to an exemplary embodiment of the present invention.

Claims

1. A nonvolatile memory device comprising: a substrate having a plurality of isolation areas and active areas;a first trench in at least one of the isolation areas;a first electrode in the first trench;a first gate oxide layer between an inner wall of the first trench and the first electrode layer;a junction area in at least one of the active areas;a second gate oxide layer on a surface of the substrate including the first electrode layer, the first gate oxide layer, and the junction area;a tunnel oxide in a part of the second gate oxide layer in the active area; anda second electrode in at least one of the active areas and in the first trench.

2. The nonvolatile memory device of claim 1, wherein a part of the second electrode layer in the first trench has a greater thickness than remaining parts of the second electrode layer.

3. The nonvolatile memory device of claim 1, wherein the tunnel oxide has a thickness less than that of the second gate oxide layer in the active area.

4. The nonvolatile memory device of claim 1, wherein the junction area comprises a source on a first side of the second trench and a drain on an opposite side of the second trench.

5. The nonvolatile memory device of claim 1, further comprising an access gate in a part of one of the active areas not occupied by the second electrode.

6. The nonvolatile memory device of claim 1, wherein the access gate comprises a same material and has a same thickness as the second electrode in the one active area outside the second trench.

7. The nonvolatile memory device of claim 1, wherein first electrode functions as a control gate of the nonvolatile memory device.

8. The nonvolatile memory device of claim 1, further comprising a shallow trench isolation structure in a second trench in another isolation area.

9. A flash memory, comprising the nonvolatile memory device of claim 1.

10. A method for manufacturing a nonvolatile memory device, the method comprising the steps of: forming a first trench in a first isolation area of a substrate having a plurality of isolation areas and a plurality of active areas;forming a photoresist pattern so as to cover an entire surface of the substrate except for the first trench;sequentially forming a first gate oxide layer and a first electrode layer on the entire surface of the substrate including the photoresist pattern and the first trench;forming a protective material layer on the entire surface of the substrate so as to fill the first trench;planarizing the first gate oxide layer, the first electrode layer and the protective material layer, until the photoresist pattern is exposed;etching the first gate oxide layer, the first electrode layer and the protection material to reduce a thickness thereof;forming a spacer at sides of the photoresist pattern so as to cover the first gate oxide and the first electrode layer;removing the exposed protective material using the spacer as a mask;removing the photoresist pattern and the spacer;forming a junction area in at least one active area;forming a second gate oxide layer on the at least one active area;removing a part of the second gate oxide layer on the junction area to expose a part of the junction area;forming a tunnel oxide on the exposed junction area; andforming a second electrode on the at least one active area and in the first trench.

11. The method of claim 10, wherein the second electrode has a thickness in the first trench greater than that of the second electrode on the junction area.

12. The method of claim 10, wherein forming the second electrode further comprises forming an access gate in a part of the at least one active area not occupied by the second electrode.

13. The method of claim 10, wherein forming the junction area comprises implanting a dopant ion to form a source on a first side of the first trench and a drain on an opposite side of the first trench.

14. The method of claim 10, further comprising preparing the substrate having the isolation areas and the active areas.

15. A method for manufacturing a nonvolatile memory device, comprising: forming a trench in a substrate;sequentially forming a first gate oxide layer and a first electrode layer on an inner wall of the trench;forming a junction area by implanting a dopant into an active area of the substrate;forming a second gate oxide layer on an entire surface of the active area;exposing a part of the junction area by removing a part of the second gate oxide in the junction area;forming a tunnel oxide on the exposed junction area;forming a second electrode on the active area and in the trench.

16. The method of claim 15, wherein the second gate oxide layer is formed on the first electrode in the trench.

17. The method of claim 15, wherein the tunnel oxide has a thickness less than a thickness of the second gate oxide layer.

18. The method of claim 15, wherein the junction area is adjacent to the trench.

19. The method of claim 15, further comprising preparing the substrate having the isolation areas and the active areas.