The present invention relates to the field of optical sub-assemblies (OSA) and in particular to a new wafer scale OSA and method of production thereof.
The packaging methods currently used for optical transceivers, regardless of whether the end application is datacom or telecom, are dominated by the TO-can and transceiver design combination. TO-can packaging of an opto-electrical conversion device generally includes a metallic case with a transmission window or opening on top for transmitting or receiving optical signals. As such, the TO-can is the first line of packaging used to embed an optoelectronic die followed by the transceiver PCB which is used to carry higher power signal recovery and interface chips. These interface chips are themselves already packaged when attached to the transceiver PCB. A good example of an industry standard design is the dominant SFF/SFP transceiver, as defined by the SFF Committee.
As is known to those skilled in the art, the design of a TO-can package based device is such that it has to be individually constructed and aligned. As a result the cost of TO-can packaging is disproportionate to the cost of the device that it packages. This is compounded by the additional complexity on the transceiver PCB which has to be assembled and integrated with the TO-can package.
By way of example, a generic TO-can packaged, optoelectrical conversion device 1 is presented in
Any optical signal 5 to or from the optoelectronic device 2 has to be focussed by means of a lens, or other similar system, that guides the light into a fibre 6. In the case of a TO-can package 3, this is typically a ball lens 7 that is part of an actively aligned cap assembly.
Alternatively, there are newer MEMs approaches to the integration of optoelectronics that are known to those skilled in the art, a generic depiction of which is presented schematically in
Any optical signal 5 to or from the optoelectronic device 2 has to be focussed by means of a lens, or other similar system, that guides the light into the fibre 6. In the case of a MEMs device, this is typically a hemispherical lens 11 that is placed using active alignment techniques onto the transparent cap 9.
It will be appreciated that the design of
According to a first aspect of the present invention there is provided an optical wafer the optical wafer comprising a transparent substrate embedded within which is at least one optical channel.
Such an optical wafer is resilient to dust, dirt, contaminants and further processing because of the embedded nature of the optical channel. Furthermore, the embedded nature of the optical channel makes the wafer an ideal carrier for an optical sub-assembly (OSA).
Most preferably the optical wafer comprises at least one reference fiducial.
The incorporation of the reference fiducial provides the optical wafer, and any subsequent OSA with passive alignment facility that means that alignment errors do not stack.
Preferably the at least one reference fiducial is embedded within the transparent substrate. Alternatively the at least one reference fiducial is located on an external surface of the transparent substrate.
Optionally the at least one optical channel comprise a refractive optical component. Alternatively, the at least one optical channel comprise a waveguide optical component.
Most preferably embedded within the optical wafer are two or more optical channels and an embedded crosstalk reduction trench located between the two or more optical channels.
The presence of the crosstalk reduction trench significantly reduces the detrimental effects of crosstalk between the two or more channels.
Preferably the transparent substrate comprises a transparent layer and a transparent cap.
Optionally at least one of the two or more optical channels comprises a refractive optical component located within the transparent layer.
Optionally at least one of the two or more optical channels comprises a refractive optical component located within the transparent cap.
Optionally the at least one reference fiducial comprises a first fiducial section located within the transparent layer and a second fiducial section located within the transparent cap.
Optionally the crosstalk reduction trench comprises a first trench located within the transparent layer and a second trench located within the transparent cap.
Optionally the crosstalk reduction trench comprises an optically opaque material. Alternatively, the crosstalk reduction trench comprises an optically diffuse material. In a yet further alternative the crosstalk reduction trench comprises an optically reflective material.
According to a second aspect of the present invention there is provided an optical sub-assembly (OSA), the optical sub-assembly comprising an optical carrier wherein the optical carrier comprises an optical wafer in accordance with the first aspect of the present invention.
Incorporating the optical wafer of the first aspect of the present invention allows for the OSA to be assembled directly on the optical wafer. This is only feasible because of the resilience of the optical system design. Additional features of the OSA can be structured or fabricated on the optical wafers without the need for active alignment of lenses as a post process due to the presence of the reference fiducial.
Most preferably the OSA further comprises at least one mechanical alignment hole which extends through the transparent substrate. The presence of the mechanical alignment holes provide a female to mate with the male of a connector to be attached to the OSA.
Preferably the OSA further comprises an electrical connection layer processed on a first surface of the transparent substrate.
Optionally the OSA further comprises an anti-reflection coating processed on a second surface of the transparent substrate.
Most preferably the OSA further comprises an optoelectronic device electrically connected to the electrical connection layer.
Optionally the OSA further comprises a glob top arranged to provide physical protection to at least part of the optoelectronic device.
Preferably the glob top comprises a hydrophobic material.
Alternatively the OSA further comprises a shell wafer arranged to provide physical protection to at least part of the optoelectronic device.
Most preferably the shell wafer comprises sealing ring such that the shell wafer hermetically seals the optoelectronic device within a central cavity.
Preferably the central cavity is filled with an inert gas.
Optionally one or more components of the optoelectronic device are mounted on an anterior surface of the shell wafer such that they do not make direct contact with the optical wafer.
Preferably the central cavity comprises one or more shelves wherein the anterior surface of the shell wafer corresponding to the one or more shelves lies closer to the optical wafer than the anterior surface of the remainder of the central cavity.
Most preferably a thermal interface material is located on the one or more shelves.
Optionally the shell wafer comprises a flex based shell wafer. Optionally the flex based shell wafer comprises a heat sink thermally connected to a posterior surface of the flex based shell wafer.
Alternatively the shell wafer comprises a ball grid array (BGA) based shell wafer.
According to a third aspect of the present invention there is provided an optical sub-assembly wafer wherein the optical sub-assembly wafer comprises one or more OSA in accordance with the second aspect of the present invention.
According to a fourth aspect of the present invention there is provided a method of production of an optical wafer the method comprising the step of embedding at least one optical channel within a transparent substrate.
Most preferably the step of embedding at least one optical channel within the transparent substrate comprises the steps of
Preferably the method further comprises the step of processing the transparent cap so as to provide the transparent cap with at least one reference fiducial.
Preferably the step of bonding the transparent cap to the transparent layer results in the alignment of the at least one reference fiducials of the cap and the layer.
Optionally the step of processing the transparent cap comprises the step of providing a lens trench suitable for locating with the at least one lens of the transparent layer.
Optionally the step of processing the transparent cap comprises the step of providing at least one isolation planes suitable for ensuring that light is not reflected back along the optical channel.
Most preferably the step of processing the transparent cap comprises providing the transparent cap with at least one lens such that when bonded to the transparent layer the optical wafer comprises two or more embedded optical channels.
Most preferably the method further comprises the step of processing the transparent layer and transparent cap so as to provide a crosstalk reduction trench between the two or more embedded optical channels.
Preferably this step comprises the processing of a first trench within the transparent layer and a second trench within the transparent cap the first and second trenches being aligned when the transparent cap is bonded to the transparent layer.
Optionally the first and/or second trenches are filled with an optically opaque material prior to bonding.
Alternatively, the step of embedding at least one optical channel within the transparent substrate comprises the step of processing the transparent substrate so as to form at least one sub-surface optical channel.
Preferably the transparent substrate is further processed so as to provide at least one reference fiducial.
Preferably, the step of processing the at least one reference fiducial comprises the steps of:
Optionally the processing the transparent substrate so as to form at least one sub-surface optical channel comprises the step of focussing a low powered laser within at least one subsurface region of the transparent substrate so as induce a thermal refractive index change within the subsurface region.
Optionally the induced thermal refractive index change is controlled so as to process a lens within the subsurface region. Alternatively, the induced thermal refractive index change is controlled so as to process a waveguide within the subsurface region.
Preferably the step of embedding at least one optical channel comprises processing the transparent substrate so as to provide the transparent substrate with two or more embedded optical channels.
Most preferably the method of production of an optical wafer further comprises the step of processing a subsurface region of the transparent substrate so as provide a crosstalk reduction trench between the two or more embedded optical channels.
Preferably the step of processing the subsurface region of the transparent substrate so as provide a crosstalk reduction trench comprises the step of focussing a high powered laser within the subsurface region. This method produces a crosstalk reduction trench that comprises a highly diffusing or opaque region of the transparent substrate.
Alternatively, the step of processing the subsurface region of the transparent substrate so as provide a crosstalk reduction trench comprises the step of focussing a low powered laser within the subsurface region. This method produces a crosstalk reduction trench that exhibits a different refractive index from the non processed regions of the transparent substrate.
According to a fifth aspect of the present invention there is provided a method of producing an optical sub-assembly the method comprising the steps of:
Optionally the method of producing an optical sub-assembly further comprises the step of bonding a glob top to the optical wafer so as to provide physical protection to at least part of the optoelectronic device.
Preferably the method of producing an optical sub-assembly further comprises the step of bonding a shell wafer to the optical wafer so as to provide physical protection to at least part of the optoelectronic device.
Most preferably the method of producing an optical sub-assembly further comprises the step of cutting the optical wafer so as to singulate the optical sub-assembly.
Aspects and advantages of the present invention will become apparent upon reading the following detailed description and upon reference to the following drawings in which:
The following sections describe two distinct designs of optical wafer which form the central building block for the later described optical sub-assemblies (OSAs), namely:
The embedded refractive optical channel design relies on a refractive index change to lens light between an optoelectronic device and a fibre, whereas the embedded waveguide channel design manipulates light by effectively writing a fibre within the optical wafer.
To assist clarity of understanding, the following described embodiments present two channel assemblies, transmit channel C1 and receive channel C2, designed for MT-RJ connectors. It should be noted however, the later described OSA are specifically meant to be scalable in two dimensions enabling arrays such as 1×12, 6×12 or perhaps even greater, and as such the optical wafers 12 and 13 are scalable in a similar manner. In certain circumstances it may even be envisaged to produce a single channel OSA.
It will also be appreciated that, under normal commercial circumstances, the construction of all optical channels would be identical. For illustrative purposes however, some of the described embodiments below show design variations between the two channels C1 and C2.
The described embodiments do not state lens radii, sidewall steepness nor material type and thickness. It will however be appreciated by those skilled in the art that such parameters need to be calculated, as appropriate, for each different application.
The terms “transparent” and “opaque” employed throughout the following description relate to the optical properties of particular components of the device relative to the wavelength of the light generated by the associated light sources.
Optical Wafer with Embedded Refractive Optical Channels
a) presents a schematic representation of a dual layer optical wafer 12a, with embedded refractive optical channels, C1 and C2. Dual layer optical wafer 12a can be seen to comprise a transparent substrate made up of a transparent layer 14 and a transparent cap 15 both having a thickness of −0.5 mm. Both of these layers are significantly larger than the schematic representations of
Methods of production of the transparent layer 14 and cap 15 are described in further detail below. It can be seen however that the adjacent surfaces of the layer 14 and the cap 15 are preformed with two negative reference fiducial points 17a, 18a, 17b and 18b, a lens, 19a and 19b, and a crosstalk reduction trench 20a and 20b, such that when bonded together the dual layer optical wafer 12a comprises two embedded channels, C1 and C2 which are optically isolated by the crosstalk reduction trench 20.
In this embodiment each channel C1 and C2 comprises a lens 19 and a dedicated reference fiducial 17 and 18.
Incorporating the plurality of fiducial points 17a, 18a, 17b and 18b provides a number of advantages to this design. Firstly, wafer to wafer bonding requires two spaced reference points to ensure the accuracy of rotational alignment. Secondly, an alignment feature should always be close to an optical channel (C1 or C2) to enable accurate flip-chip bonding with reference to that channel. The further away the alignment feature is located, the less accurate the alignment will be.
An alternative embodiment of the optical wafer with embedded refractive optical channels is presented in
Optical Wafer with Embedded Waveguide Optical Channels
a) presents a schematic representation of a first embodiment of an optical wafer 13a, with embedded waveguide optical channels, C1 and C2. In this embodiment the optical wafer 13b comprises a single, optically transparent substrate having a thickness of ˜1 mm. The two embedded channels, C1 and C2 are again optically isolated by a crosstalk reduction trench 20.
In this embodiment however, channels C1 and C2 each comprises an embedded waveguide 22a and a dedicated reference fiducial, 21, located on an external surface of the optical wafer 13b. The cross section of the embedded waveguides 22a is either circular or square, depending on the processing method.
Incorporating dedicated reference fiducials, 21 again provide the advantage that there is an alignment feature close to each optical channel (C1 or C2) so as to assist with accurate flip-chip bonding with reference to that channel.
An alternative optical wafer 13b, with embedded refractive optical channels, C1 and C2, is presented in
Sample materials for the production of the abovementioned layer 14, cap 15 and optical wafers 12b and 13 include, but are not limited to, glass, glass ceramic, photoformable glass. It should also be noted that each of the optical wafers 12a, 12b 13a, and 13b are significantly larger than shown in the relevant Figures, as is indicated by the cut away edges 16.
Method of Production of an Optical Wafer with Embedded Refractive Optical Channels
There now follows a detailed description of a number of methods of production of optical wafers 12 with embedded refractive optical channels, C1 and C2.
In the first instance a method of production of a dual layer optical wafer 12a is provided with reference to
The first stage involves the production of the transparent layer 14, as shown in
Next, the transparent layer 14 is processed with the fiducial point 17a, which act as a reference point for all assembly of the optical wafer 12a. Normally the fiducial point 17a is formed on the same side of the transparent layer 14 as the lenses 19a are to be formed to ensure that alignment accuracy is maintained. However, there are certain circumstances where it is advantageous to form the fiducial point 17a on the opposite or on both sides of the transparent layer 14.
The preferred method is to incorporate a negative fiducial point using techniques such as direct laser writing or an etch. Positive fiducial points by deposition are also feasible if they are on the opposite side to the lenses 19a, but deposition on the same side as the lenses 19a will result in poor wafer to wafer bond quality at a later stage.
It is important to note that there are typically multiple alignment fiducial points 17a across the transparent layer 14. A minimum of two is required for even vaguely accurate alignment.
The optical lenses 19a are then cut with reference to the fiducial point 17a. The preferred method is a first pass using laser cutting, however other methods such as etching may alternatively be employed.
The next step is to create the crosstalk reduction trench 20a. This design of trench 20a is such that total internal reflection is employed to prevent adjacent optical channel crosstalk. Given its depth, fabrication of the trench 20a is preferably done by laser cutting or a fast etch process. It will be appreciated that care should be taken to only go part way through the transparent layer 14 and not to break through to the other side. Doing so would compromise structural integrity for the following processes, and also results in poor tracking as the metals would create teardrops around the resultant holes.
It should be noted that the sidewalls of the crosstalk reduction trench 20a are unlikely to be perfectly straight for a number of practical reasons. The sidewall angle should be adjusted and optically modelled to suit the application. Surface roughness on the sidewalls is however found not to be particularly critical.
The lenses 19a are then smoothed with a final post-process. Processing examples include laser smoothing, thermal annealing, material deposition, chemical etching or moulding of the carrier. This is essential to ensure the quality of the lenses 19a so resulting in low optical coupling losses.
Further optional steps in the production of the transparent layer 14 are provided within the inserts of
The second stage of production of the dual layer optical wafer 12a involves the production of the cap 15, as shown in
Next, the cap 15 is processed with alignment fiducial 17b which acts as a reference point for all assembly of the cap 15. This is carried out in a similar manner as discussed above with respect to the alignment fiducial 17a of the transparent layer 14.
More often than not, there will be nothing cut in the cap as shown in channel C1 of
The next step is to create the crosstalk reduction trench 20b. This reduction trench 20b is produced, and functions in a similar manner to the reduction trench 20a described above in connection with the transparent layer 14. Care should again be taken to ensure that the reduction trench 20b does not go all the way through the cap 15 otherwise the structural integrity may be compromised given that a connector will be butted up to the cap 15. This may also result in a poor surface layer for post processing such as, but not limited to, polishing or AR coating.
If the lens trench 26 is present, it will need to be smoothed with a final post-process. Processing examples include laser smoothing, thermal annealing, material deposition, chemical etching or moulding of the carrier. This is essential to ensure the quality of the optical interface so providing low optical coupling losses.
In a similar manner to that described above in relation to the transparent layer 14, further optional steps in the production of the cap 15 can be incorporated. These additional steps are presented schematically within the inserts of
The final step to reach the configuration shown in
Methods of production of the single layer optical wafer 12b of
There are then two distinct methods employed for the processing of the wafer 12b. The choice of method depends upon the material from which the optical wafer 12b is made however, both employ laser processing techniques.
Method 1—non-photoformable optical wafers
The first method described is particularly suited when the optical wafer 12b comprises a non-photoformable glass. Processing is then carried out with a high power laser, for example a femtosecond pulsed laser. By varying laser power and focus different features can be cut. Low power pulses will cause a thermal refractive index change that can be focussed subsurface to create optical structures. Higher power pulses cause thermal expansion and microfine cracking to occur. Cracked glass etches preferentially, allowing the cracked glass to be washed away.
The initial stage of producing the single layer optical wafer 12b involves the processing of fiducial point 21, which act as a reference point for all assembly of the optical wafer 12b. Normally the fiducial 21 is created on the same side to that from which the wafer is being processed by the laser to ensure that alignment accuracy is maintained, however there are certain circumstances where it is advantageous to form fiducials 21 on the opposite, or on both side of optical wafer 12b. The preferred method is to produce a negative fiducial 21 formed by the application of the high powered laser. Since the laser power cracks the optical wafer 12b then subsequent etching allows the fiducial 21 to be formed in a highly controlled manner.
The second stage of the process involves the writing of the negative lens 19c in channel C1 and the positive lens 19d in channel C2, both being written with reference to negative fiducial 21. To process these features low power light from the laser is focussed subsurface within the optical wafer 12b thus enabling the resultant thermal refractive index changes to be employed in a controlled manner so as to create the required optical structures.
The third stage of the process is to create the crosstalk reduction block 20. The location of the crosstalk reduction block 20 is carefully aligned with reference to negative fiducial 21 and formed by employ high laser power so as to create a highly diffusing area within the optical wafer 12b. Alternatively, this third stage may be carried out by employing low laser power so as to create an area of significant refractive index change. Under certain circumstances this may be sufficient to reduce the crosstalk between channels C1 and C2 to a commercially acceptable level.
Method 2—photoformable optical wafers
The second method is particularly suited when the optical wafer 12b comprises a photoformable glass, and in particular a ceramicizable glass. By varying the processing laser's power and focus, different features can be processed. At low power, the refractive index of the glass is again thermally changed. At higher power, the glass will ceramicize, becoming opaque and can be etched significantly faster than the unaffected glass thus allowing it to be preferentially dissolved away.
The initial stage of producing the single layer optical wafer 12b involves the processing of fiducial point 21, which act as a reference point for all assembly of the optical wafer 12b. The preferred method is to produce a negative fiducial 21 formed by the application of the high powered laser. Since the laser power ceramicizes the optical wafer 12b then subsequent etching allows the fiducials 21 to be formed in a highly controlled manner.
The second stage of the process involves the writing of the negative lens 19c in channel C1 and the positive lens 19d in channel C2, both being written with reference to negative fiducial 21. To achieve this low power light from the laser is again focussed subsurface within the optical wafer 12b thus enabling the resultant thermal refractive index changes to be employed in a controlled manner so as to create the required optical structures.
The third stage of the process is to create the crosstalk reduction block 20. The location of the crosstalk reduction block 20 is carefully aligned with reference to negative fiducial 21 and formed by employ high laser power so as to create a highly opaque area within the optical wafer 12b. Alternatively, this third stage may be carried out by employing low laser power so as to create an area of significant refractive index change. Under certain circumstances this may be sufficient to reduce the crosstalk between channels C1 and C2 to a commercially acceptable level.
Method of Production of an Optical Wafer with Embedded Waveguide Optical Channels
There now follows a detailed description of a number of methods of production of optical wafers 13 with embedded waveguide optical channels, C1 and C2 e.g. see
As previously discussed, before processing it is normally prudent to apply sacrificial layers 23a and 23b to the optical wafer 13.
The first processing stage is again to create the alignment fiducials 21 which act as reference points for all the subsequent assembly. These features can be created in an identical manner to that described previously with respect to the optical wafers 12 with embedded refractive optical channels, C1 and C2, see above methods 1 and 2.
The second stage of the process involves the writing of the optical waveguides 22a in channels C1 and C2. Both the optical waveguides 22a are written with reference to negative fiducial 21. To achieve this low power light (whether employing non-photoformable or photoformable materials) is focussed subsurface within the optical wafer 12b thus enabling the resultant thermal refractive index changes to be employed in a controlled manner so as to create the required optical structures. As discussed previously with respect to
The third processing stage is again to create the crosstalk reduction block 20 which act to prevent optical cross talk between the channels C1 and C2. This feature is created in an identical manner to that described previously with respect to the optical wafers 12 with embedded refractive optical channels, C1 and C2, see above methods 1 and 2.
Below are a number of significant points to note in relation to the optical wafer 12b, 13a, and 13b and the above described methods of production:
There now follows a detailed discussion of the assembly of an OSA 28 in accordance with an aspect of the present invention. It will be appreciated by those skilled in the art that any of the above described optical wafers 12a, 12b, 13a, or 13b may be employed as the carrier for the OSA 28. However, for the purposes of illustration, the following examples are based on employing the dual layer optical wafer 12a of
The first processing stage involves the step of removing the sacrificial layers 23a and 23b, if present on the external surfaces of the dual layer optical wafer 12a. This gives a clean surface on which to define subsequent layers.
The second step is to apply an electrical connection layer, shown as layer 29 within
Depending on the carrier used, additional layers may be required such as adhesion layers. Alignment of the electrical connection layer 29 is achieved with respect to fiducials 17 and 18, depending on design. Since subsequent processing is required, it is recommended that sacrificial layers 23a and 23b are reapplied to protect the connections. The electrical connections are defined at this point given that it will not be possible to pattern the wafer post drilling.
Before applying sacrificial layer 23b, an optional process step is to deposit an AR coating 24b to reduce back reflection into the MT connector and improve overall device performance. As this is a bulk coating no alignment is necessary. The AR coating 24b type should however be chosen bearing in mind that this layer will be drilled through as described below with reference to
The second stage in the production of OSA 28 involves the cutting of mechanical alignment pin holes 30 which subsequently act as the guides for an MT connector. The positions of the mechanical alignment pin holes are set with reference to fiducials 17 and 18 and the preferred method of production is by laser drilling given the depth of holes required. There are three distinct laser drilling methods that can be used depending on the carrier material:
All of the machining methods described above are likely to result in a sloped sidewall for the mechanical alignment pin holes 30. This must be carefully controlled, but may be used beneficially as a guide for the mechanical contact, if done correctly.
Laser machining of the dual layer wafer design 12a must take into account the bond layer between the transparent layer 14 and the cap 15, and any changes to material properties, or adhesive layers present that may need to be drilled through.
Further, alternative techniques for the formation of the mechanical alignment pin holes 30 include mechanical drilling/grinding whether with bit, sand or liquid, or moulding/performing of the wafer.
Although the above described embodiments comprise two mechanical alignment pin holes 30 aspects of the present invention are not limited to this number. It will be appreciated by those skilled in the art that advantages will be achieved with the incorporation of one or more mechanical alignment pin holes 30.
Underfill 35 may be also be used to improve optical coupling and general stability of the OSA 28.
Optionally, as shown in insert
Importantly, it should be noted that the alignment of the entire system is based upon the tolerances of the assembly equipment. Alignment is always to reference one or more reference fiducials 17 and 18, depending on design. Therefore the design is unique in that tolerance errors do not stack. This passive methodology is unusual in the field of optoelectronics.
For many practical applications the design of the OSA 28 is completed by the addition of a glob top 36, as presented in
In an alternative, and indeed preferred embodiment, the next stage in the construction of the OSA 28 is the addition of a shell wafer 38. The shell wafer 38 is designed to give a partially, or fully hermetic seal, and can also be used to add further functionality to the device e.g. function as a heat sink, as described in further detail with reference to
a) show a first example of a shell wafer 38a suitable for completing the OSA 28. As with the previously described optical wafers 12 and 13, this wafer is significantly larger than shown as is again represented by the cut away edges 16. The processing of shell wafers is known to those skilled in the art and can be achieved by existing technologies such as a silicon microbench, high or low temperature co-fired ceramic or any other similar micro-circuit capable technology. Importantly, however, is the fact that all processing of the shell wafer is done with reference to a single point 39 which acts as a common fiducial and will ultimately be aligned with fiducials (17, 18 or 21 depending on design).
To complete the OSA 28 the shell wafer 38a has four basic requirements, namely.
An alternative shell wafer 38b is shown in
There are two additional options that can be added to the shell wafers, see shell wafers 38c and 38d presented in
The first option is to bond the high power die 47 into the silicon shell wafer 38c and 38d. This physically removes this element from the lower power, and normally temperature sensitive, optoelectronic components 31, 32, and 33. In particular, the shell wafer 38c and 38d provides the necessary heat sinking required by the higher power components (e.g. die 47) as well as a platform to wire bond 48 them to the OSA's 28 electrical connections 43 or 46.
The second option further enhances the OSA's 28 thermal management strategy by incorporating raised portions 49 within the central cavity 41 of the shell wafer 38c and 38d. On assembly, and with the aid of a thermal interface material 50, heat can be sunk from devices 31, 32, and 33 attached to the optical carriers 12. The choice of the thermal interface material 50 is highly critical. If the coefficient of thermal transfer is either too high or too low, there is the risk that heat makes its way from the high power die 47 back into the temperature sensitive components or that insufficient heat is removed from the high power die 47 to allow it to function correctly.
A further option is to combine the raised portions 49 with sunken sections 51, see
It should be noted that these design strategies require thermal modelling, know to those skilled in the art, to exactly parameterise the design of the optical sub-assembly based on the desired set of components to be packaged.
The separation of low and high power devices allows unusual functionality to be added to the OSA 28. At the lower end of the scale, the remaining components on the transceiver PCB can be integrated thus significantly reducing the overall size of a transceiver. At the upper end of the scale, an FPGA with an embedded transceiver can be added to provide further functionality such as protocol transparency and on chip reconfigurability.
This type of device is referred to as dynamic serial optical interconnect (DSOI).
The final processing step before singulation is carried out is to bond the shell wafer, 38a, 38b, 38c, or 38d, to the optical wafer 12a using the sealing ring 40 and the above described methods.
To singulate out the devices, a staggered cut is necessary for the flex based OSA 28a of
It should be noted that the BGA based OSA 28b does not need the cut 57 as the electrical tracks 46 come through to the posterior surface of the shell wafer 38c.
In the flex based OSA 28a, an optional heat sink 58 can easily be added, allowing higher power devices to be incorporated into the package.
Detailed above are wafer scale optical sub-assembly (OSA) designs and methodologies comprising embedded optical coupling protected from the environment. The OSAs are fitted with optical transmit and/or receive elements for light transmission through an optically transparent carrier and include an integrated crosstalk reduction feature. All of the component elements are passively aligned to a master reference structure.
In addition, there are some further optional, advantageous design features. These include a hermetic shell wafer and the ability to add functionality, including protocol independence and a method of tuning thermal dissipation to ensure that unique temperature requirements can be met for each device.
It is important to note that the order of the above described processing stages is highly flexible. The particular order of the stages ultimately depends on the materials and design options selected for the OSA.
The described OSAs are intended to provide a credible alternative to the TO-can package transceiver combinations known in the art. The described OSAs address many of the outstanding issues in transceiver design by offering a high density MT connector compatible design suitable for high volume wafer scale manufacture.
In particular, the optical sub-assembly designs outlined above provide a number of improvements over existing assemblies in that they add a set of features that are considered unique, namely:
The foregoing description of the invention has been presented for purposes of illustration and description and is not intended to be exhaustive or to limit the invention to the precise form disclosed. The described embodiments were chosen and described in order to best explain the principles of the invention and its practical application to thereby enable others skilled in the art to best utilise the invention in various embodiments and with various modifications as are suited to the particular use contemplated. Therefore, further modifications or improvements may be incorporated without departing from the scope of the invention herein intended.
Number | Date | Country | Kind |
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0813396.9 | Jul 2008 | GB | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/GB2009/050906 | 7/22/2009 | WO | 00 | 5/17/2011 |