Patent Application
20200280132
The present application relates to the field of communications technologies, and in particular, to a patch antenna unit and an antenna.
Currently, in a wireless personal communications system (WPAN), application of a 60 gigahertz (GHz) frequency band has aroused people's interest, because people need a bandwidth higher than 7 GHz. Requirements for such a high bandwidth and a millimeter wave bring about many challenges for design of a microwave terminal application. Usually, a 60 GHz wireless front-end product is implemented based on expensive gallium arsenide microwave integrated circuits. Some wireless front-end products are implemented based on silicon-germanium integrated circuits to reduce costs. In such front-end products, an antenna and a chip are usually disposed together, or an antenna is included in a packaging body (system in chip or system on chip) using multiple modules. An antenna plays a very important role in the application of the 60 GHz bandwidth. In a latest technology, an antenna may be designed on a conventional dielectric layer substrate, and an antenna and a chip are simultaneously packaged into a packaging body using a multichip module (MCM) packaging technology. Therefore, costs and a size can be reduced, and a feature and specifications of a communications chip can be implemented, thereby enhancing competitiveness of the product.
In the other approaches, manners for implementing a 60 GHz antenna device in a packaging body mainly include: 1) a multi-layer dielectric layer substrate is used, where an antenna array is disposed on a first layer, a feeder is disposed on a second layer, and a ground plane is disposed on the second layer or a third layer to implement integration of a passive antenna device; and 2) an antenna is designed on an integrated circuit, a substrate is disposed below the integrated circuit, and a passive device is directly bonded to a chip using a packaging technology.
In other approaches, a 60 GHz antenna device is implemented on a substrate in a packaging body. The antenna is implemented in a feeder-to-slot manner. To match a slot antenna, the antenna is implemented by means of a slot bended for 90°. An input line of a slot feeder and an input line of the feeder are on a same straight line. With this design, an area is reduced and a bandwidth can be increased. The antenna structure is designed in a metal carrier with a forked slot, so that the antenna has a relatively high strength, and can be easily integrated with a metallic reflector. The antenna is generally fabricated based on a substrate with multiple layers of low temperature co-fired ceramic (LTCC).
However, when the antenna with the foregoing structure is used, in many processes for implementing antenna packaging, if the antenna uses slot feeding, an antenna gain is greatly affected by a fabrication process, and an antenna frequency bandwidth is not easily controlled. This integration manner cannot be implemented in some mass fabrication scenarios.
In other approaches, multiple support layers and a patch antenna array are disposed on a top layer of a substrate, a feeder between a first dielectric layer and a second dielectric layer is used for antenna feed-in, and a ground plane is disposed between the second dielectric layer and a third dielectric layer.
In other approaches, feed-in is performed on the second layer, if a return loss is −10 decibels (dB), a bandwidth is approximately 4.6 GHz; and a return loss of a 65 GHz antenna is only −7 dB. Because an antenna gain is relatively low, 16 patch antennas are used to increase the gain. Consequently, an area increases, and an antenna feature is not good.
The present application provides a patch antenna unit and an antenna to improve efficiency of the antenna.
In a first aspect, an embodiment of the present application provides a patch antenna unit, and the patch antenna unit includes a first support layer, a substrate disposed on the first support layer in a stacked manner, a second support layer disposed on one side that is of the substrate and that is away from the first support layer, and an integrated circuit disposed on one side that is of the second support layer and that is away from the substrate, where a first radiation patch is attached to one side that is of the first support layer and that is away from the substrate; a second radiation patch is attached to one side that is of the substrate and that is away from the second support layer, and the first radiation patch and the second radiation patch are center-aligned; a first ground layer is disposed on one side that is of the second support layer and that faces the substrate, a coupling slot is disposed on the first ground layer, a feeder coupled and connected to the first radiation patch and the second radiation patch by means of the coupling slot is disposed on one side that is of the second support layer and that is away from the substrate; and the integrated circuit is electrically connected to the first ground layer and the feeder.
In the foregoing specific technical solution, a four-layer substrate is used for fabrication. A patch antenna unit is disposed on a first-layer copper sheet and a second-layer copper sheet. A third layer is used as a ground plane, and a coupling slot is disposed on the third layer, is used as a fourth layer to combine an integrated circuit and a pad, and is used for feed-in of a feeder. The coupling slot on the third layer may be used to effectively feed high-frequency signals of a full-frequency band of 57-66 GHz into an antenna on the two higher layers for radiation. Electromagnetic fields are generated at two ends of the feeder; a distributed current is induced by the two layers of radiation patches based on a magnetic field component in the electromagnetic fields and by means of the coupling slot; and an electromagnetic wave is generated based on the distributed current for radiation. A parasitic effect is reduced. In addition, a stacked structure increases an effective area of an antenna. A low parasitic parameter and a large effective area that are achieved provide the antenna with a high-bandwidth and high-gain performance effect. During the fabrication, no extra process is needed, and only a conventional process procedure for a printed circuit substrate is needed.
In an actual processing scenario, a copper coverage rate of each layer needs to be considered in actual substrate processing. When the copper coverage rate is relatively high, processing reliability and consistency are higher. Therefore, in a possible design, the patch antenna unit further includes a second ground layer that is disposed on the first support layer and that is disposed on the same layer as the first radiation patch, where a first slot is disposed between the second ground layer and the first radiation patch, and the second ground layer is electrically connected to the first ground layer. That is, copper is covered on the first support layer, and the first radiation patch is formed on the covered copper using a common processing technology such as etching.
Further, the patch antenna unit further includes a third ground layer that is disposed on the substrate and that is disposed on the same layer as the second radiation patch, where a second slot is disposed between the third ground layer and the second radiation patch, and the third ground layer is electrically connected to the first ground layer. A ground layer is disposed on different substrates to increase copper coverage rates of the substrates. In addition, use of the foregoing structure brings about the following effects: 1. electromagnetic compatibility (EMC) performance can be improved in actual chip integration; and 2. a forward direction radiation feature of an antenna is enhanced. An emulation has proved that an emulation gain in a case in which cooper sheets surrounding the antenna are grounded to form a ground layer is 0.5 dB greater than that in a case in which the cooper sheets are not grounded.
During specific disposing, widths of the first slot and the second slot are greater than or equal to 1/10 of a maximum operating frequency wavelength of the patch antenna unit.
The first ground layer and the integrated circuit are electrically connected using a fourth ground layer. The patch antenna unit further includes the fourth ground layer that is disposed on the second support layer and that is disposed on the same layer as the feeder, where a third slot is disposed between the fourth ground layer and the feeder, and the first ground layer is electrically connected to the integrated circuit using the fourth ground layer. The disposed fourth ground layer not only increases a copper coverage area, but also facilitates connection between the antenna structure and the integrated circuit.
In a specific fabrication process, the integrated circuit is connected to the fourth ground layer and the feeder using a solder ball. A connection effect is good.
In an exemplary embodiment, copper coverage rates of the first support layer, the second support layer, and the substrate range from 50% to 90%.
The first radiation patch and the second radiation patch are arranged in a center-aligned manner, and a ratio of an area of the first radiation patch to an area of the second radiation patch ranges from 0.9:1 to 1.2:1.
In a possible design, a value of a length L of the coupling slot ranges from ⅓ to ⅕ of an electromagnetic wavelength corresponding to a maximum power frequency of the patch antenna unit, a maximum width of the coupling slot ranges from 75% to 100% of L, and a minimum width of the coupling slot ranges from 20% to 30% of L.
In a specific structure, the coupling slot includes two parallel first slots and a second slot that is disposed between the two first slots and that connects the two first slots; a length direction of the first slot is perpendicular to a length direction of the second slot; the feeder is a rectangular copper sheet; a length direction of the feeder is perpendicular to the length direction of the second slot; and a vertical projection of the feeder on a plane in which the coupling slot is located crosses the second slot.
In specific material selection, the first support layer, the second support layer, the substrate, and an integrated circuit transistor plate are resin substrates.
According to a second aspect, an embodiment of the present application provides an antenna, and the antenna includes a feed and tree-like branches connected to the feed. A node of each branch is provided with a power splitter. An end branch of the tree-like branches is connected to any patch antenna unit described above.
In the foregoing specific technical solution, a four-layer substrate is used for fabrication. A patch antenna unit is disposed on a first-layer copper sheet and a second-layer copper sheet. A third layer is used as a ground plane, and a coupling slot is disposed on the third layer, is used as a fourth layer to combine an integrated circuit and a pad, and is used for feed-in of a feeder. The coupling slot on the third layer may be used to effectively feed high-frequency signals of a full-frequency band of 57-66 GHz into an antenna on the two higher layers for radiation. Electromagnetic fields are generated at two ends of the feeder; a distributed current is induced by the two layers of radiation patches based on a magnetic field component in the electromagnetic fields and by means of the coupling slot; and an electromagnetic wave is generated based on the distributed current for radiation. A parasitic effect is reduced. In addition, a stacked structure increases an effective area of an antenna. A low parasitic parameter and a large effective area that are achieved provide the antenna with a high bandwidth and a high gain. During the fabrication, no extra process is needed, and only a conventional process procedure for a printed circuit substrate is needed.
To make the objectives, technical solutions, and advantages of the present application clearer, the following further describes the present application in detail with reference to the accompanying drawings. The described embodiments are merely a part rather than all of the embodiments of the present application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.
An embodiment of the present application provides a patch antenna unit, and the patch antenna unit includes a first support layer, a substrate disposed on the first support layer in a stacked manner, a second support layer disposed on one side that is of the substrate and that is away from the first support layer, and an integrated circuit disposed on one side that is of the second support layer and that is away from the substrate.
A first radiation patch is attached to one side that is of the first support layer and that is away from the substrate.
A second radiation patch is attached to one side that is of the substrate and that is away from the second support layer, and the first radiation patch and the second radiation patch are center-aligned.
A first ground layer is disposed on one side that is of the second support layer and that faces the substrate, a coupling slot is disposed on the first ground layer, a feeder coupled and connected to the first radiation patch and the second radiation patch by means of the coupling slot is disposed on one side that is of the second support layer and that is away from the substrate.
The integrated circuit is connected to the first ground layer and the feeder.
In the foregoing specific embodiment, a four-layer substrate (a first support layer, a substrate, a second support layer, and an integrated circuit) is used for fabrication. A first-layer copper sheet and a second-layer copper sheet that are respectively disposed on the first support layer and the substrate are antenna radiation units. A third-layer copper sheet (a copper sheet disposed on the second support layer) is used as a ground plane, and a coupling slot is disposed on the third-layer copper sheet, is used as a fourth layer to combine an integrated circuit and a pad, and is used for feed-in of a feeder. A first radiation patch and a second radiation patch are coupled and connected to the feeder. In the coupling, the coupling slot on the third layer may be used to effectively feed high-frequency signals of a full-frequency band of 57-66 GHz into an antenna on the two higher layers for radiation. In a specific coupling connection, electromagnetic fields are generated at two ends of the feeder; a distributed current is induced by the two layers of radiation patches based on a magnetic field component in the electromagnetic fields and by means of the coupling slot; and an electromagnetic wave is generated based on the distributed current for radiation. A parasitic effect is reduced. In addition, a stacked structure increases an effective area of an antenna. A low parasitic parameter and a large effective area that are achieved provide the antenna with a high bandwidth and a high gain. During the fabrication, no extra process is needed, and only a conventional process procedure for a printed circuit substrate is needed.
To facilitate understanding of a patch antenna unit provided in the embodiments of the present application, details are described below with reference to specific embodiments.
Referring to
An antenna structure provided in this embodiment of the present application includes four layers a first support layer 1, a substrate 2, a second support layer 3, and an integrated circuit 4. The first support layer 1, the substrate 2, the second support layer 3, and a substrate of a basement-layer transistor plate are made from resin materials, and implement a feature of a 57-66 GHz full-frequency band antenna using a relatively thin packaging substrate (for example, a total thickness is less than 650 micrometers (μm)).
A first radiation patch 11 is disposed on one side that is of the first support layer 1 and that is away from the second support layer 3, and a second radiation patch 21 is disposed on one side that is of the substrate 2 and that is away from the second support layer 3. The first radiation patch 11 and the second radiation patch 21 are disposed in a center-aligned manner. As shown in
The second support layer 3 is used for grounding. A first ground layer is disposed on one side that is of the second support layer 3 and that faces the substrate 2, and a coupling slot 32 is disposed on the first ground layer. A feeder 33 coupled and connected to the first radiation patch 11 and the second radiation patch 21 by means of the coupling slot 32 is disposed on one side that is of the second support layer 3 and that is away from the substrate 2. In specific use, a coupling slot 32 on a third layer may be used to effectively feed high-frequency signals of a full-frequency band of 57-66 GHz into an antenna on the two higher layers for radiation. A parasitic effect is reduced, and the antenna provides a high bandwidth and a high gain.
Referring to
During specific disposing, as shown in
As shown in
In the structure shown in
In an actual processing scenario, a copper coverage rate of each layer needs to be considered in actual processing of a substrate 2. When the copper coverage rate is relatively high, processing reliability and consistency are higher. Therefore, in a possible design, a second ground layer 12 is disposed on one side that is of a first support layer 1 and that is away from the substrate 2, and the second ground layer 12 and the first radiation patch 11 are disposed on a same layer. A first slot 13 is disposed between the second ground layer 12 and the first radiation patch, and the second ground layer 12 is electrically connected to a first ground layer 31. That is, copper is covered on the first support layer 1, and the first radiation patch is formed on the covered copper using a common processing technology such as etching.
Further, a second ground layer 22 is disposed on one side that is of the substrate 2 and that is away from a second support layer 3, and the second ground layer 22 is electrically connected to the first ground layer 31. The second ground layer 22 and the second radiation patch 21 are disposed on a same layer, and a second slot 23 is disposed between the second ground layer 22 and the second radiation patch 21. A ground layer is disposed on different substrates 2 to increase copper coverage rates of the substrates 2. In addition, use of the foregoing structure brings about the following effects: 1. EMC performance can be improved in actual chip integration; and 2. a forward direction radiation feature of an antenna is enhanced. An emulation has proved that an emulation gain in a case in which cooper sheets surrounding the antenna are grounded to form a ground layer is 0.5 dB greater than that in a case in which the first ground layer 31 and the second ground layer 12 are not disposed.
During specific disposing, widths of the first slot 13 and the second slot 23 are greater than or equal to 1/10 of a maximum operating frequency wavelength of the patch antenna unit.
In an exemplary embodiment, copper coverage rates of the first support layer 1, the second support layer 3, and the substrate 2 range from 50% to 90%. Use of the foregoing copper-covered structure facilitates processing of the first radiation patch 11 and the second radiation patch 21, thereby reducing processing difficulty. In addition, the first ground layer 31 and the second ground layer 12 that are additionally disposed may further effectively enhance a forward direction radiation feature of an antenna.
As shown in
An embodiment of the present application further provides an antenna, and the antenna includes a feed 30 and a power allocation network electrically connected to the feed 30. The power allocation network includes multiple patch antenna units 10 described in any one of the foregoing embodiments.
The patch antenna unit 10 is fabricated using a four-layer substrate 2. A patch antenna unit is disposed on a first-layer copper sheet and a second-layer copper sheet. A third layer is used as a ground plane, and a coupling slot 32 is disposed on the third layer, is used as a fourth layer to combine an integrated circuit and a pad, and is used for feed-in of a feeder. The coupling slot 32 on the third layer may be used to effectively feed high-frequency signals of a full-frequency band of 57-66 GHz into an antenna on the two higher layers for radiation. Electromagnetic fields are generated at two ends of the feeder; a distributed current is induced by the two layers of radiation patches based on a magnetic field component in the electromagnetic fields and by means of the coupling slot; and an electromagnetic wave is generated based on the distributed current for radiation. A parasitic effect is reduced. In addition, a stacked structure increases an effective area of an antenna. A low parasitic parameter and a large effective area that are achieved provide the antenna with a high bandwidth and a high gain. During the fabrication, no extra process is needed, and only a conventional process procedure for a printed circuit substrate is needed.
As shown in
In addition, an embodiment of the present application further provides a communications device, and the communications device includes the foregoing antenna.
In the foregoing specific technical solution, a four-layer substrate 2 is used for fabrication. A patch antenna unit is disposed on a first-layer copper sheet and a second-layer copper sheet. A third layer is used as a ground plane, and a coupling slot 32 is disposed on the third layer, is used as a fourth layer to combine an integrated circuit and a pad, and is used for feed-in of a feeder. The coupling slot 32 on the third layer may be used to effectively feed high-frequency signals of a full-frequency band of 57-66 GHz into an antenna on the two higher layers for radiation. A parasitic effect is reduced. In addition, a stacked structure increases an effective area of an antenna. A low parasitic parameter and a large effective area that are achieved provides the antenna with a high bandwidth and a high gain. During the fabrication, no extra process is needed, and only a conventional process procedure for a printed circuit substrate 2 is needed.
Obviously, a person skilled in the art can make various modifications and variations to the present application without departing from the scope of the present application. The present application is intended to cover these modifications and variations provided that they fall within the scope of protection defined by the following claims and their equivalent technologies.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201610071196.2 | Jan 2016 | CN | national |
This application is a continuation of U.S. patent application Ser. No. 16/049,104 filed on Jul. 30, 2018, which is a continuation of International Patent Application No. PCT/CN2016/109322 filed on Dec. 9, 2016, which claims priority to Chinese Patent Application No. 201610071196.2 filed on Jan. 30, 2016. All of the aforementioned patent applications are hereby incorporated by reference in their entireties.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 16049104 | Jul 2018 | US |
| Child | 16872920 | US | |
| Parent | PCT/CN2016/109322 | Dec 2016 | US |
| Child | 16049104 | US |
