Patent Application
20210281267
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2020-036649 filed in Japan on Mar. 4, 2020; the entire contents of which are incorporated herein by reference.
An embodiment described herein relates generally to a phase correcting device, a distance measuring device, a phase fluctuation detecting device and a phase correction method.
In recent years, keyless entry systems that make it easy to lock and unlock cars have been adopted by many automobiles. According to the technique, a user of an automobile can lock and unlock doors by using communication between a key of the automobile and the automobile. Further, in recent years, a smart key system that allows a user to lock and unlock a door or start an engine without touching a key has also been widely used.
However, there have been many cases where an attacker who carries out a so-called relay attack invades the communication between a key and an automobile, and steals a vehicle or articles in the vehicle. Therefore, as a defense measure against the aforementioned attack (so-called relay attack), a measure for measuring the distance between the key and the automobile, and prohibiting the control of the vehicle by communication when the distance is determined to be a predetermined distance or more is being studied.
There are a time detection method, a frequency difference detection method, a phase detection method and the like, as distance measurement methods, but due to the ease of implementation, a distance measuring system is receiving attention which employs a communication type phase detection method that obtains the distance between respective devices by communication between the respective devices. However, since reference signals between the respective devices independently operate, the initial phases differ from each other, and therefore distance measurement accuracy is generally greatly deteriorated in the communication type phase detection method. Therefore, there is proposed the technique that enables distance measurement by transmitting phase information detected in one device to the other device. According to the proposal, it is possible to calculate a highly accurate distance by performing a predetermined operation by using phase information of the signals detected by receiving units of two distance measuring devices that form a pair.
Note that in the proposal, accurate distance measurement is made possible on the precondition that the initial phase does not fluctuate in the local oscillator in the distance measuring device.
Since the distance measuring device is also mounted on a key side, there is a demand for extending the battery life of the key, and low power consumption of the distance measuring device is required. Since most of the power consumption of the distance measuring device is consumed by wireless units, reduction in power consumption of the wireless units is required. The power consumption of the wireless units strongly depends on the architecture of the wireless units. A configuration using a voltage-controlled oscillator (VCO) direct modulation method (hereinafter, also referred to as a VCO direct modulation method) for a transmission unit, and a super-heterodyne (SH) method (hereinafter, also referred to as an SH method) or a Low-IF reception method for a reception unit is widely known as a configuration of low power consumption. Therefore, it is desired to realize a distance measuring device by the configuration using a VCO direct modulation method for the transmission unit, and using an SH method for the reception unit.
However, when distance measurement is performed by using a VCO direct modulation method for the transmission unit, and using an SH method for the reception unit, the initial phase fluctuates in the local oscillator in the distance measuring device. Therefore, accurate distance measurement cannot be performed with the distance measuring device using a VCO direct modulation method for the transmission unit, and using an SH method for the reception unit.
Note that the fluctuation of the initial phase in the local oscillator may have an adverse effect on not only the distance measuring device but also various devices that detect the phases of the signals inputted by using the local oscillator.
A phase correcting device of an embodiment includes a local oscillator that includes a PLL configured to generate a local oscillation signal based on a reference clock, and is configured to give the local oscillation signal to a device configured to detect a phase of an inputted signal, a first phase detector included in the PLL, and configured to detect a phase of the local oscillation signal to output the phase of the local oscillation signal, a reference phase device configured to generate a quasi-reference phase corresponding to a reference phase of the local oscillation signal at a time of an initial setting of the local oscillator to output the quasi-reference phase, based on the reference clock, a second phase detector configured to detect a fluctuation amount of a phase of the local oscillator, based on the phase detected by the first phase detector and the quasi-reference phase, and a correction circuit configured to correct the phase of the inputted signal by using a detection result of the second phase detector.
Hereinafter, the embodiment of the present invention will be described with reference to the drawings.
In the present embodiment, an example in which the phase fluctuation detecting device and the phase correcting device are applied to the distance measuring device is explained, but it is also possible to apply the phase fluctuation detecting device and the phase correcting device to various devices that detect phases of inputted signals other than the distance measuring device. For example, application to a positioning device is also possible.
First, with reference to
A distance measuring system 100A includes a device 1A and a device 2A. At least one of the device 1A and the device 2A is movable. In the distance measuring system 100A, a distance between the device 1A and the device 2A is calculated based on carrier phase detection. A case where one of the device 1A and the device 2A calculates the distance based on phase information acquired by the device 1A and the device 2A will be considered.
The device 1A transmits a first distance measurement signal (single wave signal), and the device 2A transmits a second distance measurement signal (single wave signal). The first and the second distance measurement signals reach the device 2A and the device 1A respectively via a propagation path PDLY between the device 1A and the device 2A. The device 1A and the device 2A each include a wireless circuit using a VCO direct modulation method of low power consumption for a transmission unit, and using an SH method of low power consumption for a reception unit.
Hereinafter, in order to clarify a problem, the device 1A and the device 2A are assumed to set transmission frequencies first of all. In other words, in an initial setting, for example, the transmission frequencies of the devices 1A and 2A are respectively set at frequencies obtained by multiplying the oscillation frequencies of OSC1 and OSC2 by a predetermined multiple kL.
An output signal (oscillation signal) S1 (=1ox1) of OSCI of the device 1A can be expressed by equation (1) as follows with an initial phase of the oscillation signal of OSC1 set as Ox1.
1ox1=sin (2πfx1t+θx1) (1)
The oscillation frequency of OSC1 is multiplied by k1 by mpl1A. A phase ϕtx1 of an output signal S2 of mpl1A is expressed as
ϕtx1=2πkLfx1t+θLx1 (2).
Here, θLx1 is an initial phase of the output signal S2 of mpl1A. An output of mpl1A is generally generated by a phase locked loop (PLL) technique and a voltage-controlled oscillator (VCO) technique. Note that in mpl1A using a fractional PLL for a phase synchronizing unit of PLL, θLx1=kLθx1 is not generally established. Therefore, in equation (2) described above, the initial phase of the output S2 of mpl1A is defined as θLx1.
For the device 2A, a similar transmission frequency setting is also performed. An output signal S4 (=1ox2) of OSC2 of the device 2A can be expressed by equation (3) as follows with an initial phase of the oscillation signal of OSC2 set as θx2.
1ox2=sin (2πfx2t+θx2) (3)
In mpl2A also, the oscillation frequency of OSC2 is multiplied by kL. A phase ϕtx2 of an output signal S5 of mpl2A is expressed as
ϕtx2=2πkL2t+θLx2 (4).
Here, θLx2 is an initial phase of the output of mpl2A. For the output of mpl2A, θLx2=kLθx2 is not generally established either as in the output of mpl1A. Therefore, in equation (4) described above, the initial phase of the output of mpl2A is defined as θLx2.
Patent Literature 1 discloses that in the case of a system of TDD (time division duplex) that does not simultaneously carry out transmission and reception, correct distance measurement can be performed by performing exchange of single wave signals between the device 1A and the device 2A. Note that the devices in Patent Literature 1 differ from the devices in
The device 1A and the device 2A perform transmission after the frequencies of the transmission signals are respectively set at kLfx1 and the frequency of kLfx2 (hereinafter, these frequencies are also referred to as low frequencies) in the initial setting. When only transmission of the devices 1A and 2A is considered, a single wave signal of the frequency kLfx1 is transmitted from the device 1A to the device 2A first, and the device 2A receives the single wave signal of the frequency kLfx1 from the device 1A.
Next, after it takes a predetermined time period for the device 2A to be set to transmit the single wave signal of the frequency kLfx2 to the device 1A, transmission of the single wave signal is performed twice at the time t2. Furthermore, a single wave signal of the frequency kLfx1 is transmitted from the device 1A to the device 2A again, and the device 2A receives the single wave signal of the frequency kLfx1 from the device 1A. The device 1 takes a predetermined time period for the transmission, and performs transmission at the time t3. The signal exchanges end at a time t4.
A dashed straight line (2) in
However, in the distance measuring device in
In the heterodyne method, a reception signal is converted into an IF frequency. In an example of
ϕb2=−m2πfx2t+θBx2 (5)
Here, θBx2 is an initial phase of the LO signal for IFMIX2 from div 2, and the frequency −mfx2 is an IF frequency.
In order to receive a signal from the device 1A in the device 2A, the phase ϕtx2 of the output signal S5 of mpl2A is set at what is shown by equation (6) as follows that is obtained by transforming equation (4) described above.
ϕtx2=2π(kL+m)fx2t+θLmx2(1) (6)
Here, θLmx2(1) is an initial phase of the output signal S5 of mpl2A between the time t1 and the time t2. Note that it is not necessary to change the frequency of mpl1A in the device 1A, and therefore the phase 4 of the output signal S2 of mpl1A remains as in equation (2).
In also the device 1A that adopts a heterodyne method, RFMIX1 needs to convert a reception signal into an IF frequency of approximately −mfx1. For this reason, in the device 1A that receives a single wave signal of the frequency kLfx2 from the device 2A, the frequency of the local signal (LO signal) S2 from mpl1A which is given to RFMIX1 is set at kL+m) fx1 instead of kLfx1. The reception signal that is converted into the IF frequency has frequency converted by the IF frequency converter (IFMIX1), and an output signal S12 is obtained. An output signal S1 of OSC1 is frequency-divided to a signal S3 having a frequency obtained by multiplying an output signal S1 of OSC1 by −m by div1, and the signal S3 is used as an LO signal for IFMIX1. A phase Obi of the signal S3 is expressed by equation (7) as follows.
ϕb1=−m2πfx1t+θBx1 (7)
Here, θBx1 is an initial phase of the LO signal for IFMIX1 from div1, and the frequency −mfx1 is an IF frequency.
In order to receive a signal from the device 2A, in the device 1A, the phase ϕtx1 of the output signal S2 of mpl1A is set at what is shown by equation (8) as follows that is obtained by transforming equation (2) described above.
ϕtx1=2π(kL+m)fx1t+θLmx1(1) (8)
Here, θLmx1(1) is an initial phase of the output signal S2 of mpl1A between the time t2 and the time t3.
The device 2A returns the setting of the transmission frequency from (kL+m) fx2 to kLfx2 in a period between the time t2 and the time t3. At this time, the phase ϕtx2 of the output signal S5 of mpl2A is expressed by equation (9) as follows. Note that θLx2(2) is an initial phase of the signal S5 in this case.
ϕtx2=2πkLfx2t+θLx2(2) (9)
Settings of the device 1A and the device 2A are same as the settings in
The phase ϕtx2 of the output signal S5 of mpl2A of the device 2A is given by equation (10) as follows obtained by transforming equation (9) described above.
ϕtx2=2π(kL+m)fx2t+θLmx2(2) (10)
Here, θLmx2(2) is the initial phase of the output signal S5 of mpl2A between the time t3 and the time t4.
The device 1A returns the transmission frequency from (kL+m) fx1 to kLfx1. At this time, the phase Ow of the output signal S2 of mpl1A is set at what is shown by equation (11) as follows.
ϕtx1=2πkLfx1t+θLx1(2) (11)
Here, θLx1(2) is the initial phase of the output signal S2 of mpl1A between the time t3 and the time t4.
In this way, between the time t1 and the time t4, the phase ϕtx1 of the signal S2 of mpl1A changes as shown by a thick line characteristic C1 in
From a time D+t1 to a time D+t8 in
Next, referring to
ϕrx2=2πkLfx1(t−τR)+θLx1 (12)
Here, τR is a delay time of a propagation path length R. The signal S7 is frequency-converted by using the signal S5 (LO signal). From equation (12) and equation (6), a phase ϕifx2(T12)(t) of an output signal S8 of RFMIX2 is expressed by equation (13) as follows.
ϕifx2(T12)(t)=2πkL(fx1−fx2)t−2πmfx2t+(θLx1−θLmx2(1))−2πkLfx1τR (13)
Note that equation (13) shows a phase result of extracting only a desired signal. The signal is frequency-converted by using the signal S6. Accordingly, from equation (13) and equation (5), the phase ϕBB2L(T12)(t) of the signal S9 detected in the device 2A is what is expressed by equation (14) as follows.
ϕBB2L(T12)(t)=2πkL(fx1−fx2)t+(θLx1−θLmx2(1))−θBx2−2πkLfx1τR (14)
Note that equation (14) shows a result of performing desired quadrature demodulation.
Similarly, with reference to
ϕrx2=2πkLfx1(t−τR)+θLx1(2) (15)
from equation (11). The signal S7 is frequency-converted by the signal S5 (LO signal). From equation (15) and equation (10), a phase ϕifx2(T34)(t) of an output signal S8 of RMIX2 is expressed by equation (16) as follows.
ϕifx2(T32)(t)=2πkL(fx1−fx2)t−2πmfx2t+(θLmx2(2)−θLmx2(2))−2πkLfx1τR (16)
Note that equation (16) shows a phase result of extracting only a desired signal. The signal is frequency-converted by using the signal S6. From equation (16) and equation (5), a phase ϕBB2L(T34)(t) of the signal S9 detected in the device 2A is
ϕBB2L(T34)(t)=2πkL(fx1−fx2)t+(θLx1(2)−θLmx2(2))−θBx2−2πkLfx1τR (17).
Note that equation (17) describes a result of performing desired quadrature demodulation.
Next, with reference to
ϕrx1=2πkLfx2(t−τR)+θLx2(2) (18)
The signal S10 is frequency-converted by using the signal S2 (LO signal) in RFMIX1. From equation (18) and equation (8), a phase ϕifx1(T23)(t) of an output signal S11 of RFMIX1 is expressed by equation (19) as follows.
ϕifx1(T23)(t)=2πkL(fx2−fx1)t−2πmfx1t+(θLx2(2)−θLmx1(1))−2πkLfx2τR (19)
Note that expression (19) shows a phase result of extracting only a desired signal. The signal S11 is frequency-converted by using the signal S3. As a result, a phase ϕBB2L(T23)(t) of the signal S9 detected in the device 2A is expressed by equation (20) as follows from equation (19) and equation (7).
ϕBB2L(T23)(t)=2πkL(fx2−fx1)t+(θLx2(2)−θLmx1(1))−θBx1−2πkLfx2τR (20)
Note that equation (20) describes a result that a desired quadrature modulation is performed.
Patent Literature 1 shows that a distance can be obtained by addition of the phases of the reception signals obtained by the distance measurement sequence. In the example of
ϕBBLSUM(t)=ϕ12-1L+ϕ21-1L+ϕ21-2L+ϕ12-2L (21)
When an interval between the time t2 and the time t1 and an interval to between the time t4 and the time t3 are defined as
t
0
=t
2
−t
1
=t
4
−t
3 (22),
and a time interval from a time at which a first distance measurement signal is transmitted from the device 1A to a time at which a second distance measurement signal is transmitted from the device 2A is set as T, the four-phase addition result of equation (21) is as shown in equation (23) as follows.
ϕBBLSUM(t)=ϕBB2L(T12)(t+t0)+ϕBB2L(T23)(t+T)+ϕBB2L(T34)(+t0+T) (23)
Equation (14), equation (17) and equation (20) described above are substituted into equation (23) described above, and thereby equations (24) and (25) as follows are obtained.
ϕBBLSUM(t)=−4πkL(fx1+fx2)τR−2(θBx1+θBx2)+θLSUM (24)
θLSUM=(θLx1−θLmx2(1))+2×(θLx2(2)−θLmx1(1))+(θLx1(2)−θLmx2(2) (25)
When a delay τR is obtained from equation (24) described above, the delay τR corresponding to a distance between devices is what is shown by equation (26) as follows.
τR=(θBx1+θBx2)/{2πkL(fx1+fx2)}−θLSUM/{4πkL(fx1+fx2)}+ϕBBLSUM(t)/{4πkL(fx1+fx2)} (26)
A third term of equation (26) described above is the addition result of the four phases, and is obtained by measurement. However, the other terms are difficult to detect. Accordingly, correct distance measurement cannot be performed with four alternations of single wave signals of a low frequency.
In the distance measurement sequence in
Between a time D+t1 and a time D+t2, the device 2A receives a single wave signal of a frequency kHfx1 from the device 1A. A phase ϕBB2H(T12)(t) of a signal S7 received by the device 2A is expressed by equation (27) as follows.
ϕBB2H(T12)(t)=2πkH(fx1−fx2)t+(θHx1−θHmx2(1))−θBx2−2πkHfx1τR (27)
Note that θHx1 is an initial phase of the signal S2 of the frequency kHfx1 of the device 1A, and θHmx2(1) is an initial phase of the signal S5 of a frequency (kH+m)fx2 of the device 2A.
Between a time D+t2 and a time D+t3, the device 1A receives a single wave signal of a frequency kHfx2 from the device 2A. A phase ϕBB2H(T23)(t) of the signal S10 received by the device 1A is expressed by equation (28) as follows.
ϕBB2H(T23)(t)=2πkH(fx2−fx1)t+(θHx2(2)−θHmx1(1))−θBx1−2πkHfx2τR (28)
Note that θHx2(2) is an initial phase of the signal S5 of the frequency kHfx2 of the device 2A, and θHmx1(1) is an initial phase of the signal S2 of the frequency (kH+m)fx1 of the device 1A.
Between a time D+t3 and a time D+t4, the device 2A receives a single wave signal of a frequency kHfx1 from the device 1A. A phase ϕBB2H(T34)(t) of the signal S7 received by the device 2A is expressed by equation (29) as follows.
ϕBB2H(T34)(t)=2πkH(fx1−fx2)t+(θHx1(2)−θHmx2(2))−θBx2−2πkLfx1τR (29)
Note that an initial phase θHx1(2) is an initial phase of the signal S2 of the frequency kHfx1 of the device 1A, and θHmx2(2) is the initial phase of the signal S5 of the frequency (kH+m)fx2 of the device 2A.
In the example of
ϕBBHSUM(t)=ϕ12-1H+ϕ21-1H+ϕ21-2H+ϕ12-2H (30)
When equation (22) and the information on the time T are added to equation (30) described above, equation (31) as follows is obtained.
ϕBBHSUM(t)=ϕBB2H(T12)(t)+ϕBB2H(T23)(t+y0)+ϕBB2H(T23)(t+T)+ϕBB2H(T34)(t+T+t0) (31)
When equation (31) is transformed by using equation (27), equation (28), and equation (29), equation (32) and equation (33) as follows are obtained.
ϕBBHSUM(t)=−4πkH(fx1+fx2)τR−2(θBx1+θBx2+θHSUM (32)
θHSUM=(θHx1−θHmx2(1))+2×(θHx2(2)−θHmx1(1))+(θHx1(2)−θHmx2(2)) (33)
When the delay τR corresponding to the distance between the devices is made a subject of equation (33), equation (34) as follows is obtained.
τR=(θBx1+θBx2)/{2πkH(fx1+fx2)}−θHSUM/{4πkH(fx1+fx2)}+ϕBBHSUM(t)/{4πkH(fx1+fx2)} (34)
A third term of equation (34) is the addition result of the four phases, and can be detected by measurement. However, the other terms are difficult to detect. Accordingly, correct distance measurement cannot be performed with transmission and reception of four alternations by single wave signals of a high frequency.
Next, distance measurement using two waves of a low frequency and a high frequency is considered. In other words, the delay τR is obtained by performing subtraction of equation (23) and equation (31) described above. Equation (35) as follows is obtained by subtraction of equation (23) and equation (31).
ϕBBLSUM(t)−ϕBBHSUM(t)=4π(kH−kL)(x1+fx2)τR+θLSUM−θHSUM (35)
From equation (35), the delay TR is obtained by equation (36) as follows.
τR=−(θLSUM−θHSUM)/4π(kH−kL)(fx1+fx2+(ϕBBLSUM(t)−ϕBBHSUM(t)/4π(H−kL)(fx1+fx2 (36)
A second term of equation (36) is a value that is obtained by an operation of the phases of the received single wave signals, that is, a measurement value. However, a first term in equation (36) shows addition and subtraction of the initial phases of the signals S2 and S5 of the devices 1A and 2A that are expressed by equation (25) and equation (33). The initial phases of the signals S2 and S6 are as shown in
Note that the above described explanation shows the problem that the distance measurement cannot be accurately performed due to the fluctuations of the initial phases of the output signals of mpl1A and mpl2A that are local oscillators in the distance measuring devices. However, it is conceivable that not only the distance measuring device but also various devices that detect the phases of signals by using local oscillators may not be able to achieve desired functions due to fluctuation in the initial phases of the output signals. The present embodiment is applicable to the various devices that detect the phases of signals by using the local oscillators like this.
In the present embodiment, it is made possible to achieve a same function as in a case where an initial phase is not changed, in a device using local oscillators, by adopting a reference phase device for obtaining a phase (hereinafter, referred to as a reference phase) that changes according to a frequency at an initial setting time from an initial phase at a time of occurrence of a frequency of initial setting, that is, an initial phase before performing resetting of the frequency, obtaining a fluctuation amount of the phase by an initial phase change and a frequency change by obtaining a difference between the reference phase and the phase after resetting of the frequency, and correcting the phase according to the obtained fluctuation amount.
In
In
In other words, a main point where the devices 1 and 2 respectively differ from the devices 1A and 2A in
An LO signal similar to the LO signal of mpl1A or mpl2A can be generated by each of mpl1 and mpl2. Accordingly, in the present embodiment, the distance measurement sequence illustrated in
First, with reference to a graph in
As described above, the devices 1 and 2 perform initial settings of transmission frequencies by the time t1 in
Phase differences ΔθLTT1 and ΔθLTR1 are phase differences concerning the device 1. The phase difference ΔθLTT1 is a difference between the initial phase θLx1(2) from the time t3 to the time t4 and the initial phase θLx1 before the time t2 in the signal S2. The phase difference ΔθLTR1 is a difference between the initial phase θLmx1(1) from the time t2 to the time t3 and the initial phase θLx1 before the time t2. Relationships among these variables can be respectively expressed by equation (37) and equation (38).
θLx1(2)=θLx1+ΔθLTT1 (37)
θLmx1(1)=θLx1+ΔθLTR1 (38)
Further, phase differences ΔθLTT2, ΔθLRR2, and ΔθLTR2 are phase differences concerning the device 2. The phase difference ΔθLTT2 is a difference between the initial phase θLx2(2) from the time t2 to the time t3 and the initial phase θLx2 before the time t1 in the signal S5. The phase difference ΔθLRR2 is a difference between the initial phase θLmx2(2) from the time t3 to the time t4 and the initial phase θLmx2(1) from the time t1 to the time t2 in the signal S5. The phase difference ΔθLTR2 is a difference between the initial phase θLmx2(1) from the time t1 to the time t2 and the initial phase θLx2 before the time t1 in the signal S5. Relationships among these variables can be respectively expressed by equation (39) to equation (41) as follows.
θLx2(2)=θLx2+ΔθLTT2 (39)
θLmx2(1)=θLx2+ΔθLTR2 (40)
θLmx2(2)=θLmx2(1)+ΔθLRR2=θLx2+ΔθLRT2+ΔθLRR2 (41)
As will be described later, of the phase differences, ΔθLTT1, ΔθLTT2, and ΔθLRR2 can be directly measured by mpl1 and mpl2. On the other hand, ΔθLTR1 in equation (38) and ΔθLTR2 in equation (40) cannot be directly measured. Therefore, in the present embodiment, mpl1 and mpl2 obtain ΔθLTR1 and ΔθLTR2 by measuring the phase differences relating to ΔθLTR1 and ΔθLTR2 as will be described later.
Here, in order to show a concept of an initial phase measurement method, ΔθLTR1 and ΔθLTR2 will be described as measurable.
When equation (37) to equation (41) described above are substituted into θLSUM in equation (25) described above, θLSUM in equation (36) described above is given by equation (42) as follows.
θLSUM=−2(ΔθLTR1+ΔθLTR2)+2×ΔθLTT2+ΔθLTT1−ΔθLRR2 (42)
Next, θHSUM in the high frequency shown in equation (33) is obtained.
A graph in
The initial phase of the signal S2 from mpl1 of the device 1 changes to an initial phase θHx1 before a time t2, an initial phase θHmx1(1) from the time t2 to a time t3, and an initial phase θHx1(2) from the time t3 to a time t4. The initial phase of the signal S5 from mpl2 of the device 2 changes to an initial phase θHx2 before a time t1, an initial phase θHmx2(1) from the time t1 to the time t2, an initial phase θHx2(2) from the time t2 to the time t3, and an initial phase θHmx2(2) from the time t3 to the time t4.
Phase differences ΔθHTT1 and ΔθHTR1 are phase differences concerning the device 1. The phase difference ΔθHTR1 is a difference between the initial phase θHx1(2) from the time t3 to the time t4 and the initial phase OMi before the time t2 in the signal S2. The phase difference ΔθHTR1 is a difference between the initial phase θHmx1(1) from the time t2 to the time t3 and the initial phase θHx1 before the time t2 in the signal S2. Relationships among these variables can be respectively expressed by equation (43) and equation (44) as follows.
θHx1(2)=θHx1+ΔθHTT1 (43)
θHmx1(1)=θHx1+ΔθHTR1 (44)
Likewise, phase differences ΔθHTT2, ΔθHRR2, and ΔθHTR2 are phase differences concerning the device 2. The phase difference ΔθHTT2 is a difference between the initial phase θHx2(2) from the time t2 to the time t3 and the initial phase θHx2 before the time t1 in the signal S5. The phase difference ΔθHRR2 is a difference between the initial phase θHmx2(2) from the time t3 to the time t4 and the initial phase θHmx2(1) from the time t1 to the time t2 in the signal S5. The phase difference ΔθHTR2 is a difference between the initial phase θHmx2(1) from the time t1 to the time t2 and the initial phase θHx2 before the time t1 in the signal S5. Relationships among these variables can be respectively expressed by equation (45) to equation (47) as follows.
θHx2(2)=θHx2+ΔθHTT2 (45)
θHmx2(1)=θHx2+ΔθHTR2 (46)
θHmx2(2)=θHmx2(1)+ΔθHRR2=θHx2+ΔθHTR2+ΔθHRR2 (47)
As in the case of the low frequency, of the above phase differences, ΔθHTT1 , ΔθHTT2 , and ΔθHRR2 can be directly measured by mpl1 and mpl2. On the other hand, ΔθHTR1 in equation (44) and ΔθHTR2 in equation (46) cannot be directly measured. Therefore, in the present embodiment, mpl1 and mpl2 obtain ΔθHTR1 and ΔθHTR2 by measuring the phase differences relating to ΔθHTR1 and ΔθHTR2 as will be described later.
Here, in order to show a concept of an initial phase measurement method, ΔθHTR1 and ΔθHTR2 will be described as measurable.
When equation (43) to equation (47) described above are substituted into θHSUM in equation (25) described above, θHSUM in equation (36) described above is given by equation (48) as follows.
θHSUM=−2(ΔθHTR1+ΔθHTR2)+2×ΔθHTT2+ΔθHTT1−ΔθHRR2 (48)
As above, it is possible to obtain the first term in equation (36) described above by equation (42) and equation (48) described above.
In thick line characteristics C1 to C4 in
In the present embodiment, the three kinds of phase differences are obtained by mpl1 and mpl2. Information on the obtained phase differences are outputted to operation devices CA1 and CA2 by mpl1 and mpl2. The operation devices CA1 and CA2 may each be configured by a processor using a CPU, FPGA or the like, may operate according to a program stored in a memory not illustrated and control each unit, or may realize a part or all of a function by an electronic circuit of hardware.
The operation devices CA1 and CA2 are respectively given signals S12 and S9 from IFMIX1 and IFMIX2, and detect phases of the signals S12 and S9. The operation device CA1 performs an operation of equation (36) described above to obtain the delay τR and further obtains the distance R, by using phase information obtained from the signal S12 and information on the phase difference from mpl1. Note that in the device 2, the operation device CA2 can also perform an operation of equation (36) described above to obtain the delay τR and further obtain the distance R, by using phase information obtained from the signal S9 and the information on the phase difference from mpl2. Note that the operation devices CA1 and CA2 can respectively perform various kinds of control concerning distance measurement in the devices 1 and 2, for example, frequency setting, timing control and the like in the distance measurement sequence.
A frequency multiplier mpl20, a reference phase device mp100, and a phase detector phsdet configure mpl2. The frequency multiplier mp120 has a same function as the function of mpl2A in
The reference phase device mp100 is given the signal S4 from OSC2. As described above, in the distance measurement sequence, a frequency of the signal S5 from the frequency multiplier mp120 changes, and an initial phase of the signal S5 also changes at the timing of the change of the frequency. The reference phase device mp100 can output information on a phase that changes according to the initial phase and an initial frequency before the frequency of the signal S5 from the frequency multiplier mpl20 is changed, that is, a phase for obtaining the reference phase (hereinafter, referred to as a quasi-reference phase), based on the signal S4. The reference phase device mp100 outputs the obtained quasi-reference phase to the phase detector phsdet.
The phase detector phsdet in the frequency multiplier mpl2 obtains the above described three kinds of phase differences based on the inputted information, and outputs information S15 of the phase differences to the operation device CA2.
The operation device CA2 is configured by a phase calculator phscalc2, a distance calculator dcalc2 and a control device CN2. The control device CN2 controls operations of the phase calculator phscalc2 and the distance calculator dcalc2 that configure a correction circuit, and controls mpl2 and div2. The control device CN2 is capable of frequency control, timing control and the like concerning distance measurement in the device 2, and also sets information on I0, I2, F0, F2 and the like that will be described later, for example.
The phase calculator phscalc2 obtains θLSUM and θHSUM of equation (36) described above and outputs θLSUM and θHSUM to the distance calculator dcalc2, by using the output of the phase detector phsdet. The operation device CA2 is also given a signal S9 from IFMIX2, and the distance calculator dcalc2 obtains the delay τR by an operation of equation (36) described above from the output of the phase calculator phscalc2 and the signal S9, and further calculates the distance R.
A frequency multiplier mpl20 includes a circuit part of a frequency multiplier of an ordinary configuration having a PLL including a voltage-controlled oscillator (VCO). In other words, the frequency multiplier mpl20 has a PLL configured by a phase comparator PD configured to perform comparison of phases, a low pass filter LPF, a voltage-controlled oscillator VCO and a 1/N frequency divider NDIV. The frequency multiplier mpl20 includes a frequency division number setting device ΔΣ2 configured to set a frequency division number. In the present embodiment, a fractional PLL that can set the frequency division number N at a rational number is adopted.
An output of the voltage-controlled oscillator VCO is supplied to the frequency divider NDIV and is frequency-divided into 1/N. An output of the frequency divider NDIV is given to the phase comparator PD, and the phase comparator PD performs phase comparison of the frequency division output of the frequency divider NDIV and a signal S4 that is an oscillation output of OSC2, and gives a comparison result to the voltage-controlled oscillator VCO via the low pass filter LPF. By the PLL, synchronization is achieved so that the frequency division output that is inputted to the phase comparator PD and a frequency of the signal S4 are matched with each other. In the state where the PLL achieves synchronization, a frequency of an output signal S5 from the voltage-controlled oscillator VCO is N times as large as the frequency of the oscillation output (signal S4) of OSC2.
Since mpl20 generates an LO signal based on the signal S4 that is the oscillation output of OSC2, OSC2 will be also referred to as a reference oscillator OSC2, an oscillation output of the reference oscillator OSC2 will be also referred to as a reference clock, and a frequency of the reference clock will be also referred to as a reference frequency in the following explanation. In the fractional PLL, the reference frequency of the reference clock is multiplied by a rational number. The frequency division number N of the frequency divider NDIV is an integer value, and the reference frequency can be multiplied by a rational number on average by, for example, adding and subtracting 1 to and from the frequency division number N at a predetermined interval. When the frequency division number multiplied by a rational number is set as E[N], an integer value of E[N] is set as I2, and a decimal value of E[N] is set as F2, E[N]=I2·F2 is established.
The frequency division number that is set to the frequency divider NDIV like this is controlled by the division number setting device ΔΣ2. To the division number setting device ΔΣ2, the integer portion input I2 and the decimal portion input (fractional input) F2 are inputted. The division number setting device ΔΣ2 is configured by an adder A1 configured to output the frequency division number N to the frequency divider NDIV, and a ΔΣ unit DE configured to generate Carry (carry) at timing corresponding to a size of the decimal portion to generate a numerical value to be added to the frequency division number N. The adder A1 directly outputs I2 as the frequency division number N in a period in which Carry is not generated from the ΔΣ unit DE as a first phase integrator, and adds a numerical value of Carry to I2 and outputs an addition result as the frequency division number N only when Carry is generated from the ΔΣ unit DE.
The ΔΣ unit DE is a block reflecting a decimal setting, and is configured by an adder A2 and a delay device D1. The delay device D1 is given a clock CK2 that is a frequency division output of the frequency divider NDIV. Note that a phase of the clock CK2 is obtained by frequency-dividing the output signal of the voltage-controlled oscillator VCO by an integer, and corresponds to a phase of the output of the voltage-controlled oscillator VCO. In other words, the frequency division number setting device ΔΣ2 functions as a first phase detector that detects a phase of a local oscillation signal.
If the PLL generates a frequency obtained by multiplying the reference clock by an integer N, phases of a reference clock CK0 and the clock CK2 correspond to each other in the synchronizing state of the PLL. However, when an output frequency of the voltage-controlled oscillator VCO is not an integer multiple of the reference clock CK0, a deviation occurs to the phase of the clock CK2 from the frequency divider NDIV in which the frequency division number is an integer and the phase of the reference clock. An amount of the deviation is a phase difference between a phase of the output of the voltage-controlled oscillator VCO that operates with a rational number multiple on average (the phase of the clock CK2) and the reference clock, and corresponds to the size of the decimal portion F2. By integrating the decimal portion F2 at each timing of the clock CK2 by the adder A2 and the delay device D1, Carry from the ΔΣ unit DE is generated at timing necessary to operate the PLL with a rational number multiple E[N]=I2·F2 on average.
In other words, the output of the delay device D1 corresponds to a phase of a present output of the voltage-controlled oscillator VCO, and Carry from the adder A2 is generated each time the phase of the output of the voltage-controlled oscillator VCO advances by one period (2π).
A reference phase device mp100 as a second phase integrator obtains a phase (reference phase) of the output of the voltage-controlled oscillator VCO on the precondition that the output frequency of the frequency multiplier mpl20 does not change. Therefore, the reference phase device mp100 may have a same configuration as the configuration of the frequency multiplier mpl20. In a case where the configuration is adopted, it is possible to acquire a quasi-reference phase for obtaining the reference phase by output of the ΔΣ unit DE in a case where the information I2 and F2 for changing the frequency is not changed from initial values I0 and F0 in a rational number multiple of an initial setting.
In the present embodiment, as the reference phase device mp100, only the components necessary to obtain the reference phase of the frequency multiplier mpl20 are adopted. In an example in
When a fixed value integer portion I0 and a fixed value decimal portion F0 for multiplying the frequency of the reference clock by kL are assumed to be given to the ΔΣ unit DE for the purpose of initial setting of the frequency multiplier mpl20, the decimal portion F0 is given to the adder A3 of the reference phase device mp100.
Further, for the clock that is given to the delay device D, the reference clock CK0 from the reference oscillator OSC2 is used instead of the clock CK2 that is the oscillation output of the frequency divider NDIV of mpl20. The reference phase device mp100 integrates the decimal portion F0 at periods of the reference clock CK0. The output of the delay device D2 has a phase (quasi-reference phase) that changes similarly to the phase (reference phase) of the output of the frequency multiplier mpl20 using the initial values I0 and F0 at the time of initial setting. In other words, the phase (quasi-reference phase) of the output of the delay device D2 is a phase that changes at a similar change rate to the change rate of the reference phase and differs only in initial phase, with respect to the phase (reference phase) of the output of the frequency multiplier mpl20 at the time of the initial setting.
The output of the delay device D1 of the ΔΣ unit DE of the frequency multiplier mpl20 and Carry from the adder A2 are given to an adder A4 of a phase detector phsdet as a second phase detector. The output of the delay device D2 and Carry from the adder A3 of the reference phase device mp100 are given to an adder A5 of the phase detector phsdet.
As described above, the output of the delay device D1 of mpl20 corresponds to the output phase of the voltage-controlled oscillator VCO. In other words, the output of the delay device D1 corresponds to the phase ϕtx2 shown by thick lines in
The adder A4 of the phase detector phsdet is given the output of the delay device D1 and Carry of the ΔΣ unit DE of mpl20, and adds the output and Carry. In other words, an addition result of A4 is each of phases of present outputs of the frequency multiplier mp120 shown by the thick lines in
The addition results of the adders A4 and A5 are given to a phase difference calculation unit A6. When the addition results of the adders A4 and A5 are respectively assumed to be phases ϕ2 and ϕ0, the phase difference calculation unit A6 performs an operation including a difference operation using the phases ϕ2 and ϕ0 that are acquired at timings independent from each other. Note that the phase difference calculation unit A6 uses the phases ϕ2 and ϕ0 at times when the output frequencies of the frequency multiplier mpl20 are stabilized in the reception section and the transmission section, in the operation.
Next, an operation of the embodiment that is configured in this way will be described with reference to a graph in
It is assumed that the reference phase device mpl00 and mpl20 have the same frequency at the time of initial setting of the transmission frequency before the time t1, and a similar initial setting to the initial setting of mpl2A described above is performed. Accordingly, a phase ϕ2 of an output of mpl20 is equivalent to a right side of equation (4) described above, and is expressed by a thick line characteristic C2 in
The phase ϕ2 of the output of the adder A4 is given by equation (49) as follows that is similar to the right side of equation (4).
ϕ2=2πkLfx2t+θLx2 (49)
In the reference phase device mpl00, a frequency setting in the initial setting is same as the frequency setting in the initial setting of mpl20, but an initial phase differs from the initial phase of mpl20. When the initial phase at the time of a low frequency of the reference phase device mpl00 is θL0x2, a quasi-reference phase ϕ0 of an output of the adder A5 that is obtained from an output of the reference phase device mpl00 is given by equation (50) as follows.
ϕ0=2πkLfx2t+θL0x2 (50)
Handling of the integer portion IP is assumed to be similar to ϕ2, and the integer portion I0 is not detected in the adder A5, but is assumed to be included in equation (50). When ϕ2−ϕ0 is detected in the phase difference calculation unit A6 immediately before the time t1 at which the frequency is switched,
ϕ2−ϕ0=θLx2−θL0x2 (51)
is established, and a difference between the initial phase of the frequency multiplier mpl20 and the initial phase of the reference phase device mpl00 in the initial setting is obtained.
As described above, in the device 2, a period from the time t1 to the time t2 is the reception section, and there is the transmission section again after the time t2, so that an output frequency of the frequency multiplier mpl20 changes, and the initial phase of the output of the voltage-controlled oscillator VCO also changes. The phase ϕ2 of the output of the adder A4 output from the time t2 to a time t3 is given by equation (52) as follows that is similar to a right side of equation (9) described above.
ϕ2=2πkLfx2t+θLx2(2) (52)
The quasi reference phase ϕ0 of the output of the adder A5 based on the output of the reference phase device mpl00 follows equation (50) described above, because the frequency setting is not changed in the reference phase device mpl00. Accordingly, when ϕ2−ϕ0 is detected by the phase detector Phsdet at a time at which the frequency is stabilized in the transmission section from the time t2 to the time t3, equation (53) as follows is obtained.
ϕ2−ϕ0=θLx2(2)−θL0x2 (53)
A difference between ϕ2−ϕ0 that is detected immediately before the time t1 and ϕ2−ϕ0 that is detected at the time when the frequency is stabilized in the transmission section from the time t2 to the time t3 shows a phase difference ΔθLTT2 that is a change in the initial phase due to a change in the output frequency of the frequency multiplier mpl20. In other words, the phase difference ΔθLTT2 is expressed by equation (54) as follows, where a difference between phases of the frequency multiplier mpl20 and the reference phase device mpl00 that are detected at a time to immediately before the time t1 are respectively set as ϕ2(tA), and ϕ0(tA), and a difference between phases of the frequency multiplier mpl20 and the reference phase device mp100 that are detected at a time t0 between the time t2 and the time t3 are respectively set as ϕ2(tB), and ϕ0(tB).
ϕ2(tB)−ϕ0(tB)−{ϕ2(tA)−ϕ0(tA)}=ΔθLTT2 (54)
The phase difference calculation unit A6 obtains a phase difference ϕ2(tA) ϕ0(tA) of the frequency multiplier mpl20 and the reference phase device mpl00 that is detected at the time tA, obtains a phase difference ϕ2(tB)−ϕ0(tB) of the frequency multiplier mpl20 and the reference phase device mpl00 that is detected at the time tB, and obtains a difference of both the phase differences, whereby the phase difference calculation unit A6 can detect ΔθLTT2 that is a change in the initial phase of the frequency multiplier mpl20, that is, a first phase difference (“a phase difference between the respective RF signals in the two transmission sections”).
Note that from the phase difference calculation unit A6 of the device 1 not illustrated, ΔθLTT1 is obtained by a similar method to the method described above.
Next, with reference to
A phase ϕtx2(t) of an LO signal from the frequency multiplier mpl20 in a reception section of the device 2 from a time t3 to a time t4 is detected by the adder A4. A phase ϕ2(t) of the output of the adder A4 in this case is expressed by equation (55) as follows that is similar to the right side of equation (10) described above.
ϕ2(t)=ϕtx2(t)=2π(kL+m)fx2t+θLmx2(2) (55)
Here, θLmx2(2) is an initial phase of the output signal S5 of mpl20 in a section from a time t3 to a time t4. An initial phase of the output signal S5 of mpl20 in a section from a time t1 to a time t2 is set as θLmx2(1), a phase jump amount at a time of the device 2 transitions from reception to transmission is set as ΔθJP2, and a phase jump amount at a time of the device 2 transitioning from transmission to reception is set as ΔθJP3. If there is no change in the frequency, a total of the phase jump amounts ΔθJP2 and ΔθJP3 is equal to a difference between θLmx2(2) and θLmx2(1), and when the frequency change is taken into consideration, a relationship between θLmx2(2) and θLmx2(1) is expressed by equation (56) as follows.
θLmx2(2)−θLmx2(1)=−mfx2×(t3−t2)+ΔθJP2+ΔθJP3 (56)
In
In other words, a waveform in
ϕLt1(t)=mod(θLx2−θLOx2,2π)=θTXA (57)
ϕLtx1-t2(t)=mod(2πmfx2t+θLmx2(1)−θLOx2, 2π)=mod(2πfIF2y+θLmx2(1)−θLOx2, 2π) (58)
ϕLt2-t3(t)=mod(θLx2(2)−θLOx22π)=θTXB (59)
ϕLt3-t4(t)=mod(2πmfx2t+θLmx2(2)−θLOx2, 2π)=mod(2πfIF2t+θLMx2(2)−θLOx2, 2π) (60)
f
IF2=mfx2 (61)
As shown in
T
IF2=1/fIF2 (62).
When an arbitrary time when the frequency is stabilized in the reception section from a time t1 to a time t2 is set as tIFA, if reception of the signal of the frequency fIF2 is continued thereafter, the phase of the output of mpl20 has a same value at each time period TIF2, as shown by the dash-dotted line in
Accordingly, when a difference between the phase ϕ2 of the output of mpl20 and the quasi-reference phase ϕ0 is obtained in the phase difference calculation unit A6, if a time tIFB is assumed to be a time after an integer multiple of TIF2 from the time tIFA, in the section from a time t3 to a time t4 in
However, since the frequency changes in the reception section from a time t2 to the time t3 in reality, the phase of the output of mpl20 changes according to equation (60), and the phase difference Δθ(tIFB) at the time tiFB has a different value from the value of the phase difference Δθ(tIFA).
The difference of the phase differences in the case of receiving the frequency change and the case of not receiving the frequency change in the section from the time t2 to the time t3 is due to the fact that the initial phase changes with the frequency change in the section from the time t2 to the time t3 because there is no change in the frequency in the two reception sections. In other words, an initial phase fluctuation amount ΔθLRR2=Δθ(tIFB)−Δθ(tIFB)v is established. In the operation, the quasi-reference phase is cancelled out, and therefore, the initial phase fluctuation amount ΔθLRR2 is obtained by equation (63) as follows using ϕLt3-t4(tIFB) that is ϕ2 from the adder A4 at the time tIFB, and ϕLt1-t2(tIFA) that is ϕ2 from the adder A4 at the time tIFA.
ΔθLRR2=ϕLt3-t4(tIFB)−ϕLt1-t2(tIFA) (63)
Note that equation (63) described above is obtained by setting both the phase jumps ΔθJP2, and ΔθJP3 as 0[rad]. However, as is obvious from
In other words, in the present embodiment, the phase difference calculation unit A6 performs an operation of a difference between the output of the adder A4 at the time tIFA in the first reception section, and the output of the adder A4 at the time tIFB in the second reception section after a time period of an integer multiple of TIF2 from the time tIFA, or the phase difference calculation unit A6 obtains a difference between ϕ2-ϕ0 at the time tIFA and ϕ2-ϕ0 at the time tIFB, and thereby it is possible to detect the fluctuation amount ΔθLRR2 of the initial phase. In this way, it is possible to detect “the phase difference between the respective RF signals of the two reception sections” that is the second phase difference.
Note that from the phase difference calculation unit A6 of the device 1 not illustrated, a ΔθLRR1 is obtained by a similar method to the method described above.
Next, with reference to
A phase difference detected at the time tC is mod(θLx2−θLOx2, 2π) as shown in equation (57) described above. A phase difference detected at the time tD is
ϕLt1-t2(tD)=mod(2πfIF2tD+θLmx2(1)−θLOx2, 2π) (64)
from equation (58). When the equation is simplified to omit mod, the phase detected at the time tC is set as ϕLt1(tC), and a difference between the two phase differences given from equation (58) and equation (64) is taken, equation (65) as follows is obtained.
ϕLt1-t2(tD)−ϕLt1(tC)=2πfIF2tD+θLmx2(1)−θLx2 (65)
From equation (40) and equation (65) described above, equation (66) as follows is obtained.
ΔθLTR2=θLmx2(1)−θLx2=ϕLt1-t2(tD)−ϕLt1(tC)−2πfIF2tD (66)
From the output of the adder 4, ϕLt1-t2(tD) and ϕLt1(tC) in equation (66) described above are obtained. Accordingly, when the IF frequency fIF2 and the time tD are defined, ΔθLTR2 can be obtained from equation (66) described above.
Note that equation (66) described above is obtained with a phase jump at a time of transition from a section before the time t1 to a section from the times t1 to t2 as 0[rad]. However, as is obvious from
In other words, in the present embodiment, the IF frequency fIF2 and the time tD in the first reception section are defined, and the phase difference calculation unit A6 performs the operation including the operation of difference between the output of the adder A4 at the time tC in the output section by the initial setting and the output of the adder A4 at the time tD, or the phase difference calculation unit A6 performs the operation including the difference between ϕ2-ϕ0 at the time tC and ϕ2-ϕ0 at the time tD, whereby the fluctuation amount ΔθLTR2 of the initial phase can be detected.
Note that from the phase difference calculation unit A6 of the device 1 not illustrated, ΔθLTR1 is obtained by a similar method to the method described above.
Next, ΔθHTR2 is obtained. The distance measurement sequence of the low frequency and the distance measurement sequence of the high frequency in
Accordingly, equations in which L expressing the meaning of the low frequency is changed to H expressing the meaning of the high frequency, and the detection time of the phase is changed from the time tD, to the time D+tD and is changed from the time tC to the time D+tC in equation (64) to equation (66) described above are established.
In other words, ΔθHTR2 can be expressed by equation (67) as follows that is obtained by transforming equation (66) described above by setting the phase of the output of the frequency multiplier mpl20 at the time D+tD as ϕHt1−t2(D+tD) and by setting the phase of the output of the frequency multiplier mpl20 at the time D+tC as ϕHt1(D+tC).
ΔθHTR2=θHmx2(1)−θHx2=ϕHt1-t2(D+tC)−2πfIF2tD (67)
Note that the IF frequency of the device 2 is almost unchanged regardless of whether the IF frequency is at a high frequency or at a low frequency, final terms of equation (66) and equation (67) have a same value.
The ϕHt1-t2(D+tD) and θHt1(D+tC) in equation (67) described above are obtained by the outputs of the adder 4. Accordingly, when the IF frequency fIF2 and the time tD are defined, ΔθHTR2 can be obtained from equation (66) described above. Equation (67) is established regardless of a size of a phase jump at a time of transition from the section before the time t1 to the section from the times t1 to t2.
In other words, in the present embodiment, the IF frequency fIF2 and the time tD in the first reception section are defined, and the phase difference calculation unit A6 performs the operation including the operation of the difference between the output of the adder A4 at the time D+tC in the output section by the initial setting, and the output of the adder A4 at the time D+tD, or the phase difference calculation unit A6 performs the operation including the difference between ϕ2-ϕ0 at the time D+tC and ϕ2-ϕ0 at the time D+tD, whereby the fluctuation amount ΔθHTR2 of the initial phase can be detected.
Note that from the phase difference calculation unit A6 of the device 1 not illustrated, ΔθHTR1 is obtained by a similar method to the method described above.
In this way, it is possible to detect “the phase difference between the respective RF signals in the transmission section and the reception section that are continuous” that is the third phase difference. The phase detector phsdet of the device 2 outputs the first to the third phase differences that are obtained, that is, the fluctuation amounts of the initial phase to the phase calculator phscalc2.
The phase calculator phscalc2 may obtain θLSUM and θHSUM by using the outputs of the phase detector phsdet.
The θLSUM in equation (36) described above can be calculated by using the first to the third phase differences as shown in equation (42) described above.
Likewise, the θHSUM in equation (36) described above can also be calculated by using the first to the third phase differences as shown in equation (48) described above. The phase calculator phscalc2 outputs θLSUM and θHSUM that are calculated to the distance calculator dcalc2. The distance calculator dcalc2 obtains the delay τR by the operation of equation (36) described above from the output of the phase calculator phscalc2 and the signal S9, and further calculates a distance R.
Although the phase difference calculation unit A6 is described as performing the operation of the IF frequency fIF2 and the time tD at the time of calculation of the above described third phase difference, the operation can be omitted as will be shown as follows. Equation (68) as follows expresses θLSUM−θHSUM in the first term of equation (36) described above, from equation (42) and equation (48).
θLSUM−θHSUM=−2(ΔθLTR1−ΔθHTR1)−2(ΔθLTR2−ΔθHTR2)+2(ΔθLTT2−ΔθHTT2)+(ΔθHTT1−ΔθHTT1)−(ΔθLRR2−ΔθHRR2) (68)
A first term and a second term of equation (68) each shows “the phase difference between the respective RF signals in the transmission section and the reception section that are continuous” that is the third phase difference, a third term and a fourth term each shows “the phase difference between the respective RF signals in the two transmission sections” that is the first phase difference, and a fifth term shows “the phase difference between the respective RF signals in the two reception sections” that is the second phase difference. In other words, the second term is a difference between “the phase difference between the respective RF signals in the transmission section and the reception section that are continuous” using the low frequency and “the phase difference between the respective RF signals in the transmission section and the reception section that are continuous” using the high frequency, in the device 2. When a difference between equation (66) and equation (67) is taken in order to obtain the difference, equation (69) as follows is obtained.
ΔθLTR2−ΔθHTR2=ϕLt1-t2(tD)−ϕLt1(tC)−{ϕHt1-t2(D+tD)−ϕHt1(D+TC)} (69)
In equation (69), the term of the operation of the IF frequency fIF2 and the time tD is cancelled out. In other words, it shows that when the predetermined time to with the frequency setting start as the reference is set at a fixed value, the difference of “the phase difference of the respective RF signals in the transmission section and the reception section that are continuous” that is the third phase difference can be obtained by the phase difference calculation unit A6 only obtaining the difference of the output phases of the adders A4 and A5.
In the device 1, it is also possible to obtain ΔθLTR1−ΔθHTR1 of the first term by a similar method.
Accordingly, in this case, the phase difference calculation unit A6 can perform only the phase difference operation, and the phase calculator phscalc2 can calculate θLSUM−θHSUM by using an operation result of the phase difference calculation unit A6, and output a calculation result to the distance calculator dcalc2. In other words, in this case, a phase fluctuation detecting device is configured by using a function of the phase calculator phscalc2.
Note that as is obvious from
The phase calculator phscalc2 holds a plurality of hold circuits HO1, HO2, . . . that hold outputs of the phase detector phsdet. Note that
For example, a value of ϕ2(tA)−ϕ0(tA) shown in equation (54) is set as Δθa, and a value of ϕ2(tB)−ϕ0(tB) is set as Δθb. The times tA and tB for holding are set according to the phases desired to be detected. For example, in the case of equation (54) described above for obtaining the first phase difference, the time tA is a time before the time t1, and the time tB is a time between the time t2 and the time t3. Note that the time for this is set at a time at which the frequency is stabilized.
When the phase is observed in the section from the time t1 to the time t2 and the section from the time t3 to the time t4, in the transition of a transmission state before the time t1, the reception section from the time t1 to the time t2, the transmission section from the time t2 to the time t3, and the reception section from the time t3 to the time t4, tA=tIFA, tB=tIFB can be set. In other words, as a sampling point, a time limited to each IF period is set.
The calculated first to third phase differences are subjected to remainder calculation of 2π, and are converted into data corresponding to radians. By using the data of the phase differences, a predetermined operation of correction or the like of the initial phase is performed.
Note that in the device 1, similar calculation of a deviation from the initial phase and correction of the initial phase are also possible.
In this way, in the present embodiment, it is possible to achieve the similar function to the function in the case of not changing the initial phase in the device that detects the phase of the signal by using the local oscillator by obtaining the fluctuation amount of the phase due to the initial phase change and the frequency change by adopting the reference phase device for obtaining the reference phase and obtaining the difference between the quasi-reference phase obtained from the output of the reference phase device and the phase of the output after resetting of the frequency, and correcting the phase according to the obtained fluctuation amount.
For example, when the present embodiment is applied to a distance measuring device that performs transmission and reception of signal wave signals between devices and performs distance measurement from a reception phase, and is a distance measuring device using a direct modulation method for a transmission unit and using a super heterodyne method for a reception unit, a fluctuation amount of an initial phase following a frequency change in a distance measurement sequence can be detected and corrected, and therefore accurate distance measurement is made possible from phase information.
The reference phase device mpl00A differs from the reference phase device mpl00 in that an adder A7 that adds up Carry of an adder A3 and an integer value I0 is added, and an output of the adder A7 is outputted in place of Carry from the adder A3.
In general, in a wireless device, in order to respond to a plurality of systems having different carrier frequencies, an output of the voltage-controlled oscillator VCO may be frequency-divided according to the system. In
In the system that frequency-divides the output of the voltage-controlled oscillator VCO by K, a signal after frequency-division by K is used for a single wave signal for use in distance measurement. On the other hand, an output of a delay device D1 of a ΔΣ unit DE shows a phase of the output of the voltage-controlled oscillator VCO before frequency-division by K, and therefore in order to match the phase of the output of the delay device D1 with a phase of the signal after frequency-division by K, it is necessary to frequency-divide the output of the delay device D1 by K. The same applies to the output of the reference phase device mpl00A, and for this reason, the output of the adder A4 is given to a frequency divider KDIV1, whereas the output of the adder A5 is given to a frequency divider KDIV2. The frequency dividers KDIV1 and KDVI2 respectively frequency-divide inputted signals by K. An output of the frequency divider KDIV1 is outputted to a phase difference calculation unit A6 as ϕ2 representing an output phase of the frequency multiplier mpl20A, and an output of the frequency divider KDIV2 is outputted to the phase difference calculation unit A6 as a reference phase ϕ0.
In the example in
Therefore, in an example in
The delay device D3 takes in an output of the adder A8 and outputs the output to the adder A8, by a clock CK2. The adder A8 adds up N from the adder A1 and the output of the delay device D3, and outputs an addition result to the adder A4. In this way, in the adder A4, the phase corresponding to the output of the voltage-controlled oscillator VCO is obtained. The output of the adder A4 also takes into account the integer value I2, and is frequency-divided by K in the frequency divider KDIV1, and thereby ϕ2 representing the phase of the output of the frequency divider KDIV is obtained.
Likewise, in the reference phase device mpl00A, an output of the adder A7 is given to the integrator configured by the adder A9 and the delay device D4. The delay device D4 takes in an output of the adder A9 and outputs the output to the adder A9 by the reference clock CK0. The adder A9 adds up the output of the adder A7 and an output of the delay device D4, and outputs an addition result to the adder A5. In this way, in the adder A5, a quasi-reference phase corresponding to an output of the voltage-controlled oscillator VCO at a time of an initial setting is obtained. An output of the adder A5 also takes into account the integer value I0, and is frequency-divided by K in the frequency divider KDIV2, and thereby a quasi-reference phase ϕ0 representing a phase of an output of the frequency divider KDIV at a time of an initial setting is obtained.
In this way, according to the present modification, the phase ϕ2 corresponding to the output after frequency-division by K and the quasi-reference phase ϕ0 can be obtained.
From another perspective,
Instead of the output of the adder A1, Carry of the adder A2 and I2 are outputted from the frequency multiplier mpl20A, and an addition result of both may be given to the adder A8 in the phase detector phsdetA. Likewise, instead of the output of the adder A7, Carry of the adder A3 and I0 are outputted from the reference phase device mpl00A, and an addition result of both may be given to the adder A9 in the phase detector phsdetA.
An example in
The subtractor A10 subtracts the output (SGN) of the comparator CO1 from the output of the adder A2 and outputs a subtraction result to the delay device D1. The delay device D1 outputs the output of the subtractor A10 to the adder A2 at the timing of the clock CK2. In the example of
The output of the comparator COI corresponds to Carry from the adder A2 in
A configuration of a reference phase device mpl00B is also similar to the configuration of the ΔΣ unit DEB. In other words, an output of an adder A3 is given to a subtractor A11 and a comparator CO2. The comparator CO2 outputs three values of, for example, +1, 0, and −1 as SGN by comparison of the output of the adder A3 and a threshold. An output (SGN) of the comparator CO2 is given to the subtractor A11 and an adder A7 (not illustrated in
By the configuration, the delay device D2 of the reference phase device mpl00B supplies a quasi-reference phase corresponding to a phase of an output of the voltage-controlled oscillator VCO in an initial setting to an adder A5 as in
Now, the circuit in
Note that in the integer portion counter ICNT2, a similar operation to the operation of the integer portion counter ICNT1 is performed, and a similar output to the output of the adder A9 in
The remainder calculator MOD performs remainder calculation of K to the output of the adder A13, and outputs a calculation result to the delay device D5. An output of the delay device D5 of the integer portion counter ICNT1 is supplied to the adder A4, and an output of the delay device D5 of the integer portion counter ICNT2 is supplied to the adder A5.
Outputs of the adders A4 and A5 are respectively supplied to the frequency dividers KDIV1 and KDIV2 and are frequency-divided by K. A maximum output of the delay device D5 corresponding to one period (2π) of the phases ϕ2 and ϕ0 from the frequency dividers KDIV1 and KDIV2 is K. The remainder calculator MOD performs remainder calculation of K to the output of the adder A13, and thereby remainder calculation of 2πis performed to the phases ϕ2 and ϕ0. Thereby, it is possible to reduce an amount of data handled in a circuit at a subsequent stage to the remainder calculator MOD and reduce a circuit scale.
In this way, in the modification, it becomes possible to enhance accuracy of the oscillation output of the local oscillator, and it becomes possible to reduce the amount of data handled in the circuit at the subsequent stage to reduce the circuit scale.
In the modification, it is possible to transmit not only a distance measurement signal (single wave signal), but also an FSK (frequency shift) modulation signal. A frequency deviation signal Dev that defines a frequency shift in FSK modulation is given to a modulator M1. Data that is transmitted by FSK modulation is also given to the modulator M1, and the modulator M1 performs FSK modulation to the data Data according to the frequency deviation signal Dev, and outputs a modulated signal to the adder A14. The adder A14 outputs a result of adding up the frequency setting code FC and the modified signal as a decimal value F2.
According to the configuration as above, the output of the voltage-controlled oscillator VCO also changes in phase as the voltage-controlled oscillator VCO changes in frequency by FSK modulation. In this case, as described above, correction of the phase is possible by using a quasi-reference phase. As a result, even when communication is switched from FSK communication to communication for distance measurement, accurate distance measurement is possible from a phase of a reception signal.
Though omitted in
The radio signal received by the antenna is inputted to a low noise amplifier LNA via an RF (high frequency) filter not illustrated. The low noise amplifier LNA performs low noise amplification of a reception signal, and thereafter outputs the reception signal to RFMIX2. RFMIX2 is given a LO signal for frequency conversion from a phase shifter PHS. The phase shifter PHS shifts a phase of an output of mpl2 by 90 /2, and gives two LO signals shifted in phase by π/2 from each other to RFMIX2. RFMIX2 performs frequency conversion of the reception signal of the low noise amplifier LNA to convert the reception signal into IF signals by using the LO signals from the phase shifter PHS, and gives the IF signals to a polyphase filter PPF.
The polyphase filter PPF restricts either a positive frequency component or a negative frequency component, and takes out a desired signal as an IF signal. An output signal of the polyphase filter PPF is given to a low pass filter LPF to be band-limited, and thereafter is given to a ΔΣ type AD converter ΔΣA configuring a digital processing circuit DIG. Note that the digital processing circuit DIG mainly configures IFMIX2 and the operation device CA2 in
The decimation filter dmf limits a band of an output of the ΔΣ type AD converter ΔΣA to a low range and outputs the output of the ΔΣ type AD converter ΔΣA to a demodulator demod. The demodulator demod demodulates an IF signal by using an output of div2, and outputs a distance measurement signal of a base band to a signal processing unit SP. The signal processing unit SP is also given an output of a phase detector phsdet of mpl2.
The signal processing unit SP configures the phase calculator phscalc2 and the distance calculator dcalc2 in
In this way, in the present modification, the fluctuation in the initial phase that occurs in the distance measuring device using a specific wireless unit is corrected, and accurate distance measurement is possible.
In distance measurement by a phase detection method, a distance is measured by detecting a propagation phase delay corresponding to a propagation distance of a distance measurement signal. At this time, in order to obtain the distance between two devices accurately, it is necessary to separate delays inherent in respective devices and a propagation delay between the two devices. Of delays inherent in the wireless units and the devices themselves, for example, a delay due to RF filter not illustrated in
Therefore, in a device in
According to the configuration like this, it is possible to measure a delay due to the RF filter by obtaining a difference between a delay amount of a reception signal in a case where a transmission signal is received via the first feedback loop, and a delay amount of a reception signal in a case where a transmission signal is received via the second feedback loop, in a signal processing unit SP. Note that since the delay amount of the RF filter has a temperature characteristic, calibration measuring a filter delay is performed at the time of distance measurement.
Since a signal frequency does not change in the first and the second feedback loops, frequencies of the transmission signal outputted from the power amplifier PA and the reception signal received in the low noise amplifier LNA are same. Accordingly, at the time of calibration, the output of RFMIX2 becomes DC (direct current). Consequently, when the output of RFMIX2 is directly given to a polyphase filter PPF, a signal attenuation amount in the polyphase filter PPF is large, and measurement of the signal delay becomes difficult.
Therefore, in the present modification, div2A of a similar configuration to the configuration of div2 and a calibration mixer CALMIX2 are provided. The div2A generates two LO signals having a same frequency as an IF frequency and phases shifted by π/2 from each other, and gives the LO signals to the calibration mixer CALMIX2. The calibration mixer CALMIX2 converts outputs of RFMIX2 into the IF frequency by using the LO signals from div2A, and thereafter gives the outputs to the polyphase filter PPF.
Thereby, in the polyphase filter PPF, an IF signal at a sufficient level can be outputted, and in the signal processing unit SP, a delay in the filter can be reliably detected.
In this way, in the present modification, a fluctuation in the initial phase is corrected, and accurate distance measurement can be enabled, even in the distance measuring device using a specific wireless unit including the filter delay calibration function.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel devices and methods described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modification as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2020-036649 | Mar 2020 | JP | national |
