The present invention relates to a polishing pad and a polishing method suitable for electrochemically polishing an interconnect material on a device wafer.
Along with an increase in the degree of integration and scaling down of size of semiconductor devices, a multilevel interconnect technology has been employed. In the process of forming a pattern of an interconnect material, this pattern is formed on the surface of a semiconductor wafer. The interconnect material is then covered with a film of an insulating material such as silicon oxide, and an additional pattern of the interconnect material is formed on the insulating material. These steps are repeatedly performed.
In this process of forming a pattern of the interconnect material, plug holes and interconnect grooves are formed in an insulator such as silicon oxide (hereinafter called “interlayer dielectric”) by etching or the like. The plug holes and the interconnect grooves are simultaneously filled with a copper interconnect material, and unnecessary copper on the surface is removed by chemical mechanical polishing (hereinafter called “CMP”) to achieve planarization.
In order to reduce power consumption and increase the operational speed of the semiconductor devices, use of a low-dielectric-constant material for the interlayer dielectric has been studied. However, since the low-dielectric-constant material exhibits inferior mechanical strength and chemical stability, the copper interconnect material may be removed from the interlayer dielectric due to friction force caused by the rotational speed and the polishing pressure used in the CMP process. Therefore, a ultra-low-pressure CMP process in which the polishing pressure is significantly reduced has been proposed. However, since the ultra-low-pressure CMP process has drawbacks such as a decrease in the polishing rate and uniformity, electrochemical polishing (hereinafter called “ECP”) or the like has been studied instead of the CMP process.
ECP is a method in which a direct current is caused to flow between an anode formed of a copper interconnect material on the wafer surface and a separately provided cathode through an electrolyte to electrochemically dissolve and remove the copper interconnect material from the wafer surface.
In related-art ECP, since the copper interconnect material on the wafer surface is used as the anode, it is necessary to directly connect the electrode with the interconnect material (including Cu seed layer). In the case of using a platen rotary type polishing device, since the wafer is provided to a polishing head and pressed against a polishing pad, it is difficult to secure a space for causing the electrode to directly come in contact with the interconnect material. Therefore, it is difficult to employ ECP or use ECP in combination with CMP.
In the polishing process for the copper interconnect material, since a barrier metal must be polished in addition to the copper interconnect material, multistage (several steps) polishing is performed. For example, the polishing process for the copper interconnect material includes a first step of removing the copper interconnect material, a second step of removing the barrier metal, and, as required, a third step of removing the copper interconnect material and the interlayer dielectric. As the CMP device, a multi-platen/multi-head type CMP device has been mainly used. However, use of ECP in combination with CMP increases the size and cost of the CMP device.
An object of the invention is to provide a polishing pad and a polishing method used for electrochemical polishing which can prevent a decrease in the polishing rate and uniformity.
A first invention provides a polishing pad for electrolytically polishing an interconnect material on a device wafer by applying a direct-current voltage to the interconnect material as an anode and a cathode as a counter electrode while causing an electrolyte to come in contact with the anode and the cathode, the polishing pad comprising: a plurality of electrolytic cells formed by the anode, the cathode, and the electrolyte and having a contact surface smaller than the device wafer, the electrolytic cells being moved relative to the interconnect material when electrolytically polishing the interconnect material on the device wafer.
A second invention provides the polishing pad as defined in the first invention, comprising: a plurality of electrolyte reception sections disposed between the anode and the cathode and filled with the electrolyte so that the electrolyte comes in contact with the anode and the cathode, the electrolyte reception sections forming the electrolytic cells.
A third invention provides the polishing pad as defined in the second invention, comprising: an insulating member having a plurality of openings; and a conductive top layer provided on the insulating member and having a plurality of openings communicating with the openings in the insulating member; wherein the electrolyte reception section is formed by the opening in the insulating member and the opening in the conductive top layer.
A fourth invention provides the polishing pad as defined in the third invention, comprising: a conductive bottom layer provided on the insulating member on a side opposite to the conductive top layer.
A fifth invention provides the polishing pad as defined in the third invention, wherein the conductive top layer includes a polishing material.
A sixth invention provides the polishing pad as defined in the third invention, wherein the insulating member has a thickness of 0.5 to 5 mm.
A seventh invention provides the polishing pad as defined in the third invention, wherein a positive electrode of a direct-current power supply is connected with the conductive top layer, and the interconnect material is caused to function as the anode by causing the conductive top layer to be electrically connected with the interconnect material on the device wafer.
An eighth invention provides a polishing method for electrolytically polishing an interconnect material on a device wafer by applying a direct-current voltage to the interconnect material as an anode and a cathode as a counter electrode while causing an electrolyte to come in contact with the anode and the cathode, the method comprising: forming a plurality of electrolytic cells having a contact surface smaller than the device wafer using the anode, the cathode, and the electrolyte; and electrolytically polishing the interconnect material on the device wafer while relatively moving the electrolytic cells and the interconnect material.
A ninth invention provides the polishing method as defined in the eighth invention, comprising: using a polishing pad including a plurality of electrolyte reception sections forming the electrolytic cells.
A tenth invention provides the polishing method as defined in the ninth invention, comprising: placing the polishing pad on a platen of a polishing device; and supplying the electrolyte to the polishing pad.
An eleventh invention provides the polishing method as defined in the tenth invention, comprising: rotating the platen and a polishing head of the polishing device while causing the interconnect material on the device wafer secured to the polishing head to come in contact with the electrolytic cells.
A twelfth invention provides the polishing method as defined in the tenth invention, comprising: electrolytically polishing the interconnect material while supplying a direct current by applying a positive potential to an electrode in contact with the polishing pad and applying a negative potential to the platen.
A thirteenth invention provides the polishing method as defined in the eighth invention, wherein the electrolyte includes a polishing material dispersed therein.
An embodiment of a polishing pad according to the invention is described below with reference to the drawings.
The insulating layer 11 is a disk made of an insulating material, and has a plurality of through-holes 11a formed therein. As the material for the insulating layer 11, a synthetic resin exhibiting electrical insulating properties, and preferably a foam structure exhibiting viscoelasticity may be suitably used. The insulating layer 11 preferably has a thickness of about 0.5 to 5 mm.
The conductive top layer 12 is a layer formed of a conductive material provided on the surface of the insulating layer 11, and has through-holes 12a communicating with the through-holes 11a in the insulating layer 11. As the material for the conductive top layer 12, a conductive nonmetal sheet such as nonwoven fabric or fabric made of conductive fiber is preferably used.
As the material for the conductive top layer 12, the above-mentioned nonmetal sheet impregnated with a thermosetting resin or an elastomer may also be used. In this case, it is preferable to use a material obtained by dispersing polishing abrasive in a thermosetting resin or an elastomer, since the surface roughness of the electrochemically polished surface is reduced to obtain a mirror-finish surface. The conductive top layer 12 may be formed by alternately arranging the above-mentioned nonmetal sheet and a sheet containing polishing abrasive perpendicularly to the polishing surface. As the abrasive, silicon oxide, aluminum oxide, iron oxide, zinc oxide, silicon carbide, boron carbide, or synthetic diamond powder may be used either individually or in combination of two or more.
The conductive sheet (conductive bottom layer) 13 is a sheet made of a conductive material provided on the back side of the insulating layer 11. As the material for the conductive sheet 13, a metal material or a nonmetal material may be used without specific limitations insofar as the material is insoluble in an electrolyte. As such a material, carbon, graphite, stainless steel, and the like can be given.
The polishing pad 10 includes an electrolyte reception section 14 in which the through-hole 11a in the insulating layer 11 communicates with the through-hole 12a in the conductive top layer 12 and which forms an electrolytic cell which receives an electrolyte 30 (see
In the case where the electrolyte reception section 14 is a circular through-hole, the electrolyte reception section 14 preferably has a diameter of 0.5 to 100 mm. It is preferable that the ratio of the total open area of the electrolyte reception sections (electrolytic cells) 14 to the total area of the polishing pad 10 be 50 to 80%. This is because the polishing efficiency is decreased if the ratio is too low and the electrical resistance of the conductive top layer 11 is considerably increased if the ratio is too high.
In the polishing pad 10, the electrons generated from the copper interconnect material 42 as the anode are consumed by a Cu deposition reaction and a hydrogen generation reaction at the cathode on the surface of the conductive sheet 13, whereby an electric circuit is formed. This causes electrolysis of the copper interconnect material 42 to proceed.
In the polishing method in this embodiment, the rotation of the platen 21 and the polishing head 23 causes the through-holes 11a and 12a formed in the polishing pad 10 to be moved relative to the copper interconnect material 42 as the anode at a relative rotational speed of the platen 21 to the polishing head 23. Therefore, since the electrolyte 30 in the through-holes 11a and 12a is always replaced, the electrolyte concentration in the vicinity of the copper interconnect material 42 and the concentration of metal ions such as copper ions from the copper interconnect material 42 are maintained constant, whereby the surface of the copper interconnect material 42 can be uniformly subjected to electrolytic polishing.
Since the anode is formed by causing the copper interconnect material 42 to come in contact with the conductive top layer 12, the contact area is extremely reduced when electrolytic polishing has reached an interconnect groove upper section 44a of an interlayer dielectric 44 as a result of polishing the copper interconnect material 42 shown in
A barrier metal 43 is provided in order to prevent the metal atoms in the copper interconnect material 42 from migrating to the interlayer dielectric 44. As the material for the barrier metal 43, a material having a comparatively high resistivity and exhibiting conductivity, such as a metal nitride, for example, tantalum nitride or titanium nitride, may be used. In the case of forming a multilevel interconnect, since an interlayer dielectric is further deposited on the structure shown in
The embodiments of the invention are described below in more detail by measurement examples.
Constant current Cu electrolytic polishing characteristics were measured by the electrolytic polishing method shown in
In
As is clear from the results shown in
An electrolysis voltage dependence of constant voltage Cu electrolytic polishing was measured by the electrolytic polishing method shown in
As is clear from the results shown in
As described above, according to this embodiment, since the copper interconnect material is indirectly used as the anode by causing the conductive top layer of the polishing pad to come in contact with the copper interconnect material on the device wafer, and the platen is used as the cathode to form the electrolytic cells, it is unnecessary to cause the electrode to directly come in contact with the copper interconnect material on the lower surface of the wafer secured to the polishing head. This makes it unnecessary to provide a special device for causing the electrode to directly come in contact with the outer circumference edge of the wafer. Therefore, the electrochemical polishing method can be employed using a platen rotary type polishing device used for the CMP process.
As a result, since one platen/head of multi-platen/multi-heads can be used for electrochemical polishing using a related-art platen rotary type polishing device, polishing in several steps can be performed using a single device. Therefore, a reduction in the size and cost of the device can be achieved.
Moreover, a reduction in the polishing rate, which is the drawback of ultra-low-pressure CMP, can be prevented, and uniform polishing can be achieved by electrochemically dissolving and removing unnecessary copper interconnect material on the surface of the device wafer by forming the electrolytic cells so that the electrolytic cells can be moved relative to the device wafer.
This embodiment prevents a decrease in the electrolyte concentration in the vicinity of the interconnect material by forming the electrolytic cells so that the electrolytic cells can be moved relative to the polishing target material, realizes uniform polishing by preventing an increase in the amount of metal ions (e.g. Cu ions) of the interconnect material in the electrolyte in the vicinity of the interconnect material, and makes it unnecessary to cause the electrode to directly come in contact with the interconnect material by forming the electrolytic cells.
The invention is not limited to the above-described embodiments, and various modifications and variations may be made. Such modifications and variations are also within the scope of equivalence of the invention.
(1) The conductive sheet and the adhesive tape for securing the polishing pad to the platen protect the platen or the like from contamination due to Cu deposition or the like. The conductive sheet may be omitted when using a conductive adhesive tape.
(2) The above-described embodiment illustrates an example in which the electrolyte reception sections are moved relative to the interconnect material. However, the device wafer may be rotated or regularly moved horizontally while fixing the counter electrode (e.g. platen) and the polishing pad, or the platen to which the polishing pad is secured and a running belt (counter electrode) may be rotated or moved horizontally. However, both the device wafer and the counter electrode may be moved.
(3) The above-described embodiment illustrates an example in which the polishing abrasive is dispersed in the conductive top layer. However, a polishing material such as silicon oxide may be dispersed in the electrolyte 30.
Number | Date | Country | Kind |
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2003-374352 | Nov 2003 | JP | national |