Patent Application
20220385208
The present invention relates to a power conversion device and a machine learning device that compute the degree of degradation of a semiconductor chip including a switching element.
Semiconductor power converters (hereinafter referred to as power converters) such as inverters have semiconductor switching elements (hereinafter referred to as switching elements). During the operation of a power converter, loss that occurs in the switching element causes an increase in the temperature of the switching element, and once the power converter stops, the temperature of the switching element decreases. This repetition of rise and fall in the temperature of the switching element, which is called power cycles, causes degradation (hereinafter referred to as power cycle degradation) of the semiconductor chip in which the switching element is located, shortening the life of the semiconductor chip.
A power conversion device including a power converter and a controller that controls the power converter can estimate power cycle degradation if the temperature change in the semiconductor chip, that is, junction temperature, is known. However, it is difficult for the power conversion device in practice to directly measure the junction temperature in the semiconductor chip. Therefore, the power conversion device predicts power cycle degradation, and predicts the life of the semiconductor chip associated with power cycles based on the prediction result.
The inverter protection device described in Patent Literature 1 computes a temperature fluctuation value, i.e. the difference between the peak value of temperature rise and the peak value of temperature fall in the switching element in one AC cycle, from the switching frequency of the power converter and the AC output current. The inverter protection device described in Patent Literature 1 estimates the level of power cycle degradation of the switching element from the temperature fluctuation value.
However, in the technique of Patent Literature 1, if the output frequency of the power converter is low and the switching frequency of the power converter is set low, large pulsation (ripple) occurs in the output current during one cycle of the output frequency. The technique of Patent Literature 1, in which the temperature fluctuation corresponding to the switching element loss caused by the ripple cannot be considered, is problematic in terms of poor estimation accuracy of power cycle degradation.
The present invention has been made in view of the above, and an object thereof is to obtain a power conversion device capable of accurately estimating the level of power cycle degradation.
In order to solve the above-described problems and achieve the object, the present invention provides a power conversion device including a switching element, the power conversion device including: a control unit that outputs a control signal to control the switching element; and a drive unit that drives the switching element based on the control signal. The power conversion device according to the present invention includes a temperature change estimation unit that estimates a temperature change in a semiconductor chip containing the switching element based on a current value flowing through the switching element and the control signal. The power conversion device according to the present invention includes a number calculation unit that calculates, based on the temperature change, the number of power cycles to fracture of the semiconductor chip due to power cycles applied to the semiconductor chip; and a degradation degree calculation unit that computes, based on the number of power cycles to fracture, a degree of degradation of the semiconductor chip caused by the power cycles as a degree of power cycle degradation. The temperature change estimation unit calculates a maximum value of a temperature of the semiconductor chip in one power cycle based on a first threshold and the temperature change, the first threshold being a threshold of temperature fall allowed when it is determined that the temperature of the semiconductor chip is rising. The temperature change estimation unit calculates a minimum value of the temperature of the semiconductor chip in one power cycle based on a second threshold and the temperature change, the second threshold being a threshold of temperature rise allowed when it is determined that the temperature of the semiconductor chip is falling. The number calculation unit calculates the number of power cycles to fracture based on the maximum value and the minimum value.
The power conversion device according to the present invention can achieve the effect of accurately estimating the level of power cycle degradation.
Hereinafter, a power conversion device and a machine learning device according to embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the embodiments.
The semiconductor module 1 includes a substrate 114 coated with a circuit pattern 111. On the substrate 114, a semiconductor chip 113A is soldered with solder 110A, and a semiconductor chip 113B is soldered with solder 110B.
The semiconductor chip 113A, or a first chip, contains an IGBT, and the semiconductor chip 113B, or a second chip, contains an FWD. Note that multiple sets of semiconductor chips 113A and 113B may be arranged in the semiconductor module 1.
The semiconductor module 1 includes a wire 112 bonded to the circuit pattern 111 and the semiconductor chips 113A and 113B using ultrasonic waves. The substrate 114 is soldered to a base plate 115 with solder 110C. Hereinafter, a configuration of the power conversion device, a method of estimating a temperature change in a switching element in the power conversion device, a method of estimating the degree of power cycle degradation, and a method of estimating the life (hereinafter referred to as the power cycle life) of the semiconductor chips 113A and 113B associated with power cycles will be described. The power conversion device (power conversion device 200A described later) according to the present embodiment estimates a temperature change in the semiconductor chips 113A and 113B containing a switching element as a temperature change in the switching element.
The power conversion device 200A according to the present embodiment estimates the temperature of the semiconductor chips 113A and 113B (hereinafter also referred to as chip temperature) based on the current flowing through the semiconductor module 1. Further, the power conversion device 200A estimates the degree of degradation of the switching element (degree of power cycle degradation) caused by power cycles based on a change in chip temperature. Specifically, the power conversion device 200A estimates the degree of power cycle degradation caused by the power cycles of the IGBT based on a change in the chip temperature of the semiconductor chip 113A containing the IGBT, and estimates the degree of power cycle degradation caused by the power cycles of the FWD based on a change in the chip temperature of the semiconductor chip 113B containing the FWD.
The chip temperature repeatedly rises and falls over time. After the power conversion device 200A is activated, the chip temperature rises; then the power conversion device 200A updates the maximum value of the chip temperature in one power cycle (maximum value ΔTjmax of chip temperature rise described later).
For example, suppose that the chip temperature rises until timing Q1 and then falls. In this case, once the chip temperature falls by a specific temperature (rise change threshold X described later) at timing Q2 from the chip temperature at timing Q1, the power conversion device 200A sets the chip temperature at timing Q1 as the maximum value ΔTjmax of chip temperature rise in one power cycle.
The chip temperature falls after timing Q2; then the power conversion device 200A updates the minimum value of the chip temperature in this power cycle (minimum value ΔTjmin of chip temperature fall described later). Suppose that after timing Q2, the chip temperature falls until timing Q3 and then rises. In this case, once the chip temperature rises by a specific temperature (fall change threshold Y described later) at timing Q4 from the chip temperature at timing Q3, the power conversion device 200A sets the chip temperature at timing Q3 as the minimum value ΔTjmin of chip temperature fall in this power cycle.
Further, suppose that after timing Q4, the chip temperature rises until timing Q5 and then falls. In this case, once the chip temperature falls by a specific temperature at timing Q6 from the chip temperature at timing Q5, the power conversion device 200A sets the chip temperature at timing Q5 as the maximum value ΔTjmax of chip temperature rise in this power cycle. The power conversion device 200A repeats the process of setting the maximum value ΔTjmax of chip temperature rise and the minimum value ΔTjmin of chip temperature fall in each power cycle.
The power conversion device 200A computes the difference between the chip temperature at timing Q1 and the chip temperature at timing Q3, that is, the difference between the maximum value and the minimum value of the chip temperature in one power cycle (temperature fluctuation difference ΔTj (max−min) described later), and estimates the degree of degradation of the switching element based on the difference. In this manner, in the present embodiment, the process of estimating the degree of degradation of the switching element is repeated not for every cycle of the output frequency of the power conversion device 200A but for every difference between the maximum value ΔTjmax of chip temperature rise and the minimum value ΔTjmin of chip temperature fall in one power cycle.
The power conversion device 200A separately estimates the degree of power cycle degradation of the semiconductor chip 113A containing the IGBT and the degree of power cycle degradation of the semiconductor chip 113B containing the FWD. Note that the IGBT and the FWD may be contained in one semiconductor chip, in which case the power conversion device 200A estimates the degree of power cycle degradation of the semiconductor chip containing the IGBT and the FWD.
In this manner, the power conversion device 200A is configured to compute, as the temperature fluctuation in one power cycle, a fall of a threshold or more from the peak value of temperature rise in the semiconductor chips 113A and 113B and a rise of a threshold or more from the peak value of temperature fall. This enables the power conversion device 200A to deal with a situation where large pulsation (ripple) occurs in the output current during one cycle of the output frequency by computing the temperature fluctuation corresponding to the switching element loss caused by the ripple as the temperature fluctuation in one power cycle. Therefore, the power conversion device 200A can accurately estimate the level of power cycle degradation.
In the following description, the degree of power cycle degradation of the semiconductor chip 113A may be referred to as the degree of power cycle degradation of the IGBT. Similarly, the degree of power cycle degradation of the semiconductor chip 113B may be referred to as the degree of power cycle degradation of the FWD.
The power conversion device 200A estimates a temperature change in the semiconductor chips 113A and 113B containing the switching element based on a current value I flowing through the switching element and a control signal SG for controlling the switching element. The power conversion device 200A calculates the number of power cycles to fracture of the semiconductor chips 113A and 113B due to power cycles based on the temperature change, and computes the degree of degradation of the semiconductor chips 113A and 113B caused by power cycles based on the number of power cycles to fracture. The power conversion device 200A separately estimates the degree of degradation of the semiconductor chip 113A and the degree of degradation of the semiconductor chip 113B.
The power conversion device 200A includes the semiconductor module 1 including the switching element, a current measuring instrument 3A, a controller 4, a drive signal generation unit 5, and a temperature change estimation unit 6. The power conversion device 200A also includes a number calculator 7, a degradation degree calculator 8, an alarm display 9, and a degradation degree display 10. Note that the alarm display 9 and the degradation degree display 10 may be configured separately from the power conversion device 200A.
An example of the semiconductor module 1 is an inverter circuit. The semiconductor module 1 is connected to the commercial power supply 12 via the smoothing capacitor 14 and the converter circuit 13. The semiconductor module 1 is also connected to the motor 2 and the drive signal generation unit 5.
In the power conversion system, the semiconductor module 1, the converter circuit 13, and the smoothing capacitor 14 constitute a motor drive device. The motor drive device receives AC power supply from the commercial power supply 12 to drive the motor 2.
The converter circuit 13 rectifies the AC voltage applied from the commercial power supply 12 to convert the AC voltage into a DC voltage. An example of the converter circuit 13 is a full-wave rectifier circuit including a diode bridge. The smoothing capacitor 14 is connected to two DC buses connecting the converter circuit 13 and the semiconductor module 1. The smoothing capacitor 14 smooths the bus voltage.
The semiconductor module 1 operates in accordance with a drive signal sent from the drive signal generation unit 5. The semiconductor module 1 converts the DC voltage smoothed by the smoothing capacitor 14 into an AC voltage and applies the AC voltage to the motor 2 to drive the motor 2.
The semiconductor module 1 includes the switching element. The switching element provided in the semiconductor module 1 includes an IGBT and an FWD. In the semiconductor module 1, the IGBT and the FWD are reversely connected.
The current measuring instrument 3A is connected to the connection line connecting the semiconductor module 1 and the motor 2. The current measuring instrument 3A measures the current flowing through the switching element by measuring the current flowing between the semiconductor module 1 and the motor 2. The current measuring instrument 3A sends the current value I as the measurement result to the temperature change estimation unit 6.
Note that the current measuring instrument 3A only needs to be able to measure the current flowing through the switching element. Therefore, the present embodiment is not limited by the form of the current measuring instrument 3A. The current measuring instrument 3A includes, for example, a current transformer (CT), a resistor, or the like.
The controller 4, or a control unit, generates the control signal SG for controlling the switching element located in the semiconductor module 1, and sends the control signal SG to the drive signal generation unit 5. The controller 4 also sends the control signal SG to the temperature change estimation unit 6.
The drive signal generation unit 5, or a drive unit, drives the switching element located in the semiconductor module 1 based on the control signal SG. The drive signal generation unit 5 generates a drive signal for driving the semiconductor module 1 based on the control signal SG, and inputs the drive signal to the semiconductor module 1.
The temperature change estimation unit 6 estimates the temperature fluctuation difference ΔTj (max−min) of the switching element in the semiconductor chips 113A and 113B based on the current value I, which is a measured value of the current flowing through the switching element, and the control signal SG input from the controller 4. The temperature fluctuation difference ΔTj (max−min) is the difference between the maximum value and the minimum value of the temperature of the switching element in one power cycle. The temperature change estimation unit 6 sends the temperature fluctuation difference ΔTj (max−min) to the number calculator 7.
The temperature change estimation unit 6 includes a power loss calculator 61, a chip temperature change calculator 62A, and a temperature change calculator 63. The power loss calculator 61 calculates a power loss generated in the switching element based on the current value I measured by the current measuring instrument 3A and the control signal SG input from the controller 4. The temperature change estimation unit 6 calculates a power loss (power loss PIGBT described later) generated in the IGBT and a power loss (power loss PFWD described later) generated in the FWD. The power loss calculator 61 sends the calculated power loss to the chip temperature change calculator 62A. In
The chip temperature change calculator 62A calculates a chip temperature change in the semiconductor chips 113A and 113B containing the switching element based on the power loss generated in the switching element. That is, the temperature change estimation unit 6 separately calculates a chip temperature change ΔTj in the IGBT and a chip temperature change ΔTj in the FWD. The chip temperature change ΔTj in the IGBT is a temperature change in the semiconductor chip 113A, and the chip temperature change ΔTj in the FWD is a temperature change in the semiconductor chip 113B.
Based on the transition of the chip temperature change ΔTj, the temperature change calculator 63 calculates the difference between the maximum value ΔTjmax of chip temperature rise and the minimum value ΔTjmin of chip temperature fall in one power cycle as the temperature fluctuation difference ΔTj (max−min). The temperature change calculator 63 calculates the temperature fluctuation difference ΔTj (max−min) of the IGBT and the temperature fluctuation difference ΔTj (max−min) of the FWD.
The number calculator 7, or a number calculation unit, converts the power cycle degradation of the switching element into the number of lifetime power cycles N, i.e. the number of power cycles to fracture, based on the temperature fluctuation difference ΔTj (max−min). The number calculator 7 computes the number of lifetime power cycles N corresponding to the temperature fluctuation difference ΔTj (max−min) based on power cycle life data prepared in advance. The power cycle life data are data in which the temperature fluctuation difference ΔTj (max−min) and the number of lifetime power cycles N are associated with each other. The number of lifetime power cycles N is the number of power cycles to fracture of the semiconductor chips 113A and 113B including the switching element due to power cycles (thermal fatigue). The number calculator 7 separately calculates the number of lifetime power cycles N for the IGBT and the number of lifetime power cycles N for the FWD. The number calculator 7 sends the number of lifetime power cycles N to the degradation degree calculator 8.
The degradation degree calculator 8, or a degradation degree calculation unit, calculates a degree of power cycle degradation LP/C of the switching element by accumulating the number of lifetime power cycles N obtained through conversion. Specifically, the degradation degree calculator 8 computes the ratio of the number of lifetime power cycles N to the power cycle life as 1/N, and accumulates the computed ratio to the power cycle life to calculate the degree of power cycle degradation LP/C. The degradation degree calculator 8 calculates the degree of power cycle degradation LP/C of the IGBT and the degree of power cycle degradation LP/C of the FWD. The degradation degree calculator 8 sends the degree of power cycle degradation LP/C to the alarm display 9 and the degradation degree display 10.
The alarm display 9 displays an alarm when the degree of power cycle degradation LP/C exceeds a reference value. The alarm display 9 compares a preset alarm level (reference value) with the degree of power cycle degradation LP/C, and displays an alarm when the degree of power cycle degradation LP/C exceeds the alarm level. The degradation degree display 10 displays the degree of power cycle degradation LP/C. The degree of power cycle degradation LP/C is represented by the progress (%) of degradation to the life, the period (number of years) to the life, or the like.
Note that the present embodiment describes a case where the semiconductor module 1 includes an IGBT as a switching element, but the switching element is not limited to the IGBT. The switching element may be a metal-oxide-semiconductor field-effect transistor (MOSFET), for example.
The signal analyzer 613 calculates and outputs, based on the control signal SG input from the controller 4, information necessary for the calculation of the power loss PIGBT generated in the IGBT. Specifically, the signal analyzer 613 calculates a switching frequency fc of the IGBT and a duty ratio Rduty of the IGBT as information necessary for the calculation of the power loss PIGBT, and outputs the information to the IGBT loss calculator 611. The duty ratio Rduty of the IGBT is the ratio between the on time and the off time during the switching of the IGBT.
In addition, the signal analyzer 613 calculates and outputs, based on the control signal SG input from the controller 4, information necessary for the calculation of the power loss PFWD generated in the FWD. Specifically, the signal analyzer 613 calculates the switching frequency fc of the FWD and the duty ratio Rduty of the FWD as information necessary for the calculation of the power loss PFWD, and outputs the information to the FWD loss calculator 612. The duty ratio Rduty of the FWD is the ratio between the on time and the off time during the switching of the FWD.
The duty ratio Rduty is a value for setting the period in which the switching element is on or off with respect to the cycle of the switching frequency fc. Therefore, the IGBT loss calculator 611 and the FWD loss calculator 612 can identify the period in which the current flows through the IGBT of the switching element and the period in which the current flows through the FWD of the switching element based on the duty ratio Rduty and the current value I measured by the current measuring instrument 3A.
The IGBT loss calculator 611 calculates the power loss PIGBT in the IGBT of the switching element based on the current value I input from the current measuring instrument 3A, the switching frequency fc of the IGBT, and the duty ratio Rduty of the IGBT.
In a similar manner to the IGBT loss calculator 611, the FWD loss calculator 612 calculates the power loss PFWD in the FWD of the switching element based on the current value I input from the current measuring instrument 3A, the switching frequency fc of the FWD, and the duty ratio Rduty of the FWD.
In this manner, the power loss calculator 61 computes the power loss PIGBT in the IGBT with the IGBT loss calculator 611, and computes the power loss PFWD in the FWD with the FWD loss calculator 612.
The IGBT loss calculator 611 outputs the power loss PIGBT to the chip temperature change calculator 62A. The FWD loss calculator 612 outputs the power loss PFWD to the chip temperature change calculator 62A.
The IGBT steady loss data table 614 stores the loss characteristics of the IGBT in the steady state. In the IGBT steady loss data table 614, the current value I is associated with a voltage Vce generated when the current value I is applied to the IGBT. Based on the IGBT steady loss data table 614 and the current value I in the steady state measured by the current measuring instrument 3A, the IGBT loss calculator 611 calculates the voltage Vce generated when the current value I is applied to the IGBT, and sends the voltage Vce to the calculator P1.
The IGBT on loss data table 615 stores the loss characteristics of the IGBT in the on state. In the IGBT on loss data table 615, the current value I in the case that the IGBT transitions from the off state to the on state is associated with a turn-on energy Eon of the IGBT generated when the IGBT transitions from the off state to the on state. Based on the IGBT on loss data table 615 and the current value I generated when the IGBT transitions from the off state to the on state, the IGBT loss calculator 611 calculates the turn-on energy Eon of the IGBT with respect to the current value I, and sends the turn-on energy Eon to the calculator P2.
The IGBT off loss data table 616 stores the loss characteristics of the IGBT in the off state. In the IGBT off loss data table 616, the current value I in the case that the IGBT transitions from the on state to the off state is associated with a turn-off energy Eoff of the IGBT generated when the IGBT transitions from the on state to the off state. Based on the IGBT off loss data table 616 and the current value I generated when the IGBT transitions from the on state to the off state, the IGBT loss calculator 611 calculates the turn-off energy Eoff of the IGBT with respect to the current value I, and sends the turn-off energy Eoff to the calculator P3.
The calculator P1 multiplies the current value I in the steady state of the IGBT, the voltage Vce, the duty ratio Rduty of the IGBT, and a first coefficient K1, and sends the result to the adder A1.
The calculator P2 multiplies the turn-on energy Eon of the IGBT, the switching frequency fc of the IGBT, and a second coefficient K2, and sends the result to the adder A1.
The calculator P3 multiplies the turn-off energy Eoff of the IGBT, the switching frequency fc of the IGBT, and a third coefficient K3, and sends the result to the adder A1.
The adder A1 adds up the values sent from the calculators P1, P2, and P3 to compute the power loss PIGBT in the IGBT. That is, the IGBT loss calculator 611 computes the power loss PIGBT in the IGBT using Formula (1) below.
[Formula 1]
P
IGBT
=K1×(I×Vce×Rduty)+K2×(Eon×fc)+K3×(Eoff×fc) (1)
Here, any value can be set as the first coefficient K1, the second coefficient K2, and the third coefficient K3 as long as the value has a positive sign. The adder A1 outputs the power loss PIGBT in the IGBT to the chip temperature change calculator 62A.
The FWD steady loss data table 617 stores the loss characteristics of the FWD in the steady state. In the FWD steady loss data table 617, the current value I is associated with a voltage Vf generated when the current value I is applied to the FWD. Based on the FWD steady loss data table 617 and the current value I in the steady state measured by the current measuring instrument 3A, the FWD loss calculator 612 calculates the voltage Vf generated when the current value I is applied to the FWD, and sends the voltage Vf to the calculator P4.
The FWD recovery loss data table 618 stores the recovery loss characteristics of the FWD. In the FWD recovery loss data table 618, the current value I is associated with a turn-on energy Erec of the FWD generated due to the recovery characteristics of the FWD with respect to the current value I. Based on the FWD recovery loss data table 618 and the current value I in the recovery state measured by the current measuring instrument 3A, the FWD loss calculator 612 calculates the turn-on energy Erec of the FWD with respect to the current value I in the recovery state, and sends the turn-on energy Erec to the calculator P5.
The calculator P4 multiplies the current value I in the steady state of the FWD, the voltage Vf, the duty ratio Rduty of the FWD, and a fourth coefficient K4, and sends the result to the adder A2.
The calculator P5 multiplies the turn-on energy Erec of the FWD, the switching frequency fc of the FWD, and a fifth coefficient K5, and sends the result to the adder A2.
The adder A2 adds up the values sent from the calculators P4 and P5 to compute the power loss PFWD in the FWD. That is, the FWD loss calculator 612 computes the power loss PFWD in the FWD using Formula (2) below.
[Formula 2]
P
FWD
=K4×(I×Vf×Rduty)+K5×(Erec×fc) (2)
Here, any value can be set as the fourth coefficient K4 and the fifth coefficient K5 as long as the value has a positive sign. The adder A2 outputs the power loss PFWD in the FWD to the chip temperature change calculator 62A.
The chip temperature change calculator 62A stores data of a transient thermal resistance Rth(t) of the IGBT and data of a transient thermal resistance Rth(t) of the FWD. The data of the transient thermal resistance Rth(t) are data indicating temporal changes in the thermal resistance value of the switching element.
The chip temperature change calculator 62A calculates the chip temperature change ΔTj in the semiconductor chip 113A containing the IGBT based on the data of the transient thermal resistance Rth(t) of the IGBT and the power loss PIGBT computed by the power loss calculator 61. The chip temperature change calculator 62A calculates the chip temperature change ΔTj in the semiconductor chip 113B containing the FWD based on the data of the transient thermal resistance Rth(t) of the FWD and the power loss PFWD computed by the power loss calculator 61. The chip temperature change calculator 62A outputs the chip temperature change ΔTj in the IGBT and the chip temperature change ΔTj in the FWD to the temperature change calculator 63.
As illustrated in
The chip temperature change calculator 62A computes the chip temperature change ΔTj using the power loss PLoss generated in the switching element computed by the power loss calculator 61 and the transient thermal resistance Rth(t) that is based on Formula (3). The method of computing the chip temperature change ΔTj will be described later.
The chip temperature change calculator 62B expresses the transient thermal resistance Rth(t) by the sum of a plurality of heat transfer functions of a plurality of first-order lag systems. In
By increasing the number of heat transfer functions to be added in Formula (4), it is possible to express the transient thermal resistance Rth(t) with higher accuracy.
The chip temperature change calculator 62A can compute the chip temperature change ΔTj with Formula (5) below using the power loss PLoss generated in the switching element computed by the power loss calculator 61 and the transient thermal resistance Rth(t) that is based on Formula (3).
Note that the chip temperature change calculator 62B may compute the chip temperature change ΔTj with Formula (5) below using the power loss PLoss generated in the switching element computed by the power loss calculator 61 and the transient thermal resistance Rth(t) that is based on Formula (4).
[Formula 5]
ΔTj=Rth(t)×PLoss (5)
PLoss in Formula (5) is the power loss PIGBT or the power loss PFWD. The operation of the chip temperature change calculators 62A and 62B will be described in detail using Formula (5). Note that the chip temperature change calculators 62A and 62B operate similarly, and thus the operation of the chip temperature change calculator 62A will be described below.
The chip temperature change calculator 62A computes the chip temperature change ΔTj_IGBT in the IGBT using the transient thermal resistance Rth(t)_IGBT of the IGBT, the power loss PIGBT in the IGBT, and Formula (6) below.
[Formula 6]
ΔTj_IGBT=Rth(t)_IGB T×PIGBT (6)
In addition, the chip temperature change calculator 62A computes the chip temperature change ΔTj FWD in the FWD using the transient thermal resistance Rth(t) FWD of the FWD, the power loss PFWD in the FWD, and Formula (7) below.
[Formula 7]
ΔTj_FWD=Rth(t)_FWD×PFWD (7)
The chip temperature change calculator 62A substitutes the power loss PIGBT in the IGBT or the power loss PFWD in the FWD for the power loss PLoss in Formula (5). In addition, the chip temperature change calculator 62A substitutes the transient thermal resistances Rth(t)_IGBT of the IGBT or the transient thermal resistance Rth(t) FWD of the FWD for the transient thermal resistance Rth(t) in Formula (5). Through these substitutions, the chip temperature change calculator 62A is able to compute each of the chip temperature change ΔTj_IGBT in the IGBT and the chip temperature change ΔTj FWD in the FWD for output to the temperature change calculator 63.
However, the present embodiment does not exclude the form in which either the chip temperature change ΔTj_IGBT in the IGBT or the chip temperature change ΔTj FWD in the FWD is selected and output. For example, the chip temperature change calculator 62A can output the result of computation based on Formula (6) as the chip temperature change ΔTj_IGBT so that the power conversion device 200A estimates the power cycle life of only the IGBT.
Returning to
The rise change threshold storage unit 632 stores the rise change threshold X as a first threshold, and the rise change threshold X is read by the rise maximum value computation unit 631. The rise change threshold X is a threshold for determining whether the chip temperature has a maximum value while the chip temperature is rising. Specifically, the rise change threshold X is a threshold of temperature fall allowed when it is determined that the temperature of the semiconductor chips 113A and 113B is rising. The rise change threshold storage unit 632 stores the rise change threshold X for the semiconductor chip 113A and the rise change threshold X for the semiconductor chip 113B.
While the chip temperature is rising, once the chip temperature falls by more than the rise change threshold X from the maximum value of the chip temperature in the current power cycle, the rise maximum value computation unit 631 sets the maximum value of the chip temperature in this power cycle as the current maximum value ΔTjmax of chip temperature rise. For example, in a case where the current maximum value of the chip temperature is T1 and the rise change threshold X is T2, once the chip temperature falls below T1−T2, the rise maximum value computation unit 631 determines that the maximum value ΔTjmax of chip temperature rise in this power cycle is T1.
On the other hand, while the chip temperature is rising, as long as the chip temperature falls only within the range of the rise change threshold X from the maximum value of the chip temperature in the current power cycle, the rise maximum value computation unit 631 determines that the chip temperature fall is within the error range. In this case, the rise maximum value computation unit 631 determines that the chip temperature has been rising, and updates the maximum value ΔTjmax of chip temperature rise in the current power cycle.
In this manner, the rise maximum value computation unit 631 computes the maximum value ΔTjmax of chip temperature rise based on the rise change threshold X stored in the rise change threshold storage unit 632, and outputs the maximum value ΔTjmax to the fluctuation difference computation unit 635. This maximum value ΔTjmax of chip temperature rise is the peak value (maximal value) of chip temperature rise in the switching element.
The maximum value ΔTjmax of chip temperature rise is the maximum value of the temperature of the semiconductor chips 113A and 113B in one power cycle. The rise maximum value computation unit 631 computes the maximum value ΔTjmax of chip temperature rise in the semiconductor chip 113A and the maximum value ΔTjmax of chip temperature rise in the semiconductor chip 113B.
Similarly, the fall change threshold storage unit 634 stores the fall change threshold Y as a second threshold, and the fall change threshold Y is read by the fall minimum value computation unit 633. The fall change threshold Y is a threshold for determining whether the chip temperature has a minimum value while the chip temperature is falling. Specifically, the fall change threshold Y is a threshold of temperature rise allowed when it is determined that the temperature of the semiconductor chips 113A and 113B is falling. The fall change threshold storage unit 634 stores the fall change threshold Y for the semiconductor chip 113A and the fall change threshold Y for the semiconductor chip 113B.
While the chip temperature is falling, once the chip temperature rises by more than the fall change threshold Y from the minimum value ΔTjmin of chip temperature fall in the current power cycle, the fall minimum value computation unit 633 sets the minimum value of the chip temperature in this power cycle as the minimum value ΔTjmin of chip temperature fall. For example, in a case where the current minimum value of the chip temperature is T3 and the fall change threshold Y is T4, once the chip temperature exceeds T3+T4, the fall minimum value computation unit 633 determines that the minimum value ΔTjmin of chip temperature fall in this power cycle is T3.
On the other hand, while the chip temperature is falling, as long as the chip temperature rises only within the range of the fall change threshold Y from the minimum value of the chip temperature in the current power cycle, the fall minimum value computation unit 633 determines that the chip temperature rise is within the error range. In this case, the fall minimum value computation unit 633 determines that the chip temperature has been falling, and updates the minimum value ΔTjmin of chip temperature fall in the current power cycle.
In this manner, the fall minimum value computation unit 633 computes the minimum value ΔTjmin of chip temperature fall based on the fall change threshold Y stored in the fall change threshold storage unit 634, and outputs the minimum value ΔTjmin to the fluctuation difference computation unit 635. This minimum value ΔTjmin of chip temperature fall is the peak value (minimal value) of chip temperature fall in the switching element.
The minimum value ΔTjmin of chip temperature fall is the minimum value of the temperature of the semiconductor chips 113A and 113B in one power cycle. The fall minimum value computation unit 633 computes the minimum value ΔTjmin of chip temperature fall in the semiconductor chip 113A and the minimum value ΔTjmin of chip temperature fall in the semiconductor chip 113B.
The fluctuation difference computation unit 635 computes a fluctuation difference in chip temperature. That is, the fluctuation difference computation unit 635 computes the temperature fluctuation difference ΔTj (max−min), which is the difference between ΔTjmax and ΔTjmin. The fluctuation difference computation unit 635 sends the temperature fluctuation difference ΔTj (max−min) to the number calculator 7.
The maximum value storage unit M1 stores the maximum value ΔTjmax of chip temperature rise sent from the rise determination unit 636. The rise determination unit 636 updates the maximum value ΔTjmax of chip temperature rise in the semiconductor chips 113A and 113B based on the chip temperature change ΔTj input from the chip temperature change calculator 62A. In response to determining that the newly input chip temperature change ΔTj is greater than the maximum value ΔTjmax of chip temperature rise stored in the maximum value storage unit M1, the rise determination unit 636 updates the maximum value ΔTjmax of chip temperature rise with the newly input value of the chip temperature change ΔTj. In this case, the rise determination unit 636 sends the chip temperature change ΔTj input from the chip temperature change calculator 62A to the rise comparison unit 637.
The rise comparison unit 637 computes ΔTjmax−X, which is the difference between the maximum value ΔTjmax of chip temperature rise stored in the maximum value storage unit M1 and the rise change threshold X input from the rise change threshold storage unit 632. The rise comparison unit 637 also determines whether ΔTj<ΔTjmax−X is satisfied, and in the case of ΔTj<ΔTjmax−X, outputs the maximum value ΔTjmax of chip temperature rise to the fluctuation difference computation unit 635. In the case of ΔTj≥ΔTjmax−X, the process of updating the maximum value ΔTjmax of chip temperature rise by the rise determination unit 636 is continued.
The rise determination unit 636 compares the maximum value ΔTjmax of chip temperature rise stored in the maximum value storage unit M1 with the newly input chip temperature change ΔTj. The rise determination unit 636 determines whether ΔTj>ΔTjmax is satisfied (step S20). That is, the rise determination unit 636 determines whether the newly input chip temperature change ΔTj is a value greater than the stored maximum value ΔTjmax of chip temperature rise.
In response to the rise determination unit 636 determining that ΔTj>ΔTjmax is satisfied (step S20: Yes), the rise determination unit 636 updates the maximum value ΔTjmax of chip temperature rise with the newly input value of the chip temperature change ΔTj (step S30). In this case, the rise determination unit 636 stores the updated new maximum value ΔTjmax in the maximum value storage unit M1. After step S30, the rise maximum value computation unit 631 returns to step S20.
While ΔTj>ΔTjmax holds, the rise determination unit 636 continues to update the maximum value ΔTjmax. This means that when the chip temperature of the switching element is rising, the maximum value ΔTjmax of chip temperature rise is constantly updated with the input chip temperature change ΔTj.
In response to the rise determination unit 636 determining that ΔTj≤ΔTjmax is satisfied (step S20: No), the rise determination unit 636 inputs the input chip temperature change ΔTj to the rise comparison unit 637. That is, in response to determining that the newly input chip temperature change ΔTj is a value less than or equal to the maximum value ΔTjmax of chip temperature rise, the rise determination unit 636 inputs the chip temperature change ΔTj to the rise comparison unit 637.
The rise comparison unit 637 computes ΔTjmax−X, which is the difference between the maximum value ΔTjmax of chip temperature rise stored in the maximum value storage unit M1 and the rise change threshold X input from the rise change threshold storage unit 632. The rise comparison unit 637 compares ΔTjmax−X with the input chip temperature change ΔTj.
The rise comparison unit 637 determines whether ΔTj<ΔTjmax−X is satisfied (step S40). That is, the rise comparison unit 637 determines whether the input chip temperature change ΔTj is a value less than ΔTjmax−X.
In response to the rise comparison unit 637 determining that ΔTj≥ΔTjmax−X is satisfied (step S40: No), the rise maximum value computation unit 631 returns to step S20 and executes steps S20 to S40.
In response to the rise comparison unit 637 determining that ΔTj<ΔTjmax−X is satisfied (step S40: Yes), the rise comparison unit 637 outputs the current maximum value ΔTjmax of chip temperature rise to the fluctuation difference computation unit 635 (step S50).
In this manner, the rise maximum value computation unit 631 outputs ΔTjmax when the chip temperature change ΔTj input from the chip temperature change calculator 62A shows a decrease of more than the rise change threshold X from the maximum value ΔTjmax of chip temperature rise. Thereafter, the rise maximum value computation unit 631 returns to step S20 and repeats steps S20 to S50.
The minimum value storage unit M2 stores the minimum value ΔTjmin of chip temperature fall sent from the fall determination unit 638. The fall determination unit 638 updates the minimum value ΔTjmin of chip temperature fall in the semiconductor chips 113A and 113B based on the chip temperature change ΔTj input from the chip temperature change calculator 62A. In response to determining that the newly input chip temperature change ΔTj is less than the stored minimum value ΔTjmin of chip temperature fall, the fall determination unit 638 updates the minimum value ΔTjmin of chip temperature fall with the newly input value of the chip temperature change ΔTj. In this case, the fall determination unit 638 sends the chip temperature change ΔTj input from the chip temperature change calculator 62A to the fall comparison unit 639.
The fall comparison unit 639 computes ΔTjmin+Y, which is the difference between the minimum value ΔTjmin of chip temperature fall stored in the minimum value storage unit M2 and the fall change threshold Y input from the fall change threshold storage unit 634. The fall comparison unit 639 also determines whether ΔTj>ΔTjmin+Y is satisfied, and in the case of ΔTj>ΔTjmin+Y, outputs the minimum value ΔTjmin of chip temperature fall to the fluctuation difference computation unit 635. In the case of ATj≤ΔTjmin+Y, the process of updating the minimum value ΔTjmin of chip temperature fall by the fall determination unit 638 is continued.
The fall determination unit 638 compares the minimum value ΔTjmin of chip temperature fall stored in the minimum value storage unit M2 with the newly input chip temperature change ΔTj. The fall determination unit 638 determines whether ΔTj<ΔTjmin is satisfied (step S120). That is, the fall determination unit 638 determines whether the newly input chip temperature change ΔTj is a value less than the stored minimum value ΔTjmin of chip temperature fall.
In response to the fall determination unit 638 determining that ΔTj<ΔTjmin is satisfied (step S120: Yes), the fall determination unit 638 updates the minimum value ΔTjmin of chip temperature fall with the newly input value of the chip temperature change ΔTj (step S130). In this case, the fall determination unit 638 stores the updated new minimum value ΔTjmin in the minimum value storage unit M2. After step S130, the fall minimum value computation unit 633 returns to step S120.
While ΔTj<ΔTjmin holds, the fall determination unit 638 continues to update the minimum value ΔTjmin. This means that when the chip temperature of the switching element is falling, the minimum value ΔTjmin of chip temperature fall is constantly updated with the input chip temperature change ΔTj.
In response to the fall determination unit 638 determining that ΔTj≥ΔTjmin is satisfied (step S120: No), the fall determination unit 638 inputs the input chip temperature change ΔTj to the fall comparison unit 639. That is, in response to determining that the newly input chip temperature change ΔTj is a value less than or equal to the minimum value ΔTjmin of chip temperature fall, the fall determination unit 638 inputs the chip temperature change ΔTj to the fall comparison unit 639.
The fall comparison unit 639 computes ΔTjmin+Y, which is the sum of the minimum value ΔTjmin of chip temperature fall stored in the minimum value storage unit M2 and the fall change threshold Y input from the fall change threshold storage unit 634. The fall comparison unit 639 compares ΔTjmin+Y with the input chip temperature change ΔTj.
The fall comparison unit 639 determines whether ΔTj>ΔTjmin+Y is satisfied (step S140). That is, the fall comparison unit 639 determines whether the input chip temperature change ΔTj is a value greater than ΔTjmin+Y.
In response to the fall comparison unit 639 determining that ΔTjΔTjmin+Y is satisfied (step S140: No), the fall minimum value computation unit 633 returns to step S120 and executes steps S120 to S140.
In response to the fall comparison unit 639 determining that ΔTj>ΔTjmin+Y is satisfied (step S140: Yes), the fall comparison unit 639 outputs the current minimum value ΔTjmin of chip temperature fall to the fluctuation difference computation unit 635 (step S150).
In this manner, the fall minimum value computation unit 633 outputs ΔTjmin when the chip temperature change ΔTj input from the chip temperature change calculator 62A shows a rise of more than the fall change threshold Y from the minimum value ΔTjmin of chip temperature fall. Thereafter, the fall minimum value computation unit 633 returns to step S120 and repeats steps S120 to S150.
Note that in the temperature change calculator 63, the rise change threshold X and the fall change threshold Y may be the same value or different values.
Regarding the temperature fluctuation difference ΔTj (max−min) computed by the temperature change calculator 63, it is desirable that the rise change threshold X be set so as to exclude the range of chip temperature changes in which the degree of power cycle degradation LP/C is so small that it has little influence on the life expected for the power conversion device 200A.
For example, consider switching elements having the same the power loss PLoss: It is obvious that the switching element with a large thermal resistance undergoes larger fluctuations in the chip temperature change ΔTj than the switching element with a small thermal resistance. Therefore, any unintended noise present in the results of computation of switching element loss can lead to errors in the computed values of the temperature fluctuation difference ΔTj (max−min). Such errors may exert a large influence on the degree of power cycle degradation LP/C over time, which can result in the false recognition that the power cycle life will end earlier than the life expected for the power conversion device 200A.
On the other hand, the power conversion device 200A according to the present embodiment uses the thresholds (rise change threshold X and fall change threshold Y) for the maximum value ΔTjmax of chip temperature rise and the minimum value ΔTjmin of chip temperature fall. Therefore, the power conversion device 200A does not compute the temperature fluctuation difference ΔTj (max−min) for any chip temperature change within the thresholds, and thus it is possible to prevent the above-described false recognition.
As illustrated in
The number calculator 7 retains the power cycle life data illustrated in
The number calculator 7 retains a data table of power cycle life data associated with each temperature change, for example, and converts the temperature fluctuation difference ΔTj (max−min) into the number of lifetime power cycles N for each temperature change. For example, the number calculator 7 retains a data table of power cycle life data indicating, for example, that N=B holds when temperature fluctuation difference ΔTj (max−min)=A, so that the number of lifetime power cycles N with respect to the computed temperature fluctuation difference ΔTj (max−min) can be obtained.
Note that the number calculator 7 may store an approximate expression for power cycle life data, and compute the number of lifetime power cycles N with respect to the temperature fluctuation difference ΔTj (max−min) using the approximate expression for power cycle life data. The approximate expression for power cycle life data is an expression that approximates the temperature fluctuation difference ΔTj (max−min) to the number of lifetime power cycles N.
A temperature change in the semiconductor chips 113A and 113B including the switching element causes shear strain at the bonding interface due to the difference between the linear expansion coefficient of the semiconductor chips 113A and 113B and the linear expansion coefficient of the wire 112. The crack in the bonding interface progresses due to repeated thermal stress on the semiconductor chips 113A and 113B; then part of the wire 112 is peeled off, and the current concentrates on the remaining part of the wire 112, causing the semiconductor chips 113A and 113B to deteriorate and break down. The larger the temperature rise during the use of the semiconductor chips 113A and 113B, the more shear strain applied to the bonding interface, accelerating the progress of power cycle degradation. Therefore, the level of power cycle degradation is determined by the temperature change of the semiconductor chips 113A and 113B and the number of cycles of the temperature change.
As an example, there is a method of determining whether the power conversion device is in an operating state or an idle state by comparing the current value of the input current to or the output current from the power conversion device with a threshold. With this method, the temperature fluctuation range of the switching element is estimated from the temperature rise value of the switching element in the operating state and the temperature fall value of the switching element in the idle state, and the degree of power cycle degradation is estimated from the temperature fluctuation range. In the case of this method, it is not possible to consider the temperature fluctuation in the case that the current increases from a value exceeding the threshold with the lapse of time and then returns to the initial value exceeding the threshold. Similarly, it is not possible to consider the temperature fluctuation in the case that the current decreases from a value below the threshold with the lapse of time and then returns to the initial value below the threshold. That is, temperature fluctuations that do not involve the threshold are ignored when considering power cycle degradation. This results in poor estimation accuracy of the degree of power cycle degradation. In this case, it is necessary to apply a switching element having a long power cycle life in anticipation of the power cycle degradation that cannot be considered, which causes an increase in the manufacturing cost of the power conversion device.
On the other hand, the power conversion device 200A according to the present embodiment estimates the degree of power cycle degradation LP/C based on the temperature fluctuation difference ΔTj (max−min) in one power cycle, so that the degree of power cycle degradation LP/C can be estimated accurately. Therefore, it is not necessary to apply a switching element having a power cycle life longer than necessary, and the manufacturing cost of the power conversion device 200A can be reduced.
Here, a modification of the power conversion device 200A according to the first embodiment will be described. In the power conversion device 200A, the place where the current measuring instrument 3A is connected is not limited to between the semiconductor module 1 and the motor 2.
In the power conversion device 200B, a current measuring instrument 3B is connected to the emitter side of the switching element on the lower side of the semiconductor module 1, thereby measuring the current flowing through the switching element. The current measuring instrument 3B is connected to the lower bus between the semiconductor module 1 and the converter circuit 13, and is connected to the temperature change estimation unit 6.
The power conversion device 200B differs from the power conversion device 200A only in the method of measuring the current, and uses similar methods to the power conversion device 200A to estimate a temperature change in the switching element and estimate the power cycle life, for example. Therefore, descriptions thereof are omitted.
The current measuring instrument 3B includes three current measuring instruments. The first current measuring instrument of the current measuring instrument 3B is connected to the emitter side of the lower-arm switching element included in the first leg. The second current measuring instrument of the current measuring instrument 3B is connected to the emitter side of the lower-arm switching element included in the second leg. The third current measuring instrument of the current measuring instrument 3B is connected to the emitter side of the lower-arm switching element included in the third leg.
In the case where the current measuring instrument 3B is connected to the emitter side of the lower-arm switching element as illustrated in
Note that the current measuring instrument 3B may be connected to the collector side of the upper switching element.
A current measuring instrument 3C includes three current measuring instruments. The first current measuring instrument of the current measuring instrument 3C is connected to the collector side of the upper-arm switching element included in the first leg. The second current measuring instrument of the current measuring instrument 3C is connected to the collector side of the upper-arm switching element included in the second leg. The third current measuring instrument of the current measuring instrument 3C is connected to the collector side of the upper-arm switching element included in the third leg.
In the case where the current measuring instrument 3C is connected to the collector side of the upper-arm switching element as illustrated in
As described above, in the first embodiment, the power conversion device 200A sets the maximum value ΔTjmax of chip temperature rise based on the rise change threshold X, and sets the minimum value ΔTjmin of chip temperature fall based on the fall change threshold Y. Consequently, the power conversion device 200A can detect temperature fluctuations without depending on changes in current value during operation or the output frequency of the power conversion device 200A. Therefore, the power conversion device 200A can accurately estimate the degree of power cycle degradation LP/C. Thus, the power conversion device 200A can accurately estimate the life of the switching element; therefore, it is possible to provide the power conversion device 200A that is highly reliable.
In addition, even with different current measurement positions such as those illustrated in
Next, a second embodiment of the present invention will be described with reference to
The power conversion system according to the second embodiment includes the commercial power supply 12, the converter circuit 13, the smoothing capacitor 14, a power conversion device 200C, and the motor 2. The power conversion device 200C includes a reference temperature measuring instrument 11 that measures a reference temperature Tth of the semiconductor module 1, in addition to the components provided in the power conversion device 200A. In addition, the temperature change estimation unit 6 includes the power loss calculator 61, a chip temperature change calculator 62C, and the temperature change calculator 63. The chip temperature change calculator 62C is connected to the power loss calculator 61 and the temperature change calculator 63.
The reference temperature measuring instrument 11 measures the reference temperature Tth of the semiconductor module 1, and outputs the measured reference temperature Tth to the chip temperature change calculator 62C.
For example, in a case where the power converter is operated at low frequency, fluctuation can occur in the ambient temperature of the semiconductor chip including the switching element during the computation of the temperature fluctuation difference ΔTj (max−min), and affect the temperature fluctuation difference ΔTj (max−min). There is a case in which the base temperature of the switching element rises while the chip temperature is rising, and then the base temperature of the switching element does not fall due to some other influence while the chip temperature is falling. In this case, because the increase in the base temperature is not taken into consideration, the power conversion device computes the temperature fluctuation difference ΔTj (max−min) that is excessive.
Therefore, in the present embodiment, the power conversion device 200C computes the temperature fluctuation difference ΔTj (max−min) in consideration of temperature changes other than those in the semiconductor chips 113A and 113B including the switching element.
Specifically, the power conversion device 200C measures a criterial temperature (reference temperature Tth of the semiconductor module 1) in advance, estimates the junction temperature of the semiconductor chips 113A and 113B from the reference temperature Tth and a chip temperature change, and computes the temperature fluctuation difference ΔTj (max−min). Consequently, the power conversion device 200C can accurately estimate the temperature of the switching element.
The reference temperature Tth measured by the reference temperature measuring instrument 11 is the substrate temperature in the semiconductor module 1 or the temperature of the base plate 115. Therefore, the reference temperature measuring instrument 11 is located on the bottom surface of the semiconductor chips 113A and 113B, the upper surface of the base plate 115, or the like.
Note that the power conversion device 200C may measure the temperature of the base plate 115 by attaching a cooler (cooling fin) to the semiconductor module 1 and measuring the temperature of the cooler.
The reference temperature measuring instrument 11 may have any configuration as long as it is configured to measure the reference temperature Tth. For example, the reference temperature measuring instrument 11 may include a thermistor, an optical system temperature sensor, or the like.
In a similar manner to the chip temperature change calculator 62A according to the first embodiment, the chip temperature change calculator 62C computes the chip temperature change ΔTj based on the power loss PLoss input from the power loss calculator 61.
The chip temperature change calculator 62C adds the reference temperature Tth input from the reference temperature measuring instrument 11 to the chip temperature change ΔTj computed using the power loss PLoss and the transient thermal resistance Rth(t). The chip temperature change calculator 62C outputs the result of the addition of the reference temperature Tth to the chip temperature change ΔTj as a chip temperature Tj to the temperature change calculator 63.
The temperature change estimation unit 6 may include a chip temperature change calculator 62D, instead of the chip temperature change calculator 62C.
In a similar manner to the chip temperature change calculator 62B according to the first embodiment, the chip temperature change calculator 62D expresses the transient thermal resistance Rth(t) by the sum of a plurality of heat transfer functions of a plurality of first-order lag systems. The chip temperature change calculator 62D adds the reference temperature Tth input from the reference temperature measuring instrument 11 to the chip temperature change ΔTj computed using the power loss PLoss and the transient thermal resistance Rth(t). The chip temperature change calculator 62D outputs the result of the addition of the reference temperature Tth to the chip temperature change ΔTj as the chip temperature Tj to the temperature change calculator 63.
In the first embodiment, the temperature change calculator 63 computes the temperature fluctuation difference ΔTj (max−min) of the switching element based on the chip temperature change ΔTj, whereas the temperature change calculator 63 in the second embodiment computes the temperature fluctuation difference ΔTj (max−min) of the switching element based on the chip temperature Tj. The temperature change calculator 63 according to the second embodiment computes the temperature fluctuation difference ΔTj (max−min) through similar processing to the temperature change calculator 63 according to the first embodiment.
The number calculator 7, the degradation degree calculator 8, the alarm display 9, and the degradation degree display 10 in the power conversion device 200C execute similar processing to the number calculator 7, the degradation degree calculator 8, the alarm display 9, and the degradation degree display 10 in the power conversion device 200A.
As described above, in the second embodiment, the power conversion device 200C estimates the degree of power cycle degradation LP/C in consideration of the reference temperature Tth, and thus can estimate the degree of power cycle degradation LP/C more accurately than the power conversion device 200A.
Next, a third embodiment of the present invention will be described with reference to
The power conversion system according to the third embodiment includes the commercial power supply 12, the converter circuit 13, the smoothing capacitor 14, a power conversion device 200D, and the motor 2. The power conversion device 200D includes a data logger 15 in addition to the components provided in the power conversion device 200A. In addition, the temperature change estimation unit 6 includes the power loss calculator 61, the chip temperature change calculator 62A, the temperature change calculator 63, and a current estimation unit 64.
The data logger 15 is an example of a measuring instrument that measures the actual current waveform flowing through the switching element. The data logger 15 sends the measured actual current waveform to the current estimation unit 64. Note that the data logger 15 may be configured separately from the power conversion device 200D.
In the power conversion device 200D, the current value I measured by the current measuring instrument 3A is sent to the current estimation unit 64. In addition, the controller 4 sends the control signal SG to the drive signal generation unit 5, the power loss calculator 61, and the current estimation unit 64.
Based on the current value I measured by the current measuring instrument 3A and the control signal SG input from the controller 4, the current estimation unit 64 removes the influence of noise from the current value I to obtain an actual current value IAI for output.
For example, in a case where the power converter is operated at low current, noise can be superimposed on the current value I measured by the current measuring instrument 3A, and cause an error in the computation of the power loss PLoss by the power loss calculator 61. Such an error in the computation of the power loss PLoss results in reduced estimation accuracy of the degree of power cycle degradation LP/C.
Therefore, in the present embodiment, the power conversion device 200D computes the noise superimposed on the current value I, learns the actual current value IAI without noise, and estimates the degree of power cycle degradation LP/C using the actual current value IAI.
The state observation unit 643 observes the current value I output from the current measuring instrument 3A and the control signal SG output from the controller 4 as state variables, and outputs the state variables to the learning unit 644. In the learning stage, the data acquisition unit 642 acquires the actual current waveform of the current flowing through the switching element from a current detection device such as the data logger 15, and outputs the actual current waveform to the learning unit 644.
The actual current waveform in the learning stage refers to a pure current waveform with no noise superimposed. An example of the actual current waveform in the learning stage is the current waveform measured by opening the semiconductor module 1 and directly attaching a current detection device to the switching element.
The learning unit 644 learns a computation model for computing the actual current value IAI corresponding to the current value I based on the data set created based on the combination of the state variables output from the state observation unit 643 and the actual current waveform output from the data acquisition unit 642. The data set is data in which the state variables and the actual current waveform (determination data) are associated with each other. The state variables output from the state observation unit 643 are the current value I output from the current measuring instrument 3A and the control signal SG output from the controller 4.
In the utilization stage, the estimated current output unit 645 receives the current value I and the control signal SG output from the state observation unit 643 via the learning unit 644, computes the actual current value IAI using the computation model, which is the learning model learned by the learning unit 644, and then outputs the actual current value IAI to the power loss calculator 61.
The actual current value IAI output from the estimated current output unit 645 to the power loss calculator 61 corresponds to the current value I (current value I output from the current measuring instrument 3A) in the first and second embodiments. That is, the actual current value IAI is a current value that the power loss calculator 61 uses to calculate the power loss PLoss.
The current estimation unit 64 learns a computation model for computing the actual current value IAI in the learning stage, and computes the actual current value IAI using the computation model in the utilization stage. Consequently, the current estimation unit 64 learns the actual current value IAI without noise for use in estimating the degree of power cycle degradation LPG.
(Learning Stage)
The data acquisition unit 642 acquires the actual current waveform of the current flowing through the switching element from a current detection device such as the data logger 15. In addition, the state observation unit 643 observes the current value I output from the current measuring instrument 3A and the control signal SG output from the controller 4 as state variables. The learning unit 644 learns a computation model for computing the actual current value IAI based on the data set created based on the combination of the state variables output from the state observation unit 643 and the actual current waveform output from the data acquisition unit 642.
(Utilization Stage)
The current estimation unit 64 computes the actual current value IAI using the computation model learned by the learning unit 644. Specifically, the current estimation unit 64 computes the actual current value IAI by inputting the current value I output from the current measuring instrument 3A and the control signal SG output from the controller 4 to the computation model. The power conversion device 200D estimates the degree of power cycle degradation LP/C using the actual current value IAI.
Note that the machine learning device 641 is not necessarily provided in the power conversion device 200D, and may be provided outside the power conversion device 200D. The machine learning device 641 may be provided in a device connectable to the power conversion device 200D via a network. That is, the machine learning device 641 may be a separate component connected to the power conversion device 200D via a network. Alternatively, the machine learning device 641 may exist on a cloud server.
The learning unit 644 learns the actual current value IAI corresponding to the current value I through what is called supervised learning according to, for example, a neural network model. Here, supervised learning refers to a model that provides a large number of input-result (label) data pairs to a learning device to learn features in those data sets and estimate results from inputs.
A neural network includes an input layer composed of a plurality of neurons, an intermediate layer (hidden layer) composed of a plurality of neurons, and an output layer composed of a plurality of neurons. The number of intermediate layers may be one, or may be two or more.
The neural network according to the third embodiment learns the actual current value IAI through what is called supervised learning according to the data set created based on the combination of the current value I and the control signal SG observed by the state observation unit 643 and the actual current waveform acquired by the data acquisition unit 642.
Specifically, the neural network learns the actual current value IAI by adjusting the weights w11 to w16 and w21 to w26 such that outputs from the output layers Z1 to Z3 in response to inputs of the current value I and the control signal SG to the input layers X1 to X3 approach the actual current waveform. The learning unit 644 sends the neural network with the adjusted weights w11 to w16 and w21 to w26 to the estimated current output unit 645.
The learning unit 644 may learn the actual current value IAI according to the data sets created for a plurality of power conversion devices. The learning unit 644 may learn the actual current value IAI by acquiring data sets from a plurality of power conversion devices used at the same site or by using the data sets collected from a plurality of power conversion devices operating independently at different sites. Further, it is possible to add a new power conversion device to a list of power conversion devices from which data sets are collected or to remove some power conversion device from the list during processing. In addition, a machine learning device that has learned the actual current value IAI for some power conversion device may be attached to a different power conversion device, and the actual current value IAI may be relearned and updated for the different power conversion device.
A learning algorithm for use in the learning unit 644 can be deep learning, which learns feature extraction directly. Alternatively, other known methods such as genetic programming, functional logic programming, and support vector machines, for example, can be used to execute machine learning.
The current estimation unit 64 outputs the actual current value IAI computed using the computation model to the power loss calculator 61. The power loss calculator 61 calculates the power loss PLoss generated in the switching element based on the actual current value IAI acquired from the current estimation unit 64 and the control signal SG input from the controller 4. Thereafter, the power conversion device 200D estimates the degree of power cycle degradation LP/C according to the procedure described in the first embodiment. Note that the current estimation unit 64 may be applied to the power conversion devices 200A, 200B, and 200C.
Here, the hardware configuration of the current estimation unit 64 will be described.
The current estimation unit 64 can be implemented by an input device 151, a processor 152, a memory 153, and an output device 154. The processor 152 is exemplified by a central processing unit (CPU, also referred to as a central processing device, a processing device, a computation device, a microprocessor, a microcomputer, a processor, or a digital signal processor (DSP)), or a system large scale integration (LSI). The memory 153 is exemplified by a random access memory (RAM) or a read only memory (ROM).
The current estimation unit 64 is implemented by the processor 152 reading and executing a computer-executable learning program for the actual current value IAI stored in the memory 153 for executing the operation of the current estimation unit 64. It can also be said that the learning program that is a program for executing the operation of the current estimation unit 64 causes a computer to execute the procedure or method related to the current estimation unit 64.
The learning program to be executed by the current estimation unit 64 has a module configuration including the machine learning device 641 and the estimated current output unit 645, which are loaded on a main storage device and generated on the main storage device.
The input device 151 receives the current value I, the control signal SG, the actual current waveform, and the like for transmission to the processor 152. The memory 153 is also used as a temporary memory when the processor 152 executes various processes. The memory 153 stores, for example, the learning program, the current value I, the control signal SG, the actual current waveform, and the like. The output device 154 outputs the actual current value IAI to the power loss calculator 61.
The learning program may be stored in a computer-readable storage medium in an installable or executable file and provided as a computer program product. Alternatively, the learning program may be provided to the current estimation unit 64 via a network such as the Internet.
Note that a part of the function of the current estimation unit 64 may be implemented by dedicated hardware such as a dedicated circuit, and the other part may be implemented by software or firmware. In addition, the power conversion devices 200A to 200C may be partially configured by the hardware of
As described above, in the third embodiment, the current estimation unit 64 learns the actual current value IAI corresponding to the current value I based on the current value I, the control signal SG, and the actual current waveform, and the power conversion device 200D estimates the degree of power cycle degradation LP/C using the actual current value IAI in which the influence of noise in the current value I is reduced. Consequently, it is possible to estimate the degree of power cycle degradation LP/C in which the influence of noise in the current value I is reduced.
The configurations described in the above-mentioned embodiments indicate examples of the contents of the present invention. The configurations can be combined with another well-known technique, and some of the configurations can be omitted or changed in a range not departing from the gist of the present invention.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2019/046703 | 11/29/2019 | WO |
