Patent Application
20220406953
This disclosure relates generally to techniques for transmitting power through optical fibers and, in particular, to techniques for high current density power photodiode structures and devices fabricated on bulk gallium and nitrogen containing polar, semipolar or nonpolar materials. The invention can be applied to applications involving conversion of light energy to electrical energy, particularly via optical fibers, other optoelectronic devices, and similar products.
Electrical power is typically transmitted over a wire, for example, a copper wire. However, such wires can be heavy, cumbersome, and expensive, and the transmitted power can be subject to electromagnetic interference. Some of these limitations can be overcome by transmitting power over an optical fiber but, unfortunately, with current capability such approaches are not yet commercially viable. In addition, current approaches generally involve light at infrared wavelengths, which has certain disadvantages over visible light, such as greater sensitivity to temperature variations in the surrounding environment.
Gallium nitride (GaN) based optoelectronic and electronic devices are of tremendous commercial importance. The best-developed of these devices include light emitting diodes (LEDs) and laser diodes, and GaN-based power diodes and transistors are becoming increasingly important. There is also interest in emerging applications. De Santi, and coauthors [Materials 11, 153 (2018)] described an application whereby electrical power is converted to optical power using a laser diode, the optical power is coupled to an optical fiber and transmitted to a remote location, then the optical power is converted back to electrical power using a photodiode. Both the laser diode and the photodiode were based on GaN-on-sapphire devices and the system performance was relatively poor. The photodiode was a particular challenge, with a reported efficiency of 17%. GaN-based solar cells have also been reported by a number of groups, typically utilizing GaN-on-sapphire structures for low power (ca. one sun) applications. Even concentrator solar cell structures, which are well known in the art for other materials systems, are only able to generate substantially lower current densities than those that are the principal focus of the current invention.
In the case of laser diodes, it is well known that superior performance and reliability can be obtained in GaN-on-GaN devices, which have greatly reduced defect densities and have undergone many years of optimization and improvement. In the case of photodiodes, considerably less work has been done. For example, D′Evelyn et al. [U.S. Pat. No. 6,806,508] disclosed a GaN-on-GaN photodiode, but the detailed performance characteristics were not reported and the device was intended for photodetector applications rather than for power diode applications involving optical fiber.
Related applications have been disclosed using GaAs-based lasers and photodiodes, at wavelengths in the near-infrared. However, due to its larger bandgap, photodiodes based on the nitrides should enable considerably higher open-circuit voltages and superior efficiencies at elevated temperatures and at high input power levels, relative to corresponding GaAs-based devices and systems.
From the above, it is seen that techniques for improving GaN-based power photodiodes are highly desirable.
Embodiments of the disclosure may provide a photodiode structure, including a substrate having a first surface and a second surface, wherein the second surface of the substrate is opposite to the first surface, the substrate is a single-crystalline group-III metal nitride, and the first surface of the substrate has a crystallographic orientation within 5 degrees of (0001) +c-plane, {10-10} m-plane, or a semipolar plane selected from one of {11-2±2}, {60-6±1}, {50-5±1}, {40-4±1}, {30-3±1}, {50-5±2}, {70-7±3}, {20-2±1}, {30-3±2}, {40-4±3}, {50-5±4}, {10-1±1 }, {1 0-1±2}, {1 0-1±3}, or differs from (000-1) by between 2 degrees and 5 degrees. The photodiode structure also includes an n-type layer and a p-type layer that are disposed over the first surface of the substrate, wherein the n-type layer and the p-type layer each comprise AlxInyGa1-x-yN, where 0≤x, y, x+y≤1, and have a dopant concentration of at least 1×1017 cm−3, one or more absorber layers disposed between the n-type and the p-type layers, wherein the one or more absorber layers comprise AlxInyGa1-x-yN, where 0≤x, y, x+y≤1 and have a dislocation density below about 109 cm−2, a p-side electrical contact layer disposed over the p-type layer, wherein the p-side electrical contact layer has an average reflectance of at least 70% for at least one wavelength between 390 nanometers and 460 nanometers and a contact resistance below 3×10−3 Ω cm2, an n-side electrical contact layer disposed over the second surface of the substrate, wherein the n-side electrical contact layer has an average reflectance of at least 70% for at least one wavelength between 390 nanometers and 460 nanometers and a contact resistance below 1×10−3 Ω cm2; and a light receiving surface, wherein the light receiving surface is aligned to cause light, having at least one wavelength between 390 nanometers and 460 nanometers and incident on the light receiving surface at an angle, to be reflected at least once from the n-side electrical contact layer and from the p-side electrical contact layer. The photodiode structure may also be characterized by a fill factor of at least 50% under an illumination level producing a current density of at least 10 A cm−2.
Embodiments of the disclosure may further provide a photodiode structure, including one or more absorber layers, wherein the one or more absorber layers comprise AlxInyGa1-x-yN, where 0≤x, y, x+y≤1, an n-type layer and a p-type layer, wherein the one or more absorber layers being disposed over the n-type layer and the p-type layer being disposed over the one or more absorber layers, a carrier substrate having a first surface and a second surface, wherein the first surface of the carrier substrate being disposed over the p-type layer or under the n-type layer, a p-side electrical contact layer placed in electrical contact with the p-type layer, wherein the p-side electrical contact layer has a contact resistance below 3×10−3 Ω cm2, a p-side reflector layer disposed on one of the p-type layer and the second surface of the carrier substrate, the p-side reflector layer having an average reflectance of at least 70% for at least one wavelength between 390 nanometers and 460 nanometers, an n-side electrical contact layer placed in electrical contact with the n-type layer, wherein the n-side electrical contact layer has a contact resistance below 1×10−3 Ω cm2, an n-side reflector layer disposed over one of the n-side layer and the second surface of the carrier substrate, the n-side reflector layer having an average reflectance of at least 70% for at least one wavelength between 390 nanometers and 460 nanometers, and a light receiving surface, wherein the light receiving surface is aligned to cause light, having at least one wavelength between 390 nanometers and 460 nanometers and incident on the light receiving surface at an angle, to be reflected at least once from the n-side reflector layer and from the p-side reflector layer. The n-type layer and the p-type layer each comprise AlxInyGa1-x-yN, where 0≤x, y, x+y≤1, and have a dopant concentration of at least 1×1016 cm−3. The carrier substrate being substantially transparent at wavelengths between 390 nanometers and 460 nanometers.
Embodiments of the disclosure may further provide a photodiode structure, including a substrate having a first surface, a second surface and a third surface, an n-type layer and a p-type layer that are disposed over the first surface of the substrate, one or more absorber layers disposed between the n-type and the p-type layers, a p-type electrode layer disposed over the p-type layer, an n-type electrode layer disposed over the second surface of the substrate, and a light receiving surface, wherein the third surface comprises the light receiving surface and is configured to cause light received therethrough to be reflected at least once between the n-type electrode layer and the p-type electrode layer. The n-type electrode layer includes an array of openings formed therein, and has an average reflectance of at least 70% at wavelengths between 390 nanometers and 460 nanometers. The p-type electrode layer includes an array of openings formed therein, and has an average reflectance of at least 70% at wavelengths between 390 nanometers and 460 nanometers. The one or more absorber layers include an AlxInyGa1-x-yN material, where 0≤x, y, x+y≤1 and have a dislocation density below about 109 cm−2. The n-type layer and the p-type layer each include an AlxInyGa1-x-yN material, where 0≤x, y, x+y≤1; and have a dopant concentration of at least 1×1016 cm−3. The second surface of the substrate is opposite to the first surface, the third surface of the substrate is aligned at an angle to the first and second surfaces, the substrate is a single-crystalline group-III metal nitride, and the first surface of the substrate has a crystallographic orientation within 5 degrees of (0001) +c-plane, {10-10} m-plane, or a semipolar plane selected from one of {11-2±2}, {60-6±1}, {50-5±1}, {40-4±1}, {30-3±1}, {50-5±2}, {70-7±3}, {20-2±1}, {30-3±2}, {40-4±3}, {50-5±4}, {10-1±1}, {1 0-1±2}, {1 0-1±3}, or differs from (000-1) by between 2 degrees and 5 degrees.
Embodiments of the disclosure may include a photodiode structure, comprising one or more absorber layers lying between n-type and p-type layers, each of the absorber and n-type and p-type layers comprising AlxInyGa1-x-yN, where 0≤x, y, x+y≤1 and having a dislocation density below about 109 cm−2, each of the n-type and p-type non-absorber layers being characterized by a dopant concentration of at least 1×1016 cm−3, wherein the absorber layer is configured for efficient power conversion of light having a wavelength between about 390 nanometers and 460 nanometers; and the structure is characterized by a fill factor of at least 50% under an illumination level producing a current density of at least 10 A cm−2.
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, and may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.
According to the present disclosure, techniques related to manufacturing and applications of power photodiode structures and devices based on group-III metal nitride and gallium-based substrates are provided. More specifically, embodiments of the disclosure include techniques for fabricating photodiode devices comprising one or more of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, structures and devices. Such structures or devices can be used for a variety of applications including optoelectronic devices, photodiodes, power-over-fiber receivers, and others.
As noted previously, lasers and photodiodes are better developed in the GaAs material system. One of the key differences in materials properties between the arsenide and nitride systems is that the bandgap may be varied readily with minimal impact on lattice constant in the case of the arsenides, e.g., via AlGaAs, but not in the case of the nitrides. Traditional photodiode package architectures incorporating nitride absorber layers may require an absorber layer thickness on the order of several hundred nanometers to absorb the large majority of the incident light. Assuming an absorber layer absorption coefficient of 1×105 cm−1, the light absorbed in a single pass is approximately 39%, 63%, 87%, 95%, and 98% for thicknesses of 50, 100, 200, 300, and 400 nm, respectively. In the case of the nitrides, such a thickness of InGaN, with sufficient indium (In) to efficiently absorb blue or violet light, may be too strained to avoid relaxation by dislocation generation or by cracking. The inventors have discovered an approach to circumvent this problem, involving long optical paths through an absorber layer to achieve near-100% optical absorption even with a relatively thin absorber layer. Additional benefits include excellent heat dissipation, zero or very low grid shadow losses, and long effective minority carrier lifetimes. Here, the effective minority carrier lifetime includes photon recycling, defined as reabsorption of photons emitted by the absorber layer.
In addition, photodiode structures, such as a stack of epitaxially-grown layers, have both similarities and differences to structures for light-emitting diodes (LEDs) and laser diodes (LDs). For example, both LED and LD structures commonly include electron blocking layers within a p-type layer, to minimize electron loss from the active region and promote radiative carrier recombination within the active region. However, such structures may increase the series resistance for photodiode structures and may be counter-productive. Similarly, LD structures commonly include one or more of cladding layers, optical confinement layers, and separate confinement heterostructure (SCH) layers that may detract from the performance of the photodiodes, as their design is driven by different considerations than the present application.
For purposes of designing effective epitaxial structures for a photodiode, both in general and for the specific case where the active layer includes or consists of InGaN or Ga(In)N, high levels of active layer optical absorption and of the collection efficiency for minority carriers will increase the detection sensitivity and the operating current, Imp. Low concentrations of defects, both point defects and extended defects, such as dislocations and stacking faults, will reduce Shockley-Read-Hall nonradiative recombination and thereby result in higher operating voltages Vmp. Low concentrations of defects may also enable improved photodiode performance under high light conditions (i.e., high optical power (Watts) conditions). The efficiency η of a photodiode may be written as η=Vmp×Imp/Pin, where Pin is the input radiative power.
Another way of expressing the efficiency η of a photodiode is η=Voc×Isc×FF/Pin, as illustrated schematically in
Relative to prior art photodiodes designed for much lower photon fluxes, mostly fabricated using GaN-on-sapphire structures, the inventive photodiodes, including GaN-on-GaN structures, feature high conversion efficiency due to careful optimization of the composition and doping of the semiconductor layers and to large area p-side and n-side electrical contacts with high reflectivity for use with a many-reflection excitation architecture and with very low contact resistance to minimize lateral ohmic losses at high current densities. In certain embodiments, the current photodiode structures are designed for applications where illumination is provided by a single laser or multiple lasers and enters the structure though an edge or through an aperture, as schematically illustrated in
The large-area surface 102 may have a maximum dimension between about 0.2 millimeter and about 600 millimeters and a minimum dimension between about 0.2 millimeter and about 600 millimeters and substrate 101 may have a thickness between about 10 micrometers and about 10 millimeters, or between about 100 micrometers and about 2 millimeters. In certain embodiments, substrate 101 is substantially circular, with one or more orientation flats. In alternative embodiments, substrate 101 is substantially rectangular. In certain embodiments, large-area surface 102 has a maximum dimension of about 50 mm, 100 mm, 125 mm, 150 mm, 200 mm, 250 mm, or 300 mm. The variation in the crystallographic orientation of the large-area surface 102 may be less than about 5 degrees, less than about 2 degrees, less than about 1 degree, less than about 0.5 degree, less than about 0.2 degree, less than about 0.1 degree, or less than about 0.05 degree.
Substrate 101 may have a surface threading dislocation density less than about 107 cm−2, less than about 106 cm−2, less than about 105 cm−2, less than about 104 cm−2, less than about 103 cm−2, or less than about 102 cm−2. Substrate 101 may have a stacking-fault concentration below about 104 cm−1, below about 103 cm−1, below about 102 cm−1, below about 10 cm−1 or below about 1 cm−1. Substrate 101 may have a symmetric x-ray rocking curve full width at half maximum (FWHM) less than about 500 arcsec, less than about 300 arcsec, less than about 200 arcsec, less than about 100 arcsec, less than about 50 arcsec, less than about 35 arcsec, less than about 25 arcsec, or less than about 15 arcsec. Substrate 101 may have a crystallographic radius of curvature greater than 0.1 meter, greater than 1 meter, greater than 10 meters, greater than 100 meters, or greater than 1000 meters, in at least one or at least two independent or orthogonal directions. In a specific embodiment, substrate 101 has a surface threading dislocation density less than about 105 cm−2, a stacking-fault concentration below about 10 cm−1, and a symmetric x-ray rocking curve full width at half maximum (FWHM) less than about 50 arcsec. The reduced dislocation density in the substrate, relative to most prior art photodiodes, is expected to result in a reduced dislocation density in the semiconductor layers of the photodiode and to a higher open-circuit voltage Voc and a higher efficiency at high current densities.
In some embodiments, the substrate 101 may include regions having a relatively high concentration of threading dislocations separated by regions having a relatively low concentration of threading dislocations. The concentration of threading dislocations in the relatively high concentration regions may be greater than about 105 cm−2, greater than about 106 cm−2, greater than about 107 cm−2, or greater than about 108 cm−2. The concentration of threading dislocations in the relatively low concentration regions may be less than about 106 cm−2, less than about 105 cm−2, or less than about 104 cm−2. Substrate 101 may also or separately include regions having a relatively high electrical conductivity separated by regions having a relatively low electrical conductivity. Substrate 101 may have a thickness between about 10 microns and about 100 millimeters, or between about 0.1 millimeter and about 10 millimeters. Substrate 101 may have a dimension, including a diameter, of at least about 5 millimeters, at least about 10 millimeters, at least about 25 millimeters, at least about 50 millimeters, at least about 75 millimeters, at least about 100 millimeters, at least about 150 millimeters, at least about 200 millimeters, at least about 300 millimeters, at least about 400 millimeters, or at least about 600 millimeters. In a specific embodiment, substrate 101 has a thickness between about 250 micrometers and about 600 micrometers, a maximum lateral dimension or diameter between about 15 millimeters and about 160 millimeters, and includes regions where the concentration of threading dislocations is less than about 104 cm−2.
Substrate 101 may comprise a release layer 1103 for facile separation of a surface layer 1104 from the balance of the substrate, such as a template substrate 1101. In some embodiments, the release layer 1103 has an optical absorption coefficient greater than 1000 cm−1 at at least one wavelength where the template substrate is substantially transparent, with an optical absorption coefficient less than 50 cm−1, thereby enabling substrate removal by a laser lift-off technique, for example, after fabrication of at least one device structure. In certain embodiments, release layer 1103 includes or consists of GaN that is heavily doped with Co, increasing its optical absorption coefficient to greater than 5000 cm−1 over the entire visible spectrum. In one specific embodiment, Co-doped release layer 1103 having a thickness between 0.5 micrometer and 50 micrometers is formed ammonothermally on template substrate 1101, with CoF2 as an additive to the mineralizer and template substrate 1101 consisting of a high quality GaN seed crystal. In another specific embodiment, Co-doped release layer 1103 is formed by MOCVD on a high quality GaN template substrate 1101, using at least one of cyclopentadienylcobalt dicarbonyl ((C5H5)Co(CO)2), cobalt (II) acetylacetonate (Co(CH3C(O)CHC(O)CH3)2), cobalt tricarbonyl nitrosyl (Co(CO)3NO), dicobalt octacarbonyl (Co2(CO)8), and tetracobalt dodecacarbonyl (Co4b(CO)12) as a dopant precursor. In still another specific embodiment, Co-doped release layer 1103 is formed by hydride vapor phase epitaxy (HVPE) on a high quality GaN template substrate 1101, using at least one of cyclopentadienylcobalt dicarbonyl ((C5H5)Co(CO)2), cobalt (II) acetylacetonate (Co(CH3CO)CHCO)CH3)2), cobalt tricarbonyl nitrosyl (Co(CO)3NO), dicobalt octacarbonyl (Co2(CO)8), and tetracobalt dodecacarbonyl (Co4(CO)12) as a dopant precursor. Further details are described in U.S. Pat. No. 8,148,801, which is hereby incorporated by reference in its entirety. In some embodiments, the release layer 1103 comprises InGaN and has a bandgap less than that of the absorber layer described below, thereby enabling substrate removal by a photoelectrochemical etching technique, for example, after fabrication of at least one device structure. In a specific embodiment, release layer 1103 includes or consists of a strained-layer superlattice of InGaN and GaN or AlGaN, where the percent (%) indium (In) in the strained-layer superlattice is greater than that in the absorber layer, and is grown by MOCVD on a high quality GaN template substrate 1101. Further details of an InGaN release layer are described in more detail in U.S. Pat. No. 8,866,149 and in U. S. Patent Application publication no. US2019/0088495, each of which are hereby incorporated by reference in their entirety.
In certain embodiments, substrate 101 consists of a group III metal nitride layer 1104 bonded to or formed on a surface of a template substrate 1101. The group III metal nitride layer 1104 may include gallium. The group III metal nitride layer may be deposited by HVPE, by metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or the like. The group III metal nitride layer 1104 may have a thickness between about 1 micrometer and about 100 micrometers, between about 2 micrometers and about 25 micrometers, or between about 3 micrometers and about 15 micrometers. In certain embodiments, the group III metal nitride layer 1104 has a wurtzite crystal structure and a crystallographic orientation within 5 degrees, within 2 degrees, within 1 degree, or within 0.5 degree of (0001) +c-plane, (000-1) −c-plane, {10-10} m-plane, {11-2±2}, {60-6±1}, {50-5±1}, {40-4±1}, {30-3±1}, {50-5±2}, {70-7±3}, {20-2±1}, {30-3±2}, {40-4±3}, {50-5±4}, {10-1±1}, {1 0-1±2}, {1 0-1±3}, {2 1-3±1}, or {3 0-3±4}. In certain embodiments, a nucleation layer (not shown) is present at the interface between the template substrate 1101 and the group III metal nitride layer 1104. In certain embodiments, the nucleation layer consists of or includes one or more of aluminum nitride, gallium nitride, and zinc oxide. In certain embodiments, the nucleation layer is deposited on the template substrate 1101 by at least one of low-temperature MOCVD, sputtering, and electron-beam evaporation. In certain embodiments, the nucleation layer has a thickness between about 1 nanometer and about 200 nanometers or between about 10 nanometers and about 50 nanometers. In certain embodiments, the substrate further includes one or more strain-management layers, for example, an AlGaN layer or a strained-layer superlattice.
In certain embodiments, surface 102 has atomic impurity concentrations of at least one of oxygen O), and hydrogen (H) above about 1×1016 cm−3, above about 1×1017 cm−3, or above about 1×1018 cm−3. In certain embodiments, a ratio of the atomic impurity concentration of H to the atomic impurity concentration of O is between about 1.1 and about 1000, or between about 5 and about 100. In certain embodiments, surface 102 has impurity concentrations of at least one of lithium (Li), sodium (Na), potassium (K), fluorine (F), chlorine (CI), bromine (Br), or iodine (I) above about 1×1015 cm−3, above about 1×1016 cm−3, or above about 1×1017 cm−3, above about 1×1018 cm−3. In certain embodiments, surface 102 has impurity concentrations of O, H, carbon (C), Na, and K between about 1×1016 cm−3 and 1×1019 cm−3, between about 1×1016 cm−3 and 2×1019 cm−3, below 1×1017 cm−3, below 1×1016 cm−3, and below 1×1016 cm−3, respectively, as quantified by calibrated secondary ion mass spectrometry (SIMS). In another embodiment, surface 102 has impurity concentrations of O, H, C, and at least one of Na and K between about 1×1016 cm−3 and 1×1019 cm−3, between about 1×1016 cm−3 and 2×1019 cm−3, below 1×1017 cm−3, and between about 3×1015 cm−3 and 1×1018 cm−3, respectively, as quantified by calibrated secondary ion mass spectrometry (SIMS). In still another embodiment, surface 102 has impurity concentrations of 0, H, C, and at least one of F and Cl between about 1×1016 cm−3 and 1×1019 cm−3, between about 1×1016 cm−3 and 2×1019 cm−3, below 1×1017 cm−3, and between about 1×1015 cm−3 and 1×1019 cm−3, respectively, as quantified by calibrated secondary ion mass spectrometry (SIMS). In some embodiments, surface 102 has impurity concentrations of H between about 5×1017 cm−3 and 1×1019 cm−3, as quantified by calibrated secondary ion mass spectrometry (SIMS). In a specific embodiment, substrate 101 has an infrared absorption peak at about 3175 cm−1, with an absorbance per unit thickness of greater than about 0.01 cm−1.
Substrate 101 may be characterized by a wurtzite structure substantially free from any cubic entities or other crystal structures, the other structures being less than about 0.1% in volume in reference to the substantially wurtzite structure.
Substrate 101 may be characterized by a total thickness variation (TTV) of less than about 25 micrometers, less than about 10 micrometers, less than about 5 micrometers, less than about 2 micrometers, or less than about 1 micrometer, and by a macroscopic bow that is less than about 200 micrometers, less than about 100 micrometers, less than about 50 micrometers, less than about 25 micrometers, or less than about 10 micrometers. Substrate 101 may have a concentration of macro defects on the large-area surface 102, with a diameter or characteristic dimension greater than about 100 micrometers, of less than about 2 cm−2, less than about 1 cm−2, less than about 0.5 cm−2, less than about 0.25 cm−2, or less than about 0.1 cm−2. The variation in miscut angle across a large-area surface 102 of substrate 101 may be less than about 5 degrees, less than about 2 degrees, less than about 1 degree, less than about 0.5 degree, less than about 0.2 degree, less than about 0.1 degree, less than about 0.05 degree, or less than about 0.025 degree in each of two orthogonal crystallographic directions. The root-mean-square surface roughness of the large-area surface 102, as measured over an area of at least 10 μm×10 μm, may be less than about 0.5 nanometers, less than about 0.2 nanometers, less than about 0.15 nanometers, less than about 0.1 nanometers, or less than about 0.05 nanometers. Substrate 101 may be characterized by n-type electrical conductivity, with a carrier concentration between about 1×1017 cm−3 and about 3×1019 cm−3 and a carrier mobility greater than about 100 cm2/V-s. In certain embodiments, substrate 101 is highly transparent, with an optical absorption coefficient at a wavelength of 405 nanometers, or of 450 nanometers, that is less than about 10 cm−1, less than about 5 cm−1, less than about 2 cm−1, less than about 1 cm−1, less than about 0.5 cm−1. less than about 0.2 cm−1, or less than about 0.1 cm−1.
In certain embodiments, one or more n-type first non-absorber layers 105, comprising AluInvGa1-u-vN layers, where 0≤u, v, u+v≤1, is deposited on the substrate. In certain embodiments, one or more additional layers are deposited to help manage stress in the overall structure. The carrier concentration in first non-absorber layer 105 may lie in the range between about 1016 cm−3 and 1020 cm−3. In certain embodiments, silicon, germanium, or oxygen is the dopant in first non-absorber layer 105. In certain embodiments, germanium is selected as the n-type dopant. In certain embodiments, the carrier concentration in first non-absorber layer 105 lies in the range between 5×1017 cm−3 and 1020 cm−3 or between 2×1018 cm−3 and 6×1019 cm−3. A high doping level may be particularly desirable if substrate 105 has a (0001) +c-plane orientation, as piezoelectric fields may more effectively be screened for efficient carrier collection. Abrupt or graded composition or doping profiles may be incorporated at interfaces within the first non-absorber layer. The deposition may be performed using metalorganic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). For example, the substrate may be placed on a susceptor in an MOCVD reactor. After closing, evacuating, and back-filling the reactor, the susceptor may be heated to a temperature between about 800 and about 1350 degrees Celsius in the presence of a nitrogen-containing gas. In one specific embodiment, the susceptor is heated to approximately 1185 degrees Celsius under flowing ammonia. A flow of a gallium-containing metalorganic precursor, such as trimethylgallium (TMG), triethylgallium (TEG), or triisopropylgallium may be initiated, in a carrier gas, at a total rate between approximately 1 and 50 standard cubic centimeters per minute (sccm). The carrier gas may comprise hydrogen, helium, nitrogen, or argon. The ratio of the flow rate of the group V precursor (ammonia) to that of the group III precursor (trimethylgallium, triethylgallium, trimethylindium, trimethylaluminum) during growth is between about 2000 and about 12000. A flow of disilane in a carrier gas, with a total flow rate of between about 0.1 and 10 sccm, may be initiated. In certain embodiments, doping is achieved by adding one or more of SiH4, Si2H6, SiH2Cl2, SiHCl3, SiCl4, GeH4, GeCl4, O2, and H2O to the input gases. In certain embodiments, one or more non-absorber layers is a metamorphic buffer layer and facilitates accommodation of lattice constant differences between layers. In certain embodiments, the doping level in the first non-absorber layer may be non-uniform, with two or more levels of doping and/or graded doping levels. In certain embodiments, the substrate temperature is varied during the deposition of the first non-absorber layer. In certain embodiments, the substrate temperature is held at a high value, for example, between 1100 and 1350 degrees Celsius for a first portion of the first non-absorber layer, then reduced to a lower value, for example, the same temperature as the temperature at which the absorber layer is deposited, for a second portion of the first absorber layer, for example, between about 700 and about 950 degrees Celsius. In certain embodiments, the thickness of the second portion of the first non-absorber layer is between about 1 nanometer and about 20 nanometers.
Following deposition of the n-type first non-absorber layer 105 for a predetermined period of time, so as to achieve a predetermined thickness, an absorber layer 107 is deposited. In certain embodiments, the absorber layer is deposited by MOCVD, at a substrate temperature between about 700 and about 950 degrees Celsius. Indium may be added to the absorber layer by using at least one of trimethylindium (TMIn), triethylindium (TEIn), and triisopropylindium as a precursor in MOCVD. The deposition rate for the absorber layer may be chosen to lie between about 0.005 and about 1 nanometer per second, or between about 0.01 and about 0.5 nanometer per second, or between about 0.02 and about 0.2 nanometer per second. In certain embodiments, the absorber layer is unintentionally doped. In certain embodiments, the absorber layer is n-type doped, using oxygen, silicon, or germanium, as a dopant, with a dopant concentration between about 5×1015 cm−3 and about 5×1019 cm−3, or between about 5×1016 cm−3 and about 5×1018 cm−3. In certain embodiments, the absorber layer is p-type doped, using Mg as a dopant, with a dopant concentration between about 5×1015 cm−3 and about 5×1019 cm−3, or between about 5×1016 cm−3 and about 5×1018 cm−3. The absorber layer may comprise a single quantum well or a multiple quantum well, with 2-50 quantum wells. In some embodiments, the absorber layer includes between about 10 and about 30 quantum wells. The quantum wells may comprise InGaN wells and GaN barrier layers. In other embodiments, the well layers and barrier layers comprise AlwInxGa1-w-xN and AlyInzGa1-y-zN, respectively, where 0≤w, x, y, z, w+x, y+z≤1, where w<u, y and/or x>v, z so that the bandgap of the well layer(s) is less than that of the barrier layer(s) and of the non-absorber layers. The well layers and barrier layers may each have a thickness between about 0.5 nanometer and about 20 nanometers. In certain embodiments, the barrier layers have a thickness between about 1 nanometer and about 3 nanometers, between about 3 nanometers and about 5 nanometers, between about 5 nanometers and 10 nanometers, or between about 10 nanometers and 15 nanometers. In certain embodiments, the well layers have a thickness between 0.5 nanometer and about 1.5 nanometer, between about 1.5 nanometer and about 2.5 nanometers, between about 2.5 nanometers and about 3.5 nanometers, between about 3.5 nanometers and about 4.5 nanometers, or between about 4.5 nanometers and about 10 nanometers. In another embodiment, the absorber layer includes or consists of a double heterostructure, with an InGaN or AlwInxGa1-w-zN layer about 20 nm to about 500 nm thick surrounded by GaN or AlyInzGa1-y-zN layers, where w<u, y and/or x>v, z. In certain embodiments, the thickness of the double heterostructure is between about 10 nanometers and about 25 nanometers, between about 25 nanometers and about 40 nanometers, between about 40 nanometers and about 60 nanometers, between about 60 nanometers and about 100 nanometers, between about 100 nanometers and about 200 nanometers, or thicker than about 200 nanometers. Abrupt or graded composition or doping profiles may be incorporated at interfaces within the absorber layer. The composition and structure of the active layer are chosen to provide light absorption at a preselected wavelength, for example, at 405 nanometers or at 450 nanometers. In certain embodiments, the wavelength is selected to lie between about 400 nanometers to about 500 nanometers. The absorber layer may be characterized by photoluminescence spectroscopy. In certain embodiments, the composition of the absorber layer is chosen such that the photoluminescence spectrum has a peak that is longer in wavelength than the desired absorption wavelength of the photodiode structure by between 5 nanometers and 50 nanometers or by between 10 nanometers and 25 nanometers. In certain embodiments, the quality and layer thicknesses within the absorber layer are characterized by x-ray diffraction.
In some embodiments, one or more additional second non-absorber layers 109 is deposited next. Second non-absorber layer 109 may comprise AlsIntGa1-s-tN, where 0≤s, t, s+t≤1, with a higher bandgap than the absorber layer, and may be doped p-type. In one specific embodiment, second non-absorber layer 109 comprises AIGaN. In another embodiment, second non-absorber layer 109 comprises an AIGaN/GaN multi-quantum barrier (MQB), comprising alternating layers of AIGaN and GaN, each with a thickness between about 0.2 nm and about 5 nm. In certain embodiments, one or more non-absorber layer is a metamorphic buffer layer and facilitates accommodation of lattice constant differences between layers. Abrupt or graded composition or doping profiles may be incorporated at interfaces within the second non-absorber layer. In some embodiments, the optical designs of the non-absorber layers are tuned to achieve greater than about 70% optical reflection of light transmitted from the substrate through the absorber layers.
Next, a p-type doped AlqInrGa1-q-rN layer 111, where 0≤q, r, q+r≤1, layer is deposited above the absorber layer and, if present, the second non-absorber layer. The p-type layer 111 may be doped with Mg, to a level between about 1016 cm−3 and 1021 cm−3 and may have a thickness between about 5 nanometers and about 1 micrometer, between about 20 nanometers and about 400 nanometers, or between about 100 nanometers and about 250 nanometers. In certain embodiments, the concentration of Mg in the p-type layer closest to the absorber layer is between 1018 cm−3 and 1021 cm−3, between 3×1018 cm−3 and 3×1020 cm−3, or between 1019 cm−3 and 2×102° cm−3. A high doping level may be particularly desirable if substrate 105 has a (0001) +c-plane orientation, as piezoelectric fields may more effectively screened for efficient carrier collection. The outermost 1-30 nanometers of the p-type layer may be doped more heavily than the rest of the layer, so as to enable an improved electrical contact. In certain embodiments, the substrate temperature is varied during the deposition of the p-typed doped layer. In certain embodiments, the substrate temperature is held at a low value, for example, the same temperature as the temperature at which the absorber layer is deposited, for a first portion of the p-typed doped layer, for example, between about 700 and about 950 degrees Celsius. Then the substrate temperature is raised to a higher level, for example, between about 750 and about 1000 degrees Celsius, for a second portion of the p-type doped layer. In certain embodiments, the thickness of the first portion of the p-type doped layer is between about 1 nanometer and about 20 nanometers, or between about 20 nanometers and 40 nanometers.
In a specific embodiment, a tunnel junction and another n-type layer are deposited on top of the p-type layer 111. In certain embodiments, one or more additional non-absorber layers and additional absorber layers are deposited overlying the tunnel junction.
The semiconductor layers, which include the n-type first non-absorber layer 105, absorber layer 107, one or more optional p-type second non-absorber layer 109, p-type layer 111, and may also include additional absorber layers, one or more n-type cladding layers, and one or more p-type cladding layers, have the same crystallographic orientation, to within about two degrees, within about one degree, or within about 0.5 degree, of the crystallographic orientation of the large-area surface 102 of substrate 101, have a very high crystalline quality, comprise nitrogen, and may have a surface dislocation density below 109 cm−2. The semiconductor layers may have a surface dislocation density below 108 cm−2, below 107 cm−2, below 106 cm−2, below 105 cm−2, below 104 cm−2, below 103 cm−2, or below 102 cm−2. In some embodiments, the semiconductor layers are substantially transparent, with an optical absorption coefficient below 100 cm−1, below 50 cm−1 or below 5 cm−1 at wavelengths between about 700 nm and about 3077 nm and at wavelengths between about 3333 nm and about 6667 nm.
In a specific embodiment, the semiconductor layers have an orientation within five degrees of m-plane and the FWHM of the 1-100 x-ray rocking curve of the top surface is below 300 arc sec, below 100 arc sec, or below 50 arc sec. In another specific embodiment, the semiconductor layers have an orientation within five degrees of a-plane and the FWHM of the 11-20 x-ray rocking curve of the top surface is below 300 arc sec, below 100 arc sec, or below 50 arc sec. In yet another specific embodiment, the semiconductor layers have an orientation within five degrees of a semi-polar orientation selected from {1-1 0±1}, {1-1 0±2}, {1-1 0±3}, {2 0-2±1}, {3 0-3±1}, or {1 1-2.+-.2} and the FWHM of the lowest-order semipolar symmetric x-ray rocking curve of the top surface is below 300 arc sec, below 100 arc sec, or below 50 arc sec. In another specific embodiment, the semiconductor layers have an orientation within five degrees of (0001) c-plane and the FWHM of the 0002 x-ray rocking curve of the top surface is below 300 arc sec, below 100 arc sec, or below 50 arc sec. In still another specific embodiment, the semiconductor layers have an orientation within ten degrees of (000-1) c-plane and the FWHM of the 0002 x-ray rocking curve of the top surface is below 300 arc sec, below 100 arc sec, or below 50 arc sec.
In certain embodiments, for process development purposes, it may be useful to fabricate structures with one or more of the above-described layers missing. For example, the p-type GaN layer and the absorber layer could be omitted for purposes of developing or optimizing a reflective p-type electrical contact, as described below. One or more of the p-type contact layer and the p-type layer could be omitted for purposes of developing or optimizing the electrical, optical and material properties of the absorber layer.
The crystallographic orientation of the semiconductor layers and the doping and bandgap profile may have a major impact on the performance of the photodiode. It is well known that for +c-plane GaN-based devices containing heterostructures, spontaneous and piezoelectric polarization, due to the strong polarity of the Ga—N bond and the lack of inversion symmetry in the wurtzite crystal structure, can create strong electric fields that can result in unfavorable device performance. We find that these fields can negatively impact the performance of photodiode structures, particularly at high current densities, and have identified and disclosed herein several approaches to overcome these effects.
The use of +c-plane substrates, that is, where the crystallographic orientation is within 5 degrees, within 2 degrees, within 1 degree, or within 0.5 degree of (0001), has several advantages for high-power photodiode structures and photodiodes, including 1) a more mature commercial supply chain with large-area, epi-ready substrates, 2) well-established, stable epitaxy growth conditions, and 3) relative ease in controlling dopant concentrations over many orders of magnitude. However, as illustrated in the Comparative Examples below, the use of relatively-standard LED-type structures may not enable photodiodes with high fill factors.
In certain embodiments, the deleterious effects of spontaneous and piezoelectric fields in +c-plane photodiodes, which become progressively more severe as the In percent in the absorber layer is increased, are mitigated by the use of high doping levels on both the n-side and the p-side of the absorber layer. The impacts of bandgap alignment and spontaneous and piezoelectric fields on photodiode performance at high current densities has been investigated. The semiconductor layers used in the analysis of photodiode performance are shown schematically in
In the case of absorber layers containing one or more layers that include In0.18Ga0.82N, which are appropriate for absorption of light having a wavelength of about 473 nanometers or less, the short-circuit current and fill factor are very low when the doping level of the n-type layer in contact with a first side of the absorber layer is 2.0×1019 cm−3 and the doping level of the p-type layer in contact with a second side of the absorber layers is 2.0×1019 cm−3, as shown in
In some embodiments, the photodiode structure includes an n-type layer, at least one absorber layer, and a p-type layer that each have a threading dislocation density below 107 cm−2. The photodiode structure may also include one or more absorber layers, an n-type layer, and a p-type layer that have a crystallographic orientation that differs from (000-1) -c-plane by between 2 degrees and 5 degrees. The photodiode structure may also include one or more absorber layers, an n-type layer, and a p-type layer that have a crystallographic orientation within 5 degrees of {10-10} m-plane and each of the n-type and p-type layers are characterized by a dopant concentration of at least 4×1018 cm−3. The photodiode structure may also include one or more absorber layers, an n-type layer, and a p-type layer that have a crystallographic orientation within 5 degrees of a semipolar plane selected from {10-1-2}, {10-1-1}, {20-2-1}, and {30-3-1} and each of the n-type and p-type layers are characterized by a dopant concentration of at least 2×1018 cm−3.
In the case of absorber layers containing one or more layers that include In0.12Ga0.88N, which are appropriate for absorption of light having a wavelength of about 435 nanometers or less, the fill factor is below 60% when the doping level of the n-type layer in contact with a first side of the absorber layer is 2.0×1019 cm−3 and the doping level of the p-type layer in contact with a second side of the absorber layers is 8.0×1018 cm−3. However, when the doping level of the p-type layer in contact with the second side of the absorber layers is raised to 2.0×1019 cm−3, the fill factor is raised to almost 80%, and when the doping level of the p-type layer in contact with the second side of the absorber layers is raised further to 1.0×1020 cm−3, the fill factor is raised to about 93%. The results in the table of
In certain embodiments, the deleterious effects of spontaneous and piezoelectric fields in +c-plane photodiodes are mitigated by use of a −c-plane substrate that has a crystallographic orientation that is within 10 degrees, such as within 6 degrees, within 5 degrees, within 4 degrees, within 3 degrees, within 2 degrees, or within 1 degree of (000-1). In certain embodiments, the substrate and the semiconductor layers have a crystallographic orientation that differs from (000-1) by between 2 degrees and 5 degrees. In certain embodiments, the substrate and the semiconductor layers are misoriented from (000-1) toward a <10-10> m-direction. In certain embodiments, the substrate and the semiconductor layers are misoriented from (000-1) toward a <11-20> a-direction. Referring again to the table of
In certain embodiments, the deleterious effects of spontaneous and piezoelectric fields in +c-plane photodiodes are mitigated by use of an m-plane substrate, that is, with an orientation within where the crystallographic orientation is within 5 degrees, within 2 degrees, within 1 degree, or within 0.5 degree of (10-10). Referring again to the table of
In certain embodiments, the deleterious effects of spontaneous and piezoelectric fields in +c-plane photodiodes are mitigated by use of semipolar substrate that has a crystallographic orientation that is within 5 degrees, within 2 degrees, within 1 degree, or within 0.5 degree of {20-2-1} or {30-3-1}. Referring again to the table of
In certain embodiments, in order to reduce the carbon content in N-polar or semipolar InGaN layers, triethylgallium (TEG) and triethylindium (TEIn) are used as the metalorganic precursors rather than the more conventional trimethyl gallium (TMG) and trimethylindium (TMIn). For example, the carbon concentration in the semiconductor layers may be less than 1×1018 cm−3 or less than 1×1017 cm−3. In certain embodiments, the ratio of hydrogen (H2) and nitrogen (N2) carrier gas, the substrate temperature, and the pressure are optimized to minimize formation of hillocks in the N-polar semiconductor layers.
In certain embodiments, the semiconductor layers are annealed to electrically activate the p-type dopant. In certain embodiments, the annealing is performed in situ in the MOCVD reactor used to deposit the semiconductor layers, for example, under flowing N2 to a temperature between about 500 degrees Celsius and about 900 degrees Celsius. In certain embodiments, the annealing is performed in furnace or in a rapid thermal annealing (RTA) oven, for example, under flowing N2 to a temperature between about 400 degrees Celsius and about 900 degrees Celsius. In certain embodiments, the atmosphere during the annealing process may also contain an oxidizing gas such as O2. In certain embodiments, the fraction of the oxidizing gas within the annealing atmosphere is between about 5% and about 95%. In certain embodiments, the duration of the annealing process is between about one second and about five hours, or between about 10 seconds and about one hour. In certain embodiments, after annealing, the surface of the semiconductor layers is cleaned to prepare them for additional deposition. In certain embodiments, the cleaning includes or consists of one or more of treatment by a mineral acid, such as hydrochloric acid, nitric acid, or aqua regia, a piranha etch, a buffered oxide etch, by dry etching, or by treatment with a plasma, such as an argon plasma.
In certain embodiments, a transparent conductive layer is deposited on the p-type semiconductor layer. In certain embodiments, the transparent conductive layer comprises a transparent conductive oxide (TCO) such as indium tin oxide or aluminum zinc oxide. In certain embodiments, the transparent conductive layer is deposited by a one or more of thermal evaporation, electron-beam evaporation, and sputtering. In certain embodiments, the deposited TCO layer is annealed in a controlled atmosphere containing oxygen at a temperature between about 300 and 700 degrees Celsius, so as to co-optimize the optical/transparency and electrical properties of the TCO layer. In certain embodiments, the transparent conductive layer has a thickness between about 10 nanometers and about 1000 nanometers.
The photodiode structures described in the present disclosure are intended for use in a packaged photodiode with a multiple-reflection geometry. As such, it is important to maximize the reflectivity of the front and back faces of the structure. In addition, in order to maximize the efficiency of the photodiode, it is important to minimize the electrical resistance of the contacts. Referring again to
In certain embodiments, a reflectance measurement of a particular reflective surface may be performed by preparing at least two sample types, with one having the reflective surface left intact and the other having the reflective surface removed. Both samples may be fabricated such that measurement probe light is coupled in with low reflectance through a first surface, undergoes reflection and refraction from a second surface corresponding to the reflective surface that is to be measured, and is coupled out with low internal reflectance through a third surface. In some embodiments, reflections at the first and third surfaces are minimized by application of a dielectric anti-reflective coating tuned to the wavelength of the probe light. Reflections at the first and third surfaces can be reduced further by fabricating the samples such that light transmits through the first and third surfaces at near normal incidence. The optical power transmitted out of the surface corresponding to the reflective surface and the third surface are measured for both sample types and used to calculate the reflectance of the reflective surface according to methods that are well known in the art.
In certain embodiments, a reflective n-side electrical contact 114, with an average reflectivity greater than about 70%, is deposited on the back side of substrate 101. In a preferred embodiment, the average reflectivity of the reflective n-side electrical contact is greater than 80%, greater than 85%, or greater than 90% at a specific angle or range of angles at which light is incident during operation. The contact resistance of the reflective n-side electrical contact is less than 1×10−3 Ω cm2, less than 5×10−4 Ω cm2, less than 2×10−4 Ω cm2, less than 10−4 Ω cm2, less than 5×10−5 Ω cm2, less than 2×10−5 Ω cm2, or less than 10−5 Ω cm2. In preferred embodiments, the contact resistance is less than 5×10−5 Ω cm2. The reflective n-side electrical contact may comprise at least one of silver, gold, aluminum, nickel, platinum, rhodium, palladium, titanium, chromium, or the like. In some embodiments, the reflective n-side electrical contact may include or consist of at least two layers, with a first layer providing a good electrical contact and comprising aluminum or titanium and having a thickness between 0.1 and 5 nanometers, and a second layer providing superior optical reflectivity and comprising aluminum, nickel, platinum, gold, or silver and having a thickness between 10 nanometers and 10 micrometers. In certain embodiments, the reflective n-side contact may include or consist of at least three layers, at least four layers, or at least five layers, so as to co-optimize the reflectivity (maximized), the contract resistance (minimized), and the robustness (maximized). The reflective n-side electrical contact may be deposited by thermal evaporation, electron beam evaporation, sputtering, or another suitable technique. In certain embodiments, the reflective electrical n-side contact serves as the n-side electrode for the power photodiode. In certain embodiments, the reflective n-side contact is planar and parallel to the semiconductor layers, which may be useful for maximizing its reflectivity. In alternative embodiments, the reflected n-side contact is patterned or textured, which may be useful for admission or extraction of light, for example, within an aperture.
In certain embodiments, particularly embodiments where the reflective n-side contact includes aluminum, in order to reduce the contact resistance of the reflective n-side contact, the back side of substrate 101 is processed by reactive ion etching (RIE) using a chlorine-containing gas or plasma. In one specific embodiment, the chlorine-containing gas or plasma includes SiCl4. In certain embodiments, in order to reduce the contact resistance of the reflective n-side contact, further cleaning steps are performed. In certain embodiments, the further cleaning steps include or consist of one or more of treatment by a mineral acid, such as hydrochloric acid, nitric acid, or aqua regia, a buffered oxide etch, by dry etching, or by treatment with a plasma, such as an argon plasma.
In some embodiments, as shown in
The photodiode structure may include a p-side electrical contact layer disposed over the p-type layer, wherein the p-side electrical contact layer has an average reflectance of at least 80% at a specific angle or range of angles at which light is incident during operation for wavelengths between 390 nanometers and 460 nanometers and a contact resistance below 1×10−3 Ω cm2.
As noted above, the photodiode structures described in the present disclosure are intended for use in a packaged photodiode with a multiple-reflection geometry. In some embodiments, during operation the packaged photodiode is configured to receive one or more wavelengths of light from an illumination source 251. The illumination source 251 may include a laser or other useful radiation source. In order to optimize the power efficiency of the photodiode, it is important to maximize the reflectivity of the front and back faces of the structure, and also the sides of individual photodiode die after singulation. In addition, it is important to minimize the electrical resistance of the contacts and to configure the arrangement of light receiving surface 252 of the photodiode to the reflective contact structures (for example, the reflective p-side contact and the reflective n-side contact). Referring again to
In certain embodiments, as also shown in
The photodiode structure may include an n-side electrical contact layer that has an average reflectance of at least 80% at a specific angle or range of angles at which light is incident during operation for wavelengths between 390 nanometers and 460 nanometers and has a contact resistance below 5×104 Ω cm2.
In some embodiments, as illustrated in
In some embodiments, a transparent dielectric 319 is disposed on a portion of the semi-transparent current-spreading layer 321 and between p-side electrical contacts 315 and/or n-side electrical contacts 317. The transparent dielectric may comprise at least one of TiO2, Ta2O5, ZrO2, SiO2, SiOx, SiNx, Si3N4, SiOxNy, Al2O3, or MgF2. The transparent dielectric 319 may be a quarter-wave thick, that is, have a thickness approximately equal to one-quarter of the incident photon wavelength in air divided by the refractive index of the dielectric medium. For example, in the case that the photodiode structure has a design wavelength of 405 nanometers and the transparent dielectric consists of Ta2O5, with a refractive index of approximately 2.28, the thickness of the transparent dielectric 319 may be chosen as about 405/2.28/4=44 nanometers. The transparent dielectric 319 includes open areas in which a p-side electrical contact 315 or an n-side electrical contact 317 is disposed. The p-side electrical contact 315 and the n-side electrical contact 317 may comprise at least one of nickel (Ni), nickel oxide (NiO), titanium-tungsten/gold (Ti-W/Au). In a preferred embodiment, the p-side electrical contact 315 and/or the n-side electrical contact 317 does not extend over the transparent dielectric. A reflective p-side electrical contact 113 is disposed over the transparent dielectric and the electrical contact material and electrically interconnects the p-side electrical contact 315 in the various grid openings. A reflective n-side electrical contact 114 is disposed over the transparent dielectric and the electrical contact material and electrically interconnects the n-side electrical contact 317 in the various grid openings. The reflective electrical contacts 113 and 114 also cooperate with the transparent dielectric 319 to define a reflector for reflecting light within the device. Further variations of the reflective metallic contact are described in U.S. Pat. No. 7,119,372, which is hereby incorporated by reference in its entirety.
In another set of embodiments, as illustrated schematically in
A p-side reflective layer 1315 is deposited on the opposite surface of carrier substrate 1313 from the photodiode structure. P-side reflective layer 1315 may include or consist of one or more of silver, a dielectric mirror, and a distributed Bragg reflector (DBR). P-side reflective layer 1315 may have a reflectivity, at a specific angle or range of angles at which light is incident during operation, above about 80%, above about 85%, above about 90%, or above about 95% at the design wavelength of the photodiode, for example, between 360 nanometers and 460 nanometers.
The photodiode structure may be separated from the template substrate 1101 by a laser lift-off method, as shown schematically in
Alternatively, the photodiode structure may be separated from the template substrate 1101 by photoelectrochemical etching, as shown schematically in
After removal of template substrate 1101, reflective n-side electrical contact 1319, with a reflectivity greater than about 70%, greater than about 80%, or greater than about 90% at a specific angle or range of angles at which light is incident during operation, may deposited on the freshly-exposed back side surface 1317 of nitride layer 1104, as shown schematically in
Variations of the template substrate removal and carrier substrate bonding process are possible. For example, a non-transparent, first carrier substrate 1411 may be bonded to reflective p-side electrical contact 113, as shown schematically in
In certain embodiments, the photodiode structure may be characterized prior to singulation. For example, the optical properties, such as transmission or reflection, may be investigated by optical absorption spectroscopy. The morphology of one or more layers may be characterized by differential interference contrast microscopy (DICM, or Nomarski) and/or by atomic force microscopy. The luminescence properties of one or more epitaxial layers may be characterized by one or more of photoluminescence spectroscopy, photoluminescence microscopy, and microfluorescence. The impurity concentrations in one or more layers may be characterized by calibrated secondary ion mass spectrometry (SIMS). The crystallinity of one or more epitaxially grown layers may be characterized by x-ray diffraction. The electrical properties of one or more layers may be characterized by Hall measurements, Van der Pauw measurements, or non-contact resistivity measurements. The contact resistance and series resistance of one or more of the p-side and n-side contacts and of one or more layers may be investigated by transmission line measurements (TLM). The photodiode electrical properties and power conversion efficiency may be characterized by current-voltage (I-V) measurements, either in the dark or under illumination by conventional or laser light sources of various intensities. Minority carrier collection within the photodiode structure may be quantified by quantum efficiency measurements. The photodiode structure may be further characterized by electroluminescence measurements.
After wafer-level fabrication, individual photodiode die may be separated, for example, by laser scribing and cleaving, by laser cutting, by die sawing, or the like, and packaged. The scribe and cleave direction relative to the crystal axes may be chosen to control the morphology of the edges. For example, c-plane wafers may be cleaved along the m-plane for a smooth cleaved surface, or along the a-plane for a rough cleaved surface composed of m-plane facets.
Embodiments provided by the present disclosure are further illustrated by reference to the following comparative examples and exemplary process examples. It will be apparent to those skilled in the art that many modifications, both to materials, and methods, may be practiced without departing from the scope of the disclosure.
As a point of comparison, a +c-plane, GaN-on-GaN die was harvested from a commercial LED emitting at approximately 405 nanometers and utilized as a photodiode. The LED structure is believed to include an AlGaN electron blocking layer underlying a p-type GaN layer and a multi-quantum-well MQW structure comprising InGaN well layers and GaN barrier layers. The LED structure is believed not to include either highly-doped layers or doped, reduced-bandgap layers directly adjoining the MQW layers. The reverse current-voltage characteristics were recorded under dark and light conditions, where illumination was provided by a commercial 405 nm laser diode. The results are shown in
An epitaxial structure, including a 500 nanometer n-type doped GaN layer containing Si dopant at a concentration of 2×1018 cm−3, followed by a 100 nanometer n-type doped GaN layer containing Si dopant at a concentration of 4×1018 cm−3, followed by an unintentionally doped absorber layer, followed by a 90 nanometer p-type doped layer containing Mg at a concentration of 1×1019 cm−3, followed by a 10 nanometer p+-type doped layer containing Mg at a concentration of 1×1020 cm−3, was deposited on a bulk GaN substrate miscut from (0001) by approximately 0.4 degrees toward [10-10]. The absorber layer was unintentionally doped and consisted of a 7 nanometer GaN layer followed by 10 alternating layers of 4 nanometer In0.14Ga0.86N well layers and 7 nanometer GaN barrier layers. The structure was characterized by an electroluminescence peak at approximately 447 nanometers. The reverse current-voltage characteristics were recorded under dark and light conditions, where illumination was provided by a commercial 405 nm laser diode. The results are shown in
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at a concentration of 2.0×1018 cm−3, followed by a 30 nanometer n-type doped GaN layer containing Si dopant at a concentration of 2×1019 cm−3, followed by an unintentionally doped absorber layer, followed by a 50 nanometer p-type doped layer containing Mg at a concentration of 2×1019 cm−3, followed by a 10 nanometer p+-type doped layer containing Mg at a concentration of 1×1020 cm−3, was deposited on a bulk GaN substrate miscut from (0001) by approximately 0.4 degrees toward [10-10]. The absorber layer was unintentionally doped and consisted of a 40 nanometer double-heterostructure In0.13Ga0.87N layer. The structure was characterized by an electroluminescence peak at approximately 435 nanometers. The reverse current-voltage characteristics were recorded under dark and light conditions, where illumination was provided by a commercial 405 nm laser diode. The results are shown in
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at a concentration of 2.0×1018 cm−3, followed by a 100 nanometer n-type doped GaN layer containing Si dopant at a concentration of 5.0×1017 cm−3, followed by an unintentionally doped absorber layer, followed by a 50 nanometer p-type doped layer containing Mg at a concentration of 2×1020 cm−3, followed by a 10 nanometer p+-type doped layer containing Mg at a concentration of 1×1020 cm−3, is deposited on a bulk GaN substrate miscut from (0001) by approximately 0.4 degrees toward [10-10]. The absorber layer is unintentionally doped and consists of a 40 nanometer double-heterostructure In0.18Ga0.82N layer. The structure is characterized by an electroluminescence peak at approximately 473 nanometers. The reverse current-voltage characteristics are recorded under dark and light conditions, where illumination is provided by a commercial 405 nm laser diode. From the measured results, Voc is evaluated as 2.20 V, Eg=2.62 eV, e Voc/Eg=0.84, and FF 45%. The value of Voc is seen to be relatively good, whereas the low value for the fill factor indicates that improved device designs are needed.
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at a concentration of 2.0×1018 cm−3, followed by a 30 nanometer n-type doped GaN layer containing Si dopant at a concentration of 3.0×1019 cm−3, followed by an unintentionally doped absorber layer, followed by a 50 nanometer p-type doped layer containing Mg at a concentration of 3×1019 cm−3, followed by a 10 nanometer p+-type doped layer containing Mg at a concentration of 1×102° cm−3, is deposited on a bulk GaN substrate miscut from (0001) by approximately 0.4 degrees toward [10-10]. The absorber layer is unintentionally doped and consists of a 40 nanometer double-heterostructure In0.13Ga0.87N layer. The structure is characterized by an electroluminescence peak at approximately 435 nanometers. The reverse current-voltage characteristics are recorded under dark and light conditions, where illumination is provided by a commercial 405 nm laser diode. From the measured results, Voc is evaluated as 2.43 V, Eg=2.85 eV, e Voc/Eg=0.85, and FF 85%.
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at an average concentration of 2.0×1018 cm−3, followed by a 30 nm n-type doped GaN layer containing Si at an average concentration of 4.0×1019 cm−3, followed by an unintentionally doped absorber layer, followed by a 50 nanometer p-type doped layer containing Mg at a concentration of 2×102° cm−3, is deposited on a bulk GaN substrate miscut from (0001) by approximately 0.4 degrees toward [10-10]. The absorber layer is unintentionally doped and consists of a 40 nanometer double-heterostructure In0.18Ga0.82N layer. The structure is characterized by a photoluminescence peak at approximately 473 nanometers. The reverse current-voltage characteristics are recorded under dark and light conditions, where illumination is provided by a commercial 405 nm laser diode. From the measured results, Voc is evaluated as 2.20 V, Eg=2.62 eV, eVoc/Eg=0.84, and FF 91%.
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at an average concentration of 2.0×1018 cm−3, followed by a 100 nm n-type doped GaN layer containing Si at an average concentration of 5.0×1017 cm−3, followed by an approximately 6 nm thick compositionally-graded InGaN layer with an initial composition of GaN and final composition of approximately In0.18Ga0.72N and a Si dopant concentration of approximately 5.0×1017 cm−3 followed by an unintentionally doped absorber layer, followed by a 50 nanometer p-type doped layer containing Mg at a concentration of 2×1020 cm−3, is deposited on a bulk GaN substrate miscut from (0001) by approximately 0.4 degrees toward [10-10]. The absorber layer is unintentionally doped and consists of a 40 nanometer double-heterostructure In0.18Ga0.82N layer. The structure is characterized by a photoluminescence peak at approximately 473 nanometers. The reverse current-voltage characteristics are recorded under dark and light conditions, where illumination is provided by a commercial 405 nm laser diode. From the measured results, Voc is evaluated as 2.20 V, Eg=2.62 eV, eVoc/Eg=0.84, and FF 85%.
An epitaxial structure, including a 300 nanometer n-type doped GaN layer containing Si dopant at an average concentration of 3.5×1018 cm−3, followed by an InGaN—GaN strained-layer-superlattice (SLS), followed by an approximately 6 nm thick compositionally-graded InGaN layer with an initial composition of approximately In0.04Ga0.96N and final composition of approximately In0.2Ga0.8N and a Si dopant concentration of approximately 4.0×1017 cm−3, followed by a 9-period multi-quantum well structure comprised of 3 nm In0.2Ga0.8N wells and 9 nm GaN barrier layers containing Si dopant at a concentration of approximately 3×1017 cm−3, followed by a 100 nanometer p-type doped layer containing Mg at a concentration of approximately 2×1020 cm−3, was grown on a sapphire substrate with the substrate surface normal within 5 degrees of the [0001] of the nitride epitaxial layers. The absorber layer consisted of the 9-period multi-quantum well structure. The structure was characterized by a photoluminescence peak at approximately 457 nanometers. The reverse current-voltage characteristics of fabricated devices were recorded under dark and light conditions, where illumination was provided by a commercial 405 nm laser diode. The results are shown in
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at an average concentration of 1.0×1018 cm−3, followed by an unintentionally-doped, 20-period multi-quantum well structure comprised of 2 nm In0.18Ga0.82N wells and 4 nm GaN barrier layers, followed by a 50 nanometer p-type doped layer containing Mg at a concentration of approximately 2×1018 cm−3, is deposited on a bulk GaN substrate miscut from (000-1) by approximately 4 degrees toward [10-10]. The absorber layer consisted of the 9-period multi-quantum well structure. The structure is characterized by a photoluminescence peak at approximately 470 nanometers. The reverse current-voltage characteristics are recorded under dark and light conditions, where illumination is provided by a commercial 405 nm laser diode. From the measured results, Voc is evaluated as 2.20 V, Eg=2.63 eV, eVoc/Eg=0.84, and FF 88%.
An epitaxial structure, including a 1000 nanometer n-type doped GaN layer containing Si dopant at an average concentration of 5.0×1018 cm−3, followed by an unintentionally-doped, 20-period multi-quantum well structure comprised of 2 nm In0.18Ga0.82N wells and 4 nm GaN barrier layers, followed by a 100 nanometer p-type doped layer containing Mg at a concentration of approximately 1×1019 cm−3, is deposited on a bulk GaN substrate having a crystallographic orientation within 0.1 degree of (30-3-1). The structure is characterized by a photoluminescence peak at approximately 470 nanometers. The reverse current-voltage characteristics are recorded under dark and light conditions, where illumination is provided by a commercial 405 nm laser diode. From the measured results, Voc is evaluated as 2.20 V, Eg=2.63 eV, eVoc/Eg=0.84, and FF 88%.
While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application is a continuation-in-part of U.S. patent application Ser. No. 16/930,250, filed Jul. 15, 2020, which claims the benefit of U.S. Provisional Application No. 62/874,487, filed Jul. 15, 2019, and U.S. Provisional Application No. 62/978,281, filed Feb. 18, 2020, each of which is incorporated by reference herein.
| Number | Date | Country | |
|---|---|---|---|
| 62874487 | Jul 2019 | US | |
| 62978281 | Feb 2020 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 16930250 | Jul 2020 | US |
| Child | 17893048 | US |
