TECHNICAL FIELD
This disclosure relates generally to the field of packaging of power semiconductor devices.
BACKGROUND
Power semiconductor devices which include high-voltage field-effect transistor (HVFET) devices and other integrated circuits (ICs) that dissipate high power are well known in the semiconductor arts. Such power semiconductor devices are typically encapsulated within a package that is designed for assembly onto a printed circuit board (PCB). FIG. 1 is a side view of a typical prior art semiconductor package 100 that includes a body 110 and a plurality of leads 120 that extend outward from the sides of the body. Each of the leads is wider at the top as compared to the bottom. Where the width of leads 120 transition from the narrower bottom part to the wider top part, shoulders 126 are provided. The shoulders 126 of each of leads 120 typically rest on a top surface of the PCB (not shown) when the package is assembled. This provides a separation distance between a bottom surface 140 of package body 110 and the top surface of the PCB. Although this separation distance is useful when cleaning off the top surface of the PCB, this package design suffers from a number of drawbacks.
One of the drawbacks with the prior art semiconductor package of FIG. 1, is that the increased width at the top of leads 120 increases the overall size of the package. This occurs because leads 120 need to be separated by a minimum distance, referred to as a clearance distance, to meet certain electrical standards. Furthermore, any downward force applied to the top of package body 110 during the initial insertion into the PCB and/or during attachment of a heat sink is transferred to the shoulders of the leads. This can stress the leads and cause bending, breaking, or disconnecting of the leads (and/or lead wires) connected to the semiconductor die housed within the package body. In addition, such downward forces may also stress the package body causing delamination of the internal wiring connected to the semiconductor die within the package body.
BRIEF DESCRIPTION OF THE DRAWINGS
The present disclosure will be understood more fully from the detailed description that follows and from the accompanying drawings, which however, should not be taken to limit the disclosed subject matter to the specific embodiments shown, but are for explanation and understanding only. It should also be understood that the elements in the figures are representational, and are not drawn to scale in the interest of clarity.
FIG. 1 illustrates a side view of a prior art semiconductor package.
FIG. 2 is a bottom perspective view of an example power semiconductor package.
FIG. 3A is a front side view of the power semiconductor package shown in FIG. 2 assembled on a circuit board.
FIG. 3
b is an expanded view of a bottom corner section of the assembly shown in FIG. 3A
FIG. 4 illustrates a lateral side view of the assembly shown in FIGS. 3A & 3B.
FIG. 5 is a front side view of the assembly of FIGS. 3 & 4 with a heat sink attached to the top of the package.
FIG. 6 is a bottom view of the power semiconductor package shown in FIG. 2.
FIG. 7 is a bottom view of another example power semiconductor package.
FIG. 8 illustrates a bottom view of yet another example power semiconductor package.
FIG. 9 illustrates a bottom view of still another example power semiconductor package
DESCRIPTION OF EXAMPLE EMBODIMENTS
In the following description specific details are set forth, such as material types, dimensions, structural features, manufacturing steps, etc., in order to provide a thorough understanding of the disclosure herein. However, persons having ordinary skill in the relevant arts will appreciate that these specific details may not be needed to practice the embodiments described. References throughout this description to “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment. The phrases “in one embodiment”, “in an embodiment”, “one example” or “an example” in various places throughout this description are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combinations and/or sub-combinations in one or more embodiments or examples.
FIG. 2 is a bottom perspective view of an example power semiconductor package 200 housing a semiconductor device or die (not shown). The semiconductor die may comprise one of any number of different types of power integrated circuits. For example, the semiconductor die encapsulated within package 200 may include a power output device with an integrated controller circuit for a switching power converter, or a high voltage power switch. In another embodiment, package 200 may include a plurality of semiconductor devices or dies.
Package 200 comprises a body 201 made of any one of a number of different types of packaging materials (e.g., plastic molding compound, ceramic, etc.) that is formed into a rectilinear shape. Body 201 encapsulates the semiconductor die and includes opposing lateral sides 202 & 204, respective front and back sides 206 & 208, a top 212, and a bottom 214. Bottom 214 includes a substantially flat, planar bottom surface 219 and a plurality of bumps or protrusions 218 that extend outward from bottom surface 219. In the example of FIG. 2, each of the protrusions 218 is located near a corresponding corner of bottom surface 219.
Package 200 further includes a plurality of metallic leads 216 that extend outward from opposing lateral sides 202 and 204. In the embodiment shown, six leads are shown extending outward from each of opposing lateral sides 202 and 204. Other embodiments may have more or less leads 216 extending out of respective lateral sides 202 and 204. In still other embodiments, additional leads may extend out of front and back sides 206 & 208. In yet another embodiment, leads 216 may extend out of only one side of package 200. Also, an aspect ratio of package 200, represented by the length and width of body 201 in the y and x directions, respectively, may vary in different implementations.
In the example of FIG. 2, opposing lateral sides 202 and 204 each have substantially flat surfaces that are substantially parallel to one another. Adjacent leads 216 are laterally separated or offset from each other by a minimum distance (shown as distance dCLR in FIG. 4) to meet electrical requirements. For instance, the safety standard document published by the International Electrotechnical Commission, IEC 60950-1, provides general guidelines for clearance distance based on the voltage appearing between conductive parts and the environment in which the package is used.
Continuing with the example of FIG. 2, protrusions 218 are formed integral with body 201. For example, body 201 may be formed using an injection molding process in which substantially non-conductive material is injected into a mold that encapsulates a power semiconductor die. A mold, therefore, is utilized to form the shape, size, location and pattern of protrusions 218 extending outward from bottom surface 219. In another embodiment, protrusions 218 may comprise one or more separate articles formed of the same similar material as body 201. For example, protrusions 218 may comprise a patterned sheet or matrix of material that is adhesively attached to bottom surface 219 during the manufacturing process.
Practitioners in the packaging arts will appreciate that although the example of FIG. 2 shows four protrusions 218, each located in proximity of corners 217 of bottom surface 219, other embodiments may include any number, shape, location and size of protrusions. For example, whereas each of protrusions 218 are shown in FIG. 2 shaped as a round mound (e.g., like a pitcher's mound) or semi-spherical shape. Other embodiments may include protrusions 218 each shaped as a cone, a plateau, a pole, an arch cylindrical, block, pyramidal, etc. Moreover the size, pattern and location of protrusions 218 may vary in different implementations. A1
FIG. 3A illustrates a front side view of semiconductor package 200 shown after assembly onto a printed circuit board (PCB) 301. FIG. 3B is a view of a bottom corner section of the assembly shown in FIG. 3A. Practitioners in the art will appreciate that during the process of mounting or assembling semiconductor package 200 to PCB 301, leads 216 are inserted into through-hole openings 304 of PCB 301 such that a contact area 308 of each protrusion 218 is in contact with an upper surface 302 of PCB 301. An electrical bonding agent or material 306 (e.g., solder) may be utilized to mechanically and/or electrically couple leads 216 to metal traces or lines running along a bottom surface 304 and/or a top surface 302 of PCB 301. In certain installations, a small amount of epoxy or similar adhesive may be applied to the contact area 308 of each protrusion to better secure package 200 to PCB 301.
As clearly shown in FIGS. 3A & 3B, when package 200 is mounted to PCB 301, contact area 308 of each protrusion 218 contacts top surface 302 of PCB 301. For purposes of discussion, contact area 308 is defined as the amount of surface area of a protrusion 218 that is in substantially contact with surface 302 when package 200 is mounted or assembled onto PCB 301. In one embodiment, the total area of all contact areas 308 of protrusions 218 is about 0.7% or less of the total surface area of bottom surface 219. In other embodiments, protrusions 218 may be shaped such that contact area 308 is substantially zero. For example, protrusions 218 may be designed in the shape of a pyramid or cone where only a small tip or point of protrusions 218 contact top surface 302 of PCB 301.
The expanded view of FIG. 3B further shows how protrusions 218 provide a separation distance dHT that separates bottom surface 219 of package 200 from top surface 302 of PCB 301. Essentially, this separation distance dHT is equal to the height of each protrusion 218. That is, in the embodiments shown, protrusions 218 all have substantially the same height dHT. In alternative embodiments, protrusions 218 may have variable heights which allow the separation distance dHT to vary from one side of the package to another. Such a varying separation distance still provides sufficient room to clean top surface 302 of PCB 301 with a fluid. In the examples shown in FIGS. 2-5, height dHT is approximately 250 microns.
FIG. 3B also illustrates one of protrusions 218 being offset or disposed by a distance d1 away from an adjacent side edge (e.g., side 202) of body 201. In one embodiment, distance d1 is approximately 300 microns. However, persons of skill in the art will understand that this distance d1 may vary considerably in different implementations. In certain embodiments, protrusions may be formed coincident with the side surfaces of package 200 (i.e., d1=0).
FIG. 4 illustrates a lateral side view of the assembly of FIGS. 3A & 3B, which shows a set of six leads 216 extending outward from side 202 and down through PCB 301 in a substantially symmetrical arrangement. Adjacent leads 216 are laterally separated or offset from each other by a clearance distance dCLR to meet electrical requirements. In one embodiment the clearance distance dCLR may be about 1.27 mm. When package 200 includes a high voltage device, an adequate clearance distance dCLR may be required to prevent a short circuit occurring between two adjacent leads 216 due to a dielectric breakdown caused by the ionization of air. As shown, each of leads 216 has a slightly tapered tip or end 220 and an extended length section 221 that has a substantially constant width dLW. Width dLW is substantially narrower as compared to the top section of the leads shown in the prior art design of FIG. 1, which allows the overall length (in the y-direction) of package 200 to be considerably reduced. A smaller package translates to a lower cost package for a given die size. In other words, the inclusion of protrusions 218 disposed on bottom surface 219 permits the lead width dLW to be reduced, which results in a reduction in the overall length L of package 200. In another example, a “creepage” distance, i.e., the distance along the surface of package 200 between two leads 216, may be extended with the same package size and same number of leads 216.
FIG. 5 is a front side view of the assembly of FIGS. 3 & 4 with a heat sink 500 attached to top 212 of package 200. Heat sink 500 typically comprises a metallic or other thermally conductive material that is attached to top surface 212 of package 200 using ordinary epoxy 505. Alternatively, various types of other adhesives, a spring clip, a screw, and/or other known adhesive or mechanical techniques may be used to mechanically couple heat sink 500 to top surface 212.
During the process of mounting heat sink 500 to package 200, a large, force (represented by arrows 506) may be applied to secure heat sink 500 to top surface 212 of package 200. In another embodiment, force 506 may be a constant force applied to secure heat sink 500 to top surface 212 of package 200. One benefit of the example power semiconductor packages described herein is that the downward force applied to heat sink 500 is substantially transferred through body 201 to protrusions 218. Thus, protrusions 218 on the bottom of package 200 helps prevent mechanical stress from being imparted to leads 216 and solder 306, which are mechanically vulnerable to breakage or to electrically disconnect from the semiconductor device housed inside package 200. It is therefore appreciated that protrusions 218 further improves the robustness and integrity of package 200 when coupled to heat sink 500.
FIG. 6 is a bottom view of a semiconductor package 600, showing the arrangement of protrusions 618—one near each corner of bottom surface 619. As discussed previously, protrusions 618 may be arranged against or coincident with the edges where bottom surface 619 meets lateral sides 602 & 604 and/or respective front and back sides 606 & 608. Practitioners in the art will appreciate that other alternative arrangements or configurations of protrusions 618 may also be employed. For example, FIG. 7 is a bottom view of another example semiconductor package 700 in which protrusions 718 are arranged on bottom surface 719 such that each of protrusions 718 is disposed at or near the middle of an edge of bottom surface 719 that adjoins a corresponding one of lateral sides 702 & 704 and front and back sides 706 & 708, respectively.
FIG. 8 illustrates a bottom view of yet another example power semiconductor package 800 wherein a plurality of protrusions 818 include a plurality of corresponding elliptically-shaped, substantially flat bases 820 arranged on bottom surface 819 in a triangular pattern. In this embodiment, two protrusions are located near opposite ends of a lateral side 804, with a single protrusion located on bottom surface 819 near the middle of lateral side 802. As is the case for any of the other embodiments described, bases 820 of protrusions 818 may be of an elliptical, triangular, linear, or any other shape.
By way of further example, FIG. 9 shows still another example power semiconductor package 900 that includes a single protrusion 918 having an extended linear shape. Protrusion 918 is disposed on bottom surface 919 near a front side 906 of package 900. Because this embodiment includes only a single protrusion 918, bottom surface 919 will lie at an angle or incline in relation to the surface of the PCB after assembly. In other words, when mounted on a PCB protrusion 918 and the edge of bottom surface 919 that adjoins back side 908 will be in contact with the PCB. In this manner, a varying separation distance between bottom surface 919 and the top surface of the PCB is provided.
Although the present invention has been described in conjunction with specific embodiments, those of ordinary skill in the art will appreciate that numerous modifications and alterations are well within the scope of the present invention. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.
Patent Grant
8207455
