Patent Application
20100109104
The present invention relates generally to pressure sensors used in the medical field and in particular to such sensors used in situ to measure intracoronary pressure and mounted at the distal end of a guide wire, and to methods of manufacture of such sensors.
In order to determine or assess the ability of a specific coronary vessel to supply blood to the heart muscle, i.e. the myocardium, there is known a method by which the intracoronary pressure distally of a stenosis in combination with the proximal pressure is measured. The method is a determination of the so-called Fractional Flow Reserve (See “Fractional Flow Reserve”, Circulation, Vol. 92, No. 11, Dec. 1, 1995, by Nico H. j. Pijls et al.). Briefly, FFRmyo is flow defined as the ratio between the pressure distally of a stenosis and the pressure proximally of a stenosis, i.e. FFRmyo=Pdist/Pprox. The distal pressure is measured in the vessel using a micro-pressure transducer, and the proximal pressure is either the arterial pressure or measured with the same transducer after pulling it back to a position proximal of the stenosis.
One arrangement that could be used in measuring FFR is a sensor guide having a sensor element, an electronic unit, a signal transmitting cable connecting the sensor element to the electronic unit, a flexible tube having the sensor element and cable disposed therein, a solid metal wire having a plurality of sections such that each of the sections has a different flexibility, and a coil which is attached to the distal end of the wire. Examples of such sensor guide wire assemblies are described in U.S. Pat. Nos. 6,112,598, RE35,648 and 6,167,763, where the contents of these patents are hereby incorporated for the assemblies and methods described therein.
Pressure sensors used in the context of measuring intracoronary pressure often contain a deflectable diaphragm. The two main types of such pressure sensors are absolute pressure sensors and differential or relative pressure sensors. In an absolute pressure sensor the diaphragm is usually mounted across a small cavity wherein a reference pressure, usually vacuum pressure, exists, and the pressure to be measured acts on the opposing surface of the diaphragm. A differential pressure sensor measures the difference of two pressures acting on opposing sides of the diaphragm.
The movement or deformation of the diaphragm can be sensed in different ways, such as by measuring the changes of electric characteristics of a piezoresistive body, the changes of resistance of an electrical conductor or the change of capacitance of a suitable adapted capacitor coupled to the movement of the diaphragm and thereby being in varied forced or strained states.
Absolute pressure sensors need a hermetic sealing of a relatively small cavity at the active diaphragm to get a reference pressure, preferably a vacuum enclosure. This can be accomplished on a wafer using e.g. silicon wafer bonding under vacuum conditions.
Generally, for example for use in a sensor guide wire assembly as described above, a small piezoresistive absolute pressure sensor is desired, having a high pressure sensitivity, a controlled temperature behavior and a high long term stability. It should not be affected by environmental changes, such as humidity or possible temperature fluctuations. Also, a manufacturing process suitable for high volume production and with a high yield is preferred.
Recently, micromachining techniques have been developed and refined for producing integrated miniaturized pressure sensors of semiconductor material, providing several advantages over traditional pressure sensors: low cost, high degree of performance and reliability, better signal/noise ratio, and greater reproducibility.
Several pressure sensors based on silicon-on-insulator (SOI) substrates have been proposed. For example, U.S. Pat. Nos. 6,131,466, 5,510,276, 5,095,401, and 7,207,227, disclose such sensors. In U.S. Pat. No. 7,207,227, a method of manufacturing a pressure sensor is described, wherein a cavity is formed in an SOI substrate, and thereafter a second silicon wafer is bonded to the first to seal the cavity. After several etching and deposition steps, a sensor complete with electrical strain gauge is produced.
According to one embodiment of the invention there is provided a pressure sensor chip. The pressure sensor chip comprises: a substrate; a polycrystalline silicon layer formed on the substrate and having a cavity recess formed therein; at least one silicon layer formed on the polycrystalline silicon layer and covering the cavity recess thereby forming a reference chamber with a diaphragm; and a diaphragm movement element configured to sense movement of the diaphragm.
According to another embodiment of the invention there is provided a pressure sensor and guide wire assembly. The pressure sensor and guide wire assembly comprises: a sensor chip; a wire; and a mount, wherein the sensor chip is mounted to the wire via the mount. The sensor chip comprises: a substrate; a polycrystalline silicon layer formed on the substrate and having a cavity recess formed therein; at least one silicon layer formed on the polycrystalline silicon layer and covering the cavity recess thereby forming a reference chamber with a diaphragm; and a diaphragm movement element configured to sense movement of the diaphragm.
According to another embodiment of the invention there is provided a method of forming a pressure sensor chip. The method comprises: providing a substrate; forming a polycrystalline silicon layer on the substrate; forming a cavity recess in the polycrystalline silicon layer; bonding at least one silicon layer to the polycrystalline silicon layer to cover the cavity recess thereby forming a reference chamber with a diaphragm; and forming a diaphragm movement element configured to sense movement of the diaphragm.
A certain pressure exerted on the diaphragm 106 from the surrounding medium will thereby correspond to a certain stretching of the diaphragm 106 and thereby to a certain electronic property response of a diaphragm movement element 108 formed on the diaphragm 106 due to the strain of the diaphragm movement element 108 with the stretching. The diaphragm movement element 108 is configured to sense movement of the diaphragm 106. The diaphragm movement element 108 may be, for example, one or more piezoresistive elements, capacitive elements, or a mechanically resonating element, for example. In the pressure sensor chip 100 of
The disposition of the polycrystalline silicon layer 104 on the substrate 103, where the cavity recess 102 is formed in the polycrystalline silicon layer 104 instead of the substrate 103 provides advantages over the conventional structure shown in
The cavity recess 102 in the polycrystalline silicon layer 104 may be formed with more accurate and reproducible dimensions because the etching process can be tailored to be more accurate. In the case where the sensor chip 100 includes an etch stop layer 107 between the silicon substrate 103 and the polycrystalline silicon layer 104, an appropriate etchant is employed to provide that the polycrystalline silicon layer 104 is selectively etched relative to the etch stop 107, and the cavity recess 102 may be formed so as to expose the etch stop layer 107. Thus, the cavity recess 102 may be formed with an accurately controlled depth and volume. The particular etchant will depend on the material of the etch stop chosen. Alternatively, if no etch stop layer 107 is included, an etchant which selectively etches polycrystalline silicon relative to substrate 103 may be used, and the cavity recess 102 may be formed so as to expose the substrate 103. Suitable etching would include, for example, Deep Reactive Ion Etching (DRIE) using SF6, or wet etching using KOH (Kalium hydroxide).
Forming the cavity recess 102 with accurate and reproducible dimensions is particularly important when the chip sensor 100 is employed as part of a pressure sensor and guide wire assembly (See assembly of
Bonding is also improved when a polycrystalline layer is employed in the context of an SOI device. When forming the sensor chip 100, the crystalline silicon layer 101 can be formed when a silicon substrate is bonded to the underlying substrate having the cavity recess. The bonding is improved when the underlying substrate has a polycrystalline layer formed thereon, as compared with bonding directly to a crystalline silicon substrate.
In the case that the sensor chip includes an etch stop 107, there are many appropriate materials for the etch stop 107. Some examples of etch stop materials include carbon based material, nitrides, and oxides. Doping the top surface of the substrate 103 could also provide an etch stop layer.
As shown in
The proximal end of the first coil 316 is attached to the distal end of the hollow tube 312, while the distal end of the first coil 316 is attached to the proximal end of the sleeve 320. The proximal end of the second coil 318 is connected to the distal end of the jacket 320. Both the first and second coils 316, 318 are flexible coils, allowing flex in the assembly. The dome-shaped tip 322 is attached to the distal end of the second coil 318. The core wire 314 is at least partly disposed inside the hollow tube 312 such that the distal portion of the core wire 314 extends out of the hollow tube 312 and into the second coil 318.
The pressure sensor chip 100 is mounted on the core wire 314 at the position of the sleeve 320 via a mount 330. The pressure sensor chip 100 may be connected to an electronic unit 340 through the electrical leads 326. In the case that the sensor chip is deployed with a Wheatstone bridge configuration, such as that shown in
The polycrystalline layer 404 is bonded to an overlying crystalline silicon layer 401 via bonding oxide layer 422. The crystalline silicon layer 401 and the bonding oxide layer 422 may have thicknesses of about 1500 nm and 20 nm, respectively, for example. The crystalline silicon layer 401 covers the cavity recess 402 thereby forming a reference chamber in the polycrystalline layer 404. The reference chamber may be filled with vacuum or a gas, as desired, and the sensor chip may be an absolute or differential pressure chip. The region of the crystalline silicon layer 401 which is directly over the cavity recess 402 forms a diaphragm 406.
A diaphragm movement element 408 in the form of a piezoresistive layer 436 is formed on the crystalline silicon layer 401 at least party over the diaphragm 406. The piezoresistive layer 436 may have a thickness of about 400 nm, for example. The piezoresistive layer 436 may be of any appropriate piezoresistive material, such as doped silicon, for example. As the diaphragm is strained due to a difference in pressure within the reference chamber, and on the side of the diaphragm 406 away from the reference chamber, the resistive properties of the piezoresistive layer 436 are changed.
An insulator 424 layer, which may have a thickness of about 750 nm or 100 nm, for example, is formed between the piezoresistive layer 436 and the crystalline silicon layer 401 to form insulation therebetween. The insulator layer 424 may be any appropriate insulating material, such as nitrides, or oxides, for example, and may be a thermal oxide, for example.
An insulator layer 426, which may have a thickness of about 200 nm, for example, is formed on the piezoresistive layer 436 between the piezoresistive layer 436 and overlying wiring layer 428, which contacts the piezoresistive layer 436 in a contact hole 450 in the insulator layer 426. The insulator layer 426 may be any appropriate insulating material, such as nitrides, or oxides, for example, and may be a TEOS oxide, for example.
The wiring layer 428 may comprise a conductor layer 454, or a conductor layer 454 and a barrier layer 452, where the barrier layer 452 is between the piezoresistive layer 436 and the conductor layer 454. The conductor layer 454 may be formed of an appropriate conducting material, such as aluminum or copper, for example, and may have a thickness of about 1100 nm, for example. The barrier layer may be any appropriate material which provides diffusion barrier properties between the piezoresistive layer 436 and the conductor layer 454, and may be a refractory metal or refractory metal compound, such as TiW or TiN, for example, and may have a thickness of about 50 nm, for example.
An overlying insulator layer 460 and passivating layer 470 may be formed over the wiring layer 428. The overlying insulator 460 may be of any appropriate insulating material, such as oxides or nitrides. For example, as shown in
The bonded structure of
A silicon substrate wafer 446 is processed by depositing polysilicon layers on both sides of the crystalline silicon substrate 403 resulting in the structure shown in
The silicon substrate wafer 446 with cavity recess 402 of
The piezoresistive layer 436 is doped, such as by implanting dopant, and patterned, where the piezoresistive layer 436 in its patterned form is shown in
An overlying insulator layer 460, such as a bilayer of LTO insulator 462 and silicon nitride insulator 464 may be deposited and patterned as shown in
Although the present invention has been described with reference to specific embodiments it will be apparent for those skilled in the art that many variations and modifications can be performed within the scope of the invention as described in the specification and defined with reference to the claims below.
