1. Technical Field
The present disclosure relates to circuit substrate, particularly to a printed circuit board with carbon nanotube bundles.
2. Description of Related Art
Printed circuit boards (PCBs) are widely used in various electronic devices such as mobile phones, printing heads, and hard disk drives for having electronic components mounted thereon and providing electrical transmission. With the development of electronic technology, multilayer PCBs frequently replace single sided or double sided PCBs.
A multilayer PCB generally includes several electrically conductive layers and several insulation layers. Each of the insulation layers is positioned between two neighboring electrically conductive layers. The electrically conductive layers electrically communicate with each other by plated through holes, which penetrate through the multilayer PCB. However, the electrical conductivity of the plated through holes is not as good as in the electrically conductive layers. Therefore, the electrical property of the PCB is affected.
Therefore, to overcome the described limitations, it is desirable to provide a PCB having improved electrical conductivity.
Many aspects of the present embodiment can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiment. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
Embodiments will now be described in detail below and with reference to the drawings.
The first layer 11 can be a metal layer, for example, a copper layer with a thickness approximately in a range from 10 micrometers (μm) to 70 μm. The first layer 11 has a first electrically conductive pattern 111 formed therein. The first pattern 111 includes a number of first electrical traces 1111 configured for transmitting electrical signals and at least one first electrical contact 1112 electrically communicating with at least one of the first traces 1111. In the illustrated embodiment, the first pattern 111 includes three equidistantly spaced first contacts 1112 in a central portion of the first layer 11, as shown in
The second layer 13 can be a metal layer with a structure corresponding to the first layer 11. That is, the shape and size of the second layer 13 is similar to that of the first layer 11. The second layer 13 has a second electrically conductive pattern 131 formed therein. The second pattern 131 includes a number of second electrical traces 1311 configured for transmitting electrical signals and at least one second electrical contact 1312 electrically communicating with at least one of the second traces 1311. The at least one second contact 1312 corresponds to the at least one first contact 1112. That is, the number of the at least one second contact 1312 is equal to the number of the at least one first contact 1112, the distribution of the at least one second contact 1312 corresponds to that of the at least one first contact 1112. In the illustrated embodiment, the second pattern 131 correspondingly includes three equidistantly spaced second contacts 1312 in a central portion of the second layer 13.
The composite layer 12 is positioned between and in contact with the first and second layers 11, 13. The composite layer 12 includes a polymer matrix 120 and at least one electrically communicating pin 121 embedded in the polymer matrix 120.
Specifically, the matrix 120 is a base film with at least one through hole 1200 defined therein. A cross section of the matrix 120 is substantially similar to that of the first layer 11. A material of the matrix 120 can be polyimide, polyethylene terephthalate, polytetrafluoroethylene, polyamide, polymethylmethacrylate, polycarbonate, glass fiber/resin compound, or other material. A thickness of the matrix 120 is in the range from about 20 μm to about 2 millimeters (mm). The matrix 120 has a first surface 1201 contacting the first layer 11 and a second surface 1202 contacting the second layer 13. The at least one through hole 1200 corresponds to the at least one first contact 1112 and the at least one second contact 1312, and is exposed at both the first and second surfaces 1201, 1202. The at least one through hole 1200 is configured for accommodating the at least one communicating pin 121, which is capable of electrically communicating the at least one first contact 1112 with the at least one second contact 1312. In other words, the number of the at least one conductive pin 121 is equal to the number of the at least one through hole 1200 and the number of the at least one second contact 1312. In the illustrated embodiment, the composite layer 12 correspondingly includes three conductive pins 121, and the matrix 120 has three equidistantly through holes 1200 defined in a central portion thereof.
Each of the conductive pins 121 is positioned in a corresponding through hole 1200, and is isolated from other conductive pins 121 by the matrix 120. An end of each conductive pin 121 is exposed at the first surface 1201 and electrically communicates with a corresponding first contact 1112, the other end of each conductive pin 121 is exposed at the second surface 1202 and electrically communicates with a corresponding second contact 1312, thus, each conductive pin 121 functions as a plated through hole to electrically connect the first and second patterns 111, 131 to each other. A length of each conductive pin 121 is substantially the same or longer than a distance between the first surface 1201 and the second surface 1202. Generally, the length of each of the conductive pins 121 is from about 20 μm to about 2 mm.
Each conductive pin 121 includes a catalyst block 122 and a CNT bundle 123 grown on the catalyst block 122. Each catalyst block 122 is exposed at the first surface 1201 and electrically communicates with a corresponding first contact 1112. Each CNT bundle 123 is exposed at the second surface 1202 and electrically communicates with a corresponding second contact 1312. A cross section of the catalyst blocks 122 is similar to that of the CNT bundles 123. In the illustrated embodiment, the catalyst blocks 122, the CNT bundles 123, the first contacts 1112, and the second contacts 1312 each have a circular cross section, with the catalyst blocks 122 each being coaxial with a corresponding CNT bundle 123, and the diameter of the first contacts 1112 being equal to that of the second contacts 1312, and larger than that of the CNT bundles 123. A material of the catalyst blocks 122 comprises iron, cobalt, nickel, or alloy thereof. A thickness of each of the catalyst blocks 122 is in a range from about 1 nanometer (nm) to 50 nm. The CNT bundles 123 each include a number of substantially parallel CNTs, and extend from the catalyst block 122 to the second surface 1202 inclined at an angle from 80° to 100° relative to the second surface 1202. In other words, the CNT bundles 123 as well as the conductive pins 121 are substantially parallel to each other and substantially perpendicular to the second surface 1202.
It is noted that one second contact 1312 can be electrically in contact with one or more conductive pins 121, but one conductive pin 121 can just be electrically in contact with one second contact 1312. Therefore, electrical signals transmitted in the respective second contacts 1312 will not be interfered with by the conductive pins 121.
It is also noted that the number and distribution of the conductive pins 121 can be varied according to practical need, for example, the conductive pins 121 can be distributed non-uniformly at a peripheral portion of the composite layer 12.
In the illustrated PCB 10, due to the CNT bundles 123 having excellent electrical conductivity along central axes thereof, the conductive pins 121 in the composite layer 12 have excellent electrical conductivity to transmit electrical signals from the first layer 11 to the second layer 13.
The PCB 10 can be manufactured by the following steps.
In step 1, referring to
In step 2, referring to
Firstly, a catalyst precursor layer of iron, cobalt, nickel, or alloy thereof, is deposited on a surface of the first layer 11 by electro-deposition, evaporation, sputtering, or vapor deposition.
Secondly, the catalyst precursor layer is oxidized to form a catalyst layer. Specifically, the first layer 11 and the catalyst precursor layer can be sintered in a furnace to oxidize the catalyst precursor layer.
Thirdly, the catalyst layer is patterned using a lithography method and thereby the equidistantly spaced catalyst blocks 122 are obtained. Each catalyst block 122 includes a number of catalyst particles distributed therein. It is noted that the number and distribution of the catalyst blocks 122 correspond to that of the CNT bundles 123.
In step 3, referring to
In step 4, referring to
In step 5, referring to
In step 6, the first layer 11 is processed using a photolithography process and an etching process to form the first pattern 111 therein, meanwhile the second layer 13 is processed to form a second pattern 131 therein. Thus, the PCB 10 as shown in
The first circuit substrate 21 has a structure similar to the PCB 10 of
The second circuit substrate 22 has a structure similar to the semi-manufactured substrate 101 of
The third circuit substrate 23 has a structure similar to the second circuit substrate 22. The third circuit substrate 23 includes a fourth electrically conductive layer 231 having a fourth electrically conductive pattern 2310 defined therein and a third composite layer 232 sandwiched between the second and fourth layers 213, 231. The fourth pattern 2310 includes a number of fourth electrical traces 2311 and a number of fourth electrical contacts 2312. In the illustrated embodiment, the number of the fourth contacts 2312 is less than that of the second contacts 2132. Thus, the fourth contacts 2312 correspond to only some of the second contacts 2132. The third composite layer 232 includes a third polymer matrix 2320 and a number of third electrically conductive pins 2321 embedded therein. The number of the third pins 2321 is equal to that of the fourth contacts 2312. Each of the third pins 2321 electrically connects to one fourth contact 2312 and one corresponding second contact 2212.
It is noted that the number of the first or second contacts 2112, 2132 can be less than or equal to the total number of third and fourth contacts 2311 and 2312, therefore, electrical signals from the first circuit substrate 21 can be transmitted to the second or third circuit substrates 22, 23 via the first, second, and third pins 2121, 2221, 2321.
In the illustrated embodiment, the first, second, third, and fourth layers 211, 213, 221, 231 are electrically connected to each other by the first, second, and third pins 2122, 2222, 2322, which have excellent electrical conductivity. Therefore, the PCB 20 has excellent electrical properties.
It is believed that the present embodiments and their advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the disclosure or sacrificing all of its material advantages, the examples hereinbefore described merely being preferred or exemplary embodiments of the disclosure.
Number | Date | Country | Kind |
---|---|---|---|
201010300948.0 | Jan 2010 | CN | national |
This application is related to commonly-assigned co-pending applications application Ser. No. 12/468,841 entitled, “CIRCUIT SUBSTRATE FOR MOUNTING ELECTRONIC COMPONENT AND CIRCUIT SUBSTRATE ASSEMBLY HAVING SAME”, filed on the 19th of May 2009, and application Ser. No. 12/471,396 entitled, “CIRCUIT SUBSTRATE FOR MOUNTING ELECTRONIC COMPONENT AND CIRCUIT SUBSTRATE ASSEMBLY HAVING SAME”, filed on the 24th of May 2009. Disclosures of the above identified applications are incorporated herein by reference.