Chang et al, ULSI Technology, McGraw-Hill, 1996, pp. 260, 510.* |
Bloom, Ilan, “Sharp Reduction of Memory Cell Area”, Nikkei Microdevices LSI Seminar, Tokyo, Dec. 1999. |
U.S. patent application Ser. No. 09/627,567: “Use of an Etch to Reduce the Thickness and Round the Edges of a Resist Mask During the Creation of a Memory Cell”; Inventors: Bharath Rangarajan, Fei Wang, George J. Kluth, and Ursula Q. Quinto; Filed: Jul. 28, 2000; Attorney Docket No. 9076/447. |
U.S. patent application Ser. No. 09/668,051: “Use of an Etch Mask to Remove the Edges of a Resist Mask During the Creation of a Memory Cell”; Inventors: Mark T. Ramsbey, Tuan Pham, Mark Chang; Filed: Sep. 21, 2000; Attorney Docket No. 9076/471. |