Making oxide-nitride-oxide device

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CPC
Y10S438/954

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S438/00Semiconductor device manufacturing: process

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Y10S438/954Making oxide-nitride-oxide device

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Patents Grantslast 30 patents

Information Patent Grant
High performance CMOS transistors using PMD liner stress
- Patent number 8,809,141
- Issue date Aug 19, 2014
- Texas Instruments Incorporated
- Haowen Bu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Methods of forming reverse mode non-volatile memory cell structures
- Patent number 8,802,526
- Issue date Aug 12, 2014
- Micron Technology, Inc.
- Arup Bhattacharyya
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of processing a contact pad, method of manufacturing a conta...
- Patent number 8,669,666
- Issue date Mar 11, 2014
- Infineon Technologies AG
- Markus Hammer
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Self aligned narrow storage elements for advanced memory device
- Patent number 8,476,695
- Issue date Jul 2, 2013
- Spansion LLC
- Suketu Arun Parikh
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Non-volatile two-transistor semiconductor memory cell and method fo...
- Patent number 8,154,090
- Issue date Apr 10, 2012
- Infineon Technologies AG
- Franz Schuler
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Methods of forming non-volatile memory having tunnel insulator of i...
- Patent number 8,129,243
- Issue date Mar 6, 2012
- Micron Technology, Inc.
- Arup Bhattacharyya
- B82 - NANO-TECHNOLOGY
Information Patent Grant
NROM fabrication method
- Patent number 8,106,442
- Issue date Jan 31, 2012
- Spansion Israel Ltd.
- Boaz Eitan
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
NROM fabrication method
- Patent number 8,008,709
- Issue date Aug 30, 2011
- Spansion Israel Ltd.
- Boaz Eitan
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Memory device and fabrication method thereof
- Patent number 7,977,730
- Issue date Jul 12, 2011
- Samsung Electronics Co., Ltd.
- Yoo-cheol Shin
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
NROM fabrication method
- Patent number 7,943,979
- Issue date May 17, 2011
- Spansion Israel, Ltd
- Boaz Eitan
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of manufacturing semiconductor device
- Patent number 7,943,495
- Issue date May 17, 2011
- Dongbu Hitek Co., Ltd.
- Hee-Don Jeong
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
SONOS memory device with optimized shallow trench isolation
- Patent number 7,923,363
- Issue date Apr 12, 2011
- NXP B.V.
- Pierre Goarin
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Bottom-gate sonos-type cell having a silicide gate
- Patent number 7,838,350
- Issue date Nov 23, 2010
- Sandisk 3D LLC
- S. Brad Herner
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of processing a contact pad, method of manufacturing a conta...
- Patent number 7,829,450
- Issue date Nov 9, 2010
- Infineon Technologies AG
- Markus Hammer
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device and method for fabricating the same
- Patent number 7,781,291
- Issue date Aug 24, 2010
- Panasonic Corporation
- Nobuyoshi Takahashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating semiconductor transistor
- Patent number 7,745,349
- Issue date Jun 29, 2010
- Dongbu Hitek Co., Ltd.
- Jeong-Yel Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device with buried control gate and method of f...
- Patent number 7,700,437
- Issue date Apr 20, 2010
- Samsung Electronics Co., Ltd.
- Ki-chul Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned narrow storage elements for advanced memory device
- Patent number 7,682,905
- Issue date Mar 23, 2010
- Spansion LLC
- Suketu Arun Parikh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single-wafer process for fabricating a nonvolatile charge trap memo...
- Patent number 7,670,963
- Issue date Mar 2, 2010
- Cypress Semiconductor Corportion
- Krishnaswamy Ramkumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low power non-volatile memory and gate stack
- Patent number 7,612,403
- Issue date Nov 3, 2009
- Micron Technology, Inc.
- Arup Bhattacharyya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming non-volatile memory device
- Patent number 7,611,948
- Issue date Nov 3, 2009
- Samsung Electronics Co., Ltd.
- Jae-Hwang Sim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing device isolation film of semiconductor device
- Patent number 7,601,609
- Issue date Oct 13, 2009
- Hynix Semiconductor Inc.
- Sang Don Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 7,598,589
- Issue date Oct 6, 2009
- Panasonic Corporation
- Nobuyoshi Takahashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming salicide in semiconductor device
- Patent number 7,537,998
- Issue date May 26, 2009
- Magnachip Semiconductor, Ltd.
- Joon Hyeon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device and fabrication method thereof
- Patent number 7,538,385
- Issue date May 26, 2009
- Samsung Electronics Co., Ltd.
- Yoo-cheol Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile two-transistor semiconductor memory cell and method fo...
- Patent number 7,528,038
- Issue date May 5, 2009
- Infineon Technologies AG
- Franz Schuler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a charge-trapping dielectric and method of...
- Patent number 7,510,935
- Issue date Mar 31, 2009
- Samsung Electronics Co., Ltd.
- Sung-Hae Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for a sidewall SONOS memory device
- Patent number 7,482,236
- Issue date Jan 27, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device and manufacturing method and operating m...
- Patent number 7,452,775
- Issue date Nov 18, 2008
- Powership Semiconductor Corp.
- Wei-Zhe Wong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device with buried control gate and method of f...
- Patent number 7,420,243
- Issue date Sep 2, 2008
- Samsung Electronics Co., Ltd.
- Ki-chul Kim
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF FORMING REVERSE MODE NON-VOLATILE MEMORY CELL STRUCTURES
- Publication number 20120164804
- Publication date Jun 28, 2012
- Micron Technology, Inc.
- Arup Bhattacharyya
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method of Processing a Contact Pad, Method of Manufacturing a Conta...
- Publication number 20110031625
- Publication date Feb 10, 2011
- Markus Hammer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE
- Publication number 20100133605
- Publication date Jun 3, 2010
- SPANSION LLC
- Suketu Arun Parikh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
- Publication number 20090317955
- Publication date Dec 24, 2009
- PANASONIC CORPORATION
- Nobuyoshi TAKAHASHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTUR DEVICE
- Publication number 20090315100
- Publication date Dec 24, 2009
- Hee-Don Jeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SONOS MEMORY DEVICE WITH OPTIMIZED SHALLOW TRENCH ISOLATION
- Publication number 20090212347
- Publication date Aug 27, 2009
- Koninklijke Philips Electronics N.V.
- Pierre Goarin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory device and fabrication method thereof
- Publication number 20090206392
- Publication date Aug 20, 2009
- Yoo-Cheol Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Processing a Contact Pad, Method of Manufacturing a Conta...
- Publication number 20090115074
- Publication date May 7, 2009
- Markus Hammer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING NON-VOLATILE MEMORY HAVING TUNNEL INSULATOR OF I...
- Publication number 20090035904
- Publication date Feb 5, 2009
- Micron Technology, Inc.
- Arup Bhattacharyya
- B82 - NANO-TECHNOLOGY
Information Patent Application
OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE
- Publication number 20090021986
- Publication date Jan 22, 2009
- POWERCHIP SEMICONDUCTOR CORP.
- Wei-Zhe Wong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING SEMICONDUCTOR TRANSISTOR
- Publication number 20080318403
- Publication date Dec 25, 2008
- Jeong-Yel Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Single-wafer process for fabricating a nonvolatile charge trap memo...
- Publication number 20080293254
- Publication date Nov 27, 2008
- Cypress Semiconductor Corporation
- Krishnaswamy Ramkumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY DEVICE WITH BURIED CONTROL GATE AND METHOD OF F...
- Publication number 20080286927
- Publication date Nov 20, 2008
- Samsung Electronics Co., Ltd.
- Ki-chul Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE
- Publication number 20080280410
- Publication date Nov 13, 2008
- SPANSION LLC
- Suketu Arun Parikh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming Method and Forming System for Insulation Film
- Publication number 20080214017
- Publication date Sep 4, 2008
- TOKYO ELECTRON LIMITED
- Shigemi Murakawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile two-transistor semiconductor memory cell and method fo...
- Publication number 20080173926
- Publication date Jul 24, 2008
- Infineon Technologies AG
- Franz Schuler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING NON-VOLATILE MEMORY DEVICE
- Publication number 20080160693
- Publication date Jul 3, 2008
- SAMSUNG ELECTRONICS CO., LTD.
- Jae-Hwang Sim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING DEVICE ISOLATION FILM OF SEMICONDUCTOR DEVICE
- Publication number 20080138958
- Publication date Jun 12, 2008
- Hynix Semiconductor Inc.
- Sang Don LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nrom fabrication method
- Publication number 20080135911
- Publication date Jun 12, 2008
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NROM frabrication method
- Publication number 20080099832
- Publication date May 1, 2008
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOTTOM-GATE SONOS-TYPE CELL HAVING A SILICIDE GATE
- Publication number 20080079063
- Publication date Apr 3, 2008
- SANDISK 3D LLC
- S. Brad HERNER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NROM fabrication method
- Publication number 20080073702
- Publication date Mar 27, 2008
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SALICIDE IN SEMICONDUCTOR DEVICE
- Publication number 20070264811
- Publication date Nov 15, 2007
- Joon Hyeon LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory device and fabrication method thereof
- Publication number 20070252194
- Publication date Nov 1, 2007
- Yoo-Cheol Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for a sidewall SONOS memory device
- Publication number 20070212841
- Publication date Sep 13, 2007
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High performance CMOS transistors using PMD liner stress
- Publication number 20070128806
- Publication date Jun 7, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY DEVICE AND MANUFACTURING METHOD AND OPERATING M...
- Publication number 20070085124
- Publication date Apr 19, 2007
- Wei-Zhe Wong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming method and forming system for insulation film
- Publication number 20070085154
- Publication date Apr 19, 2007
- TOKYO ELECTRON LIMITED
- Shigemi Murakawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flash memory structure and method for fabricating the same
- Publication number 20070075353
- Publication date Apr 5, 2007
- ProMOS Technologies Inc.
- Jason Chen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF MANUFACTURING A CHARGE-TRAPPING DIELECTRIC AND METHOD OF...
- Publication number 20070048957
- Publication date Mar 1, 2007
- Samsung Electronics Co., Ltd.
- Sung-Hae LEE
- H01 - BASIC ELECTRIC ELEMENTS

Making oxide-nitride-oxide device

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

High performance CMOS transistors using PMD liner stress

Methods of forming reverse mode non-volatile memory cell structures

Method of processing a contact pad, method of manufacturing a conta...

Self aligned narrow storage elements for advanced memory device

Non-volatile two-transistor semiconductor memory cell and method fo...

Methods of forming non-volatile memory having tunnel insulator of i...

NROM fabrication method

NROM fabrication method

Memory device and fabrication method thereof

NROM fabrication method

Method of manufacturing semiconductor device

SONOS memory device with optimized shallow trench isolation

Bottom-gate sonos-type cell having a silicide gate

Method of processing a contact pad, method of manufacturing a conta...

Semiconductor device and method for fabricating the same

Method for fabricating semiconductor transistor

Non-volatile memory device with buried control gate and method of f...

Self aligned narrow storage elements for advanced memory device

Single-wafer process for fabricating a nonvolatile charge trap memo...

Low power non-volatile memory and gate stack

Methods of forming non-volatile memory device

Method for manufacturing device isolation film of semiconductor device

Semiconductor device

Method for forming salicide in semiconductor device

Memory device and fabrication method thereof

Non-volatile two-transistor semiconductor memory cell and method fo...

Method of manufacturing a charge-trapping dielectric and method of...

Structure and method for a sidewall SONOS memory device

Non-volatile memory device and manufacturing method and operating m...

Non-volatile memory device with buried control gate and method of f...

Patents Applicationslast 30 patents

METHODS OF FORMING REVERSE MODE NON-VOLATILE MEMORY CELL STRUCTURES

Method of Processing a Contact Pad, Method of Manufacturing a Conta...

SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

METHOD OF MANUFACTURING SEMICONDUCTUR DEVICE

SONOS MEMORY DEVICE WITH OPTIMIZED SHALLOW TRENCH ISOLATION

Memory device and fabrication method thereof

Method of Processing a Contact Pad, Method of Manufacturing a Conta...

METHODS OF FORMING NON-VOLATILE MEMORY HAVING TUNNEL INSULATOR OF I...

OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE

METHOD FOR FABRICATING SEMICONDUCTOR TRANSISTOR

Single-wafer process for fabricating a nonvolatile charge trap memo...

NON-VOLATILE MEMORY DEVICE WITH BURIED CONTROL GATE AND METHOD OF F...

SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE

Forming Method and Forming System for Insulation Film

Non-volatile two-transistor semiconductor memory cell and method fo...

METHODS OF FORMING NON-VOLATILE MEMORY DEVICE

METHOD FOR MANUFACTURING DEVICE ISOLATION FILM OF SEMICONDUCTOR DEVICE

Nrom fabrication method

NROM frabrication method

BOTTOM-GATE SONOS-TYPE CELL HAVING A SILICIDE GATE

NROM fabrication method

METHOD FOR FORMING SALICIDE IN SEMICONDUCTOR DEVICE

Memory device and fabrication method thereof

Structure and method for a sidewall SONOS memory device

High performance CMOS transistors using PMD liner stress

NON-VOLATILE MEMORY DEVICE AND MANUFACTURING METHOD AND OPERATING M...

Forming method and forming system for insulation film

Flash memory structure and method for fabricating the same

METHOD OF MANUFACTURING A CHARGE-TRAPPING DIELECTRIC AND METHOD OF...