Claims
- 1. A process of fabricating a semiconductor chip carrier assembly comprising the steps of:introducing a flexible substrate into a vacuum fixture, said vacuum fixture having openings to accommodate electrically conductive protrusions on a the bottom surface of said flexible substrate; applying a vacuum to hold said flexible substrate flat on said fixture; placing an adhesive composition, said adhesive composition comprising a microporous film substrate and a curable adhesive, wherein said microporous film is ladened with said curable adhesive, over said flexible substrate; disposing a stiffener over said adhesive composition and placing a compression plate thereover; and curing said curable adhesive by subjecting said adhesive composition to a temperature in a range of between about 135° C. and about 190° C. and a pressure in a range of between about 5 minutes and about 1 hour.
- 2. A process in accordance with claim 1 wherein said curing step occurs at a temperature in a range of between about 140° C. and about 160° C. and a pressure in a range of between about 20 psi and about 200 psi for a period of between about 20 minutes and about 45 minutes.
- 3. A process in accordance with claim 1 including a step of post baking the assembly at the temperature at which curing occurred in the event that curing occurred over a period of less than about 15 minutes.
REFERENCE TO RELATED APPLICATION
This is a division of U.S. patent application, Ser. No. 08/844,865, filed Apr. 22, 1997 now Pat. No. 5,973,389.
US Referenced Citations (4)
Foreign Referenced Citations (3)
Number |
Date |
Country |
08-306818 |
Nov 1996 |
JP |
09-036275 |
Feb 1997 |
JP |
09-064111 |
Mar 1997 |
JP |