Claims
- 1. A metal evaporation method of producing vias within a semiconductor substrate, said vias operable to facilitate the transmission of electrical signals from the bottom surface of said semiconductor substrate to the top surface of said semiconductor substrate, said method comprising:
- thinning of a wafer of semiconductor material, said wafer having a top and a bottom surface to a thickness of approximately 100 microns;
- mounting of said thinned wafer of semiconductor material face down upon a wafer holder such that said top surface of said wafer is mounted upon said wafer holder using an adhesive means;
- application of a first layer of photoresist material upon said bottom surface of said wafer;
- patterning of said first layer of photoresist, said patterning operable to define the holes through said semiconductor substrate for said vias to be etched;
- formation of said vias within said semiconductor substrate utilizing an etching technique;
- selective removal of said first layer of photoresist material from said bottom surface of said wafer;
- sputtering of metal over said bottom surface of said semiconductor wafer, thereby forming a metallization layer upon said bottom surface of said semiconductor wafer;
- application of a second layer of photoresist material upon said metallization layer upon said bottom surface of said semiconductor wafer, said second layer of photoresist selectively patterned about said vias;
- application of a thin layer of a highly conductive metal upon the surface of said second layer of photoresist;
- selective removal of said second layer of photoresist material such that said sputtered metal layer is selectively exposed;
- light etching of said semiconductor wafer to insure its insulating properties and to clean said bottom surface;
- demounting of said wafer from said wafer holder means;
- removal of said adhesive means from said top surface of said wafer;
- application of a heat sink means, said heat sink means comprising semi-insulating material having good thermal conductive properties and an expansion coefficient closely matched to said wafer, said heat sink means applied to said bottom side of said wafer;
- placement of a metal shadow mask upon said wafer such that an orifice in said mask is placed directly over said via; and
- evaporation of metal into the orifice in said metal shadow mask and said via, said evaporation of metal operable to form solid electrical connections through said semiconductor substrate, said solid electrical connections operable to interconnect said top and said bottom surfaces, electrically.
Parent Case Info
This is a division of application Ser. No. 07/013,490 filed February 11, 1987, now Pat. No. 4823136.
US Referenced Citations (4)
Divisions (1)
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Number |
Date |
Country |
Parent |
13490 |
Feb 1987 |
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