Claims
- 1. An apparatus for in-circuit programming of an integrated circuit comprising:a processor on the integrated circuit which executes instructions; an external port on the integrated circuit through which data is received from an external source; a first memory array comprising reprogrammable non-volatile memory cells on the integrated circuit, which stores instructions for execution by the processor, including a set of instructions for controlling transfer of an in-circuit programming set of instructions into the integrated circuit from the external source through the external port; and a second memory array on the integrated circuit, and wherein the in-circuit programming set of instructions includes logic to: write a copy of the original in-circuit programming set from the first memory array to the second memory array to create a mirrored in-circuit programming set; control a code multiplexer to switch the processor control from the original in-circuit programming set to the mirrored in-circuit programming set in the second memory array; and update the in-circuit programming set in the first memory array under the control of the mirrored in-circuit programming set in the second memory array.
- 2. The apparatus of claim 1, wherein the non-volatile memory cells in the first memory array comprise floating gate memory cells.
- 3. The apparatus of claim 1, wherein the external port comprises a parallel port.
- 4. The apparatus of claim 1, wherein the external port comprises a parallel port.
- 5. An apparatus for in-circuit programming of an integrated circuit comprising:a processor on the integrated circuit which executes instructions; an external port on the integrated circuit through which data is received from an external source; a first memory array comprising reprogrammable non-volatile memory cells on the integrated circuit, which stores instructions for execution by the processor, including a set of instructions for controlling the transfer of an in-circuit programming set of instructions into the integrated circuit from the external source through the external port; and a plurality of ports to external set data sources, and wherein the port in the plurality of ports used for the external port during execution of the in-circuit programming set is determined by the instructions in the in-circuit programming set.
- 6. An apparatus for in-circuit programming of an integrated circuit comprising:a processor on the integrated circuit which executes instruction; a first memory array comprising reprogrammable non-volatile memory cells on the integrated circuit, which stores instructions for execution by the processor, including a set of instructions for controlling the transfer of an in-circuit programming set of instructions into the integrated circuit from the external source through the external port; and a plurality of ports to external data sources, and wherein an in-circuit program update command is received at one of the plurality of ports, and the one of the plurality of ports is determined by an instruction or instructions in the in-circuit programming set.
Parent Case Info
This application is a continuation of U.S. patent application Ser. No. 08/952,045, filed Oct. 3, 1997, now U.S. Pat. No. 6,151,657 which is a 371 of PCT/US96/17302 filed Oct. 28, 1996.
US Referenced Citations (29)
Non-Patent Literature Citations (3)
Entry |
Excerpts from 3048 Hardware Manual, dated 1995 consisting of pp. 577-582. |
Hitachi Single-Chip Microcomputer H8/3048 Series Hardware Manual, Jan. 1995, pp. 1, 423-424, 535, 552-553, 565-566, 571 and 604. |
“MC68HC11 EEPROM Programming from a Personal Computer” AN1010, 1988 Motorola, pp.1-12. |
Continuations (1)
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08/952045 |
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09/525835 |
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US |