Programmable chip design for radio frequency signal generation and method therefor

Abstract

A radio frequency identification (RFID) method, reader and circuit for generating RFID command signals. The reader and circuit include at least one command register, the at least one command register storing at least one command bit, the at least one command register storing at least one command bit, the at least one command bit corresponding to a portion of a command to be transmitted to at least one remote communication device, at least one table, the at least one table storing wave-shaping transition values for shaping the at least one command bit prior to transmission, and at least one control register, the at least one control register storing at least one configuration value.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of the present invention, and the attendant advantages and features thereof, will be more readily understood by reference to the following detailed description when considered in conjunction with the accompanying drawings, wherein like designations refer to like elements, and wherein:

FIG. 1 is a block diagram of a communication system constructed in accordance with the principles of the present invention;

FIG. 2 is a block diagram of various aspects of the communication system of FIG. 1 constructed in accordance with the principles of the present invention;

FIG. 3 is a block diagram of the controller module and the RF module of an RFID system constructed in accordance with the principles of the present invention;

FIG. 4 is a block diagram of a distributed wave-shaping function of a digital signal processing of an RFID system according to one embodiment of the present invention; and

FIG. 5 is a block diagram of a signal generation programmable logic device with wave-shaping functionality in accordance with the principles of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Referring now to the drawing figures in which like reference designators refer to like elements, there is shown in FIG. 1 a diagram of an exemplary communication system constructed in accordance with the principles of the present invention and designated generally as “10”. Communication system 10 provides an electronic identification system in the embodiment described herein. Further, the described communication system 10 is configured for backscatter communications as described in detail below. Other communication protocols can be utilized in other embodiments.

The depicted communication system 10 includes at least one electronic wireless remote communication device 16 and a reader 12. Radio frequency (“RF”) communications can occur between remote communication devices 16 and reader 12 for use in identification systems and product monitoring systems as exemplary applications.

Devices 16 include radio frequency identification (“RFID”) devices in the embodiments described herein. Multiple wireless remote communication devices 16 typically communicate with reader 12 although only one such device 16 is illustrated in FIG. 1.

Although multiple communication devices 16 can be employed in communication system 10, there is typically no communication between multiple devices 16 themselves. Instead, the multiple communication devices 16 communicate with reader 12. Multiple communication devices 16 can be used in the same field of reader 12, i.e., within the communication range of reader 12. Similarly, multiple readers 12 can be in proximity to one or more of devices 16.

Remote communication device 16 is configured to interface with reader 12 using a wireless medium in one embodiment. More specifically, communication between communication device 16 and reader 12 occur via an electromagnetic link, such as an RF link, e.g., at microwave frequencies in the described embodiment. Reader 12 is configured to output forward link wireless communication signals 15. Further, reader 12 is operable to receive return link wireless communication signals 17, e.g., a reply signal, from devices 16 responsive to the forward link communication signals 15. In accordance with the above, forward link communication signals and return link communication signals are wireless signals, such as radio frequency signals. Other forms of electromagnetic communication signals, such as infrared, acoustic, and the like are contemplated.

Reader unit 12 includes at least one antenna 14 as well as transmitting and receiving circuitry, similar to that implemented in devices 16. Antenna 14 comprises a transmit/receive antenna connected to reader 12. In an alternative embodiment, reader 12 can have separate transmit and receive antennas.

In operation, reader 12 transmits a forward link communication signal 15, e.g., an interrogation command signal, via antenna 14. Communication device 16 is operable to receive the incoming forward link signal 15. Upon receiving signal 15, communication device 16 responds by communicating the responsive return link communication signal 17, e.g., a responsive reply signal. Communications within system 10 are described in greater detail below.

In one embodiment, responsive return link communication signal 17, e.g., a responsive reply signal, is encoded with information that uniquely identifies or labels the particular device 16 that is transmitting so as to identify any object, animal, or person with which communication device 16 is associated. Communication devices 16 can be RFID tags that are attached to objects or people where each tag is programmed with information relating to the object or person to which it is attached. The information can take a wide variety of forms and can be more or less detailed depending on the needs to be served by the information. For example, the information may include merchandise identification information, such as a universal product code. A tag may include identifying information and security clearance information for an authorized person to whom the tag has been issued. A tag may also have a unique serial number, in order to uniquely identify an associated object or person. Alternatively, a tag may include more detailed information relating to an object or person, such as a complete description of the object or person. As a further exemplary alternative, a tag may store a single bit, in order to provide for theft control or simple tracking of entry and departure through the detection of an object or person at a particular reader, without necessarily specifically identifying the object or person.

More specifically, remote device 16 is configured to output an identification signal within reply link communication 17 responsive to receiving forward link wireless communication 15. Reader 12 is configured to receive and recognize the identification signal within the reply link communication signal 17, e.g., return signal. The identification signal can be utilized to identify the particular transmitting communication device 16.

An exemplary embodiment of a reader 12 is explained with reference to FIG. 2. In this embodiment, the reader 12 has a RF module 100 and a controller module 102. The RF module 100 includes a radio signal source 104 for synthesizing radio frequency signals, e.g., an interrogating RF signal, that outputs a RF signal to transceiver 106 of the reader 12. The interrogating RF signal from the source 104 uses a suitable frequency such as 915 MHz. When the radio signal source 104 is energized, transceiver 106 transmits the interrogating RF signal (typically after the RF signal has been modulated with an information signal) through antenna 14 to a suitable antenna 18 such as a dipole antenna at a communication device 16.

Modulated signals are received from communication device 16 via antenna 14 and passed to transceiver 106. Controller module 102 of reader 12 receives the digital equivalent of the modulated signal. In one embodiment, controller module 102 produces signals in a sequence having a pattern identifying the pattern of the 1's and 0's in read only memory (“ROM”) 122 of communication device 16. For example, the received and processed sequence may be compared in reader 12 with a desired sequence to determine whether the object being identified is being sought by the reader 12 or not.

Continuing to refer to FIG. 2, one embodiment of remote communication device 16 is explained. The depicted communication device 16 includes a modulator 120 having a receiver/transmitter as described below and a data source such as ROM 122, which provides a sequence of binary 1's and binary 0's in an individual pattern to identify the object. In this embodiment, a binary “1” in ROM 122 causes a modulator 120 to produce a first plurality of signal cycles and a binary “0” in the read only memory 122 causes the modulator 120 to produce a second plurality of signal cycles different from the first plurality of signals. The pluralities of signals cycles are sequentially produced by the modulator 120 to represent the pattern of binary 1's and binary 0's which identify the object are introduced to the dipole antenna 18 for transmission to antenna 14 at reader 12. In another embodiment, the communication device 16 can have separate receive and transmit antennas.

Communication device 16 may further include an optional power source (not shown) connected to modulator 120 to supply operational power to modulator 120.

The exemplary embodiment of reader 12 in FIG. 2 is described in more detail with reference to FIG. 3. As shown in FIG. 3, the reader unit 12 includes a controller module 102 and a RF module 100. RF module 100 includes a signal-transmitting antenna 14A, a signal-receiving antenna 14B, a first radio frequency (“RF”) interface 207, a second RF interface 209, a power amplifier 210, a modulator 212, a first band pass filter 214, a digital-to-analog converter (“DAC”) 216, a switching regulator 218, an erasable programmable read-only memory (“EPROM”) 220, a static random access memory (“SRAM”) 222, a synthesizer 224, a demodulator 226, second and third band pass filters 228, analog-to-digital converters (“ADC”) 230, a digital signal processor (“DSP”) 232, a logic device (“LD”) 234 and a communication port 236. The synthesizer 224 transmits a reference signal to the modulator 212 and demodulator 226 that can be used to synchronize, filter and/or adjust the received communication signals with the transmitted communication signals.

The modulator 212 receives the reference signal from the synthesizer 224 and inquiry data from the DSP 232. Prior to any modulation, DAC 216 converts the inquiry data from the DSP 232 via LD 234 from a digital signal into an analog signal and provides the converted analog signal to the band pass filter 214, which can restrict a frequency-band of the converted analog signal to a predetermined frequency. The modulator 212 modulates the reference signal in accordance with the inquiry data, and outputs this modulated signal to the power amplifier 210.

The power amplifier 210 amplifies the modulated signal received from the modulator 212, and outputs this amplified signal to the first RF interface 207. Subsequently, the signal-transmitting antenna 14A radiates the signal into air as radio-signals.

Continuing to refer to FIG. 3, the controller module 102 includes a communication port 250, the communication port 250 interfaces with communication port 236 of RF module 100, a SRAM 252, a flash memory 254, a controller processor 256, a universal serial bus (“USB”) 258, a memory expansion module 260 and a communications block 262.

Controller processor 256 can be any of various commercially available central processing units, and it provides the communication and signal processing of controller module 102, including the communications with one or more RF modules 100 via the communication port 250. Controller processor 256 employs SRAM 252 and flash memory 254 for typical storage of communication data and the like, as well as providing resources for the operating system (“OS”), e.g., Linux/CE, of the controller module 102. Communications block 262 provides a communication link to the network, for example a wireless link or Ethernet link as is known in the art.

The controller module 102 provides application processing for the RFID system as well as network communication control and signal routing. In addition, the controller module 102 provides the processing required by a customer to satisfy that customer's business rules and contains or maintains a single point of contact to the customer's network. This advantageously minimizes the number of RFID network connections required in the customer location and the amount of data traffic on a customer's network. The controller module 102 provides for flexible deployment as it may be mounted in most locations based on individual customer use cases. Each RF module 100 may connect to a single antenna or multiple antennas using optional multiplexing capability.

In order to improve the performance of the RF module 100, the functions of DSP 232 can be distributed. In order to improve performance of an RFID reader 12, the RF module 100 should perform at least the functions of signal protocol handling, signal filtering and signal wave-shaping. By using a logic device 234 to perform the signal wave-shaping function of the RF module 100, the wave-shaping that may have constrained the DSP 232 processing bandwidth is made available to perform other RF module 100 functions such as the signal protocol handling and the signal filtering. This signal generation chip 234, such as an application specific integrated circuit (“ASIC”) or a programmable logic device (“PLD”), e.g., a field programmable gate array (“FPGA”), e.g., FPGA, contains wave tables and registers that are used to generate command signals for transmission to RFID tags in a RFID system.

FIG. 4 illustrates the command signal processing of DSP 232 in RFID reader 12. Data received from one or more RFID tags is processed by DSP 232 and a command signal is passed by DSP 232 to the logic device 234. The command signal can be comprised of up to 160 bits and is written into a series of command registers in logic device 234. Signal generation logic device 234 includes additional tables 274 and registers 276 which contain the shape data values and control configuration bit values and characteristics for each command bit of the command signal. Signal generation logic device 234 passes each command bit with its corresponding wave-shaping transition values and configuration values to the DAC 216. DAC 216 converts the digital command into an analog voltage, command bit by command bit, which effectively comprise an analog signal. Without the signal generation logic device 234 providing the wave-shaping information to the DAC 216, this analog signal is initially a square wave signal having sharp transitions between high and low states. These sharp transitions can cause elevated emissions which exceed the regulatory emission limits and standards as the sharp transitions of a square wave can theoretically produce an infinite number of harmonic frequencies. These problematic emissions are minimized by wave-shaping the DAC 216 output signal to “round out” or smooth the waveform thereby reducing or eliminating the extraneous harmonic frequencies. The signal generation logic device 234 controls or shapes the DAC 216 output by providing DAC 216 with the corresponding wave-shaping transition values and configuration values for the transmission signal. In this matter, the number of iterations or steps for transitioning from a high state to a low state or from a low state to a high state is controlled to provide a gradual and smooth transition.

The exemplary embodiment of signal generation logic device 234 of FIG. 3 with wave-shaping functionality is described in more detail with reference to FIG. 5. With reference to FIG. 5, the following registers contain the data bits that are to be transmitted along with parameters that define the shape and duration of each bit, these parameters determine how a command bit is constructed or shaped before being transmitted via an antenna to a population of RFID tags.

Tag Command 502: the DSP 232 sends tag commands via a parallel bus to the LD 234. The tag command can be comprised of up to 160 bits and is written into Tag command registers 1 through 10 of the LD 234.

Tx-Bits Counter 504: this register tells the LD 234 how many bits in the Tag Command registers 1 to 10 are valid and hence how many bits the LD 234 should transmit as different tag commands are comprised of different numbers of bits.

Pulse width low period 506: this register contains the amount of time or duration value that a bit 1 or 0 is at a low state; this time is the same for a 1 or 0 bit.

Data 1 Pulse width high period 508: this register contains the amount of time or duration value that a high bit (a “1”) remains in a high state before transitioning to a low state.

Data 0 Pulse width high period 510: this register contains the amount of time or duration value that a bit 0 remains at a high state before transitioning to low state.

Number of Steps 512: each bit whether it is a 1 or 0 consists of a high state and a low state of certain duration, this register contains the number of steps to be made during transitions from high-to-low and from low-to-high states. By taking multiple steps during a transition it shapes the waveform that makes up a transmitted bit for the purpose of conserving spectrum bandwidth.

MUX Board Configuration 514: This register contains data that commands an optional multiplexer printed circuit board (“PCB”) to connect to which external antenna. A multiplexer PCB can connect to one or more external antennas for the purpose of reading and writing to tag populations that come within the read zone of those antennas. This register instructs the MUX PCB as to which antenna(s) to connect to at any given time.

The block RAM is composed of two tables, with each table containing values that are transmitted during low to high and high to low transitions that occur within every command bit. For every bit to be transmitted to a population of tags, these tables are used by the LD 234 to generate or synthesize a shaped waveform for each bit so that these waveforms are spectrally efficient.

Low to High Txmit Table 516: This block RAM contains the transition values that the LD 234 sends to the DAC 216, to generate a smooth spectrally efficient low to high transition. The number of transition values written out to the DAC 216 is contained in the Number of steps register as described above.

High to Low Txmit Table 518: This block RAM contains the transition values that the LD 234 sends to the DAC 216, to generate a smooth spectrally efficient high to low transition. The number of transition values written to the DAC 216 is contained in the number of steps register as described above.

RF Base band transmission control read 520. This part of the LD 234 runs the state machine that transmits the tag command bits contained in the Tag command registers 1 to 10. The RF Base band transmission control read 520 sets up counters to transmit one bit at a time and takes the data values contained in the pulse width register and the number of steps register along with the transition values in block RAM (i.e., the tables) of the LD 234 to write to a DAC 216, which ultimately can construct a smooth bit waveform for transmission to a population of tags. The RF Base band transmission control read 520 repeats this process until all the command bits are sent to the population of RFID tags. Accordingly, the command registers store the command bits, while the control registers store various bit configuration values such as the duration or length of time that a bit 1 or 0 is at a low state. A duty cycle value can also be used to assist in shaping the output signal of DAC 216. The duty cycle is typically defined as the ratio of the time that a bit is in a high state to the time that the bit is in a low state.

Although the wave-shaping function of the LD 234 was discussed with respect to the RF module 100 of FIG. 3, it is in no way limited to such a module, but instead may be deployed in any module, device, subsystem or system were the offloading of the wave-shaping function from a digital signal processor DSP would be advantageous. The DSP/LD may be a standalone module and may be implemented in distributed and non-distributed systems.

The present invention provides a system for enhancing digital signal processor performance by distributing various functions of the digital signal processor to an apparatus such as a logic device (“LD”), e.g., a programmable logic device (“PLD”) or an application-specific integrated circuit (“ASIC”). Consequently, the present invention allows for multitasking by the digital signal processor as the digital signal processor can instruct the PLD and then process its buffer, while the PLD is wave-shaping the command signal for transmission. In addition, the use of the PLD provides for easy upgrade to a RFID reader in the field by simply replacing the PLD with a reprogrammed or newly programmed PLD.

The present invention can be realized in hardware, software, or a combination of hardware and software. An implementation of the method and system of the present invention can be realized in a centralized fashion in one computer system or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system, or other apparatus adapted for carrying out the methods described herein, is suited to perform the functions described herein.

It will be appreciated by persons skilled in the art that the present invention is not limited to what has been particularly shown and described herein above. In addition, unless mention was made above to the contrary, it should be noted that all of the accompanying drawings are not to scale. A variety of modifications and variations are possible in light of the above teachings without departing from the scope and spirit of the invention, which is limited only by the following claims.

Claims

1. A radio frequency identification (RFID) circuit for generating RFID command signals, the circuit comprising: at least one command register, the at least one command register storing at least one command bit, the at least one command bit corresponding to a portion of a command to be transmitted to at least one remote communication device;at least one table, the at least one table storing wave-shaping transition values for shaping the at least one command bit; andat least one control register, the at least one control register storing at least one configuration value for shaping the at least one command bit.

2. The device of claim 1, wherein the circuit is a programmable logic device.

3. The device of claim 2, wherein the programmable logic device is a field programmable gate array.

4. The device of claim 1, wherein the at least one configuration value is a time duration value, time duration value specifying the amount of time that a bit 0 remains at a high state before transitioning to a low state.

5. The device of claim 1, wherein the at least one configuration value is a duty cycle value specifying the ratio of the time that a bit is in a high state to the time that the bit is in a low state.

6. The device of claim 1, wherein the at least one configuration value is a number of transition steps value.

7. The device of claim 1, wherein the at least one configuration value is a pulse width high period value.

8. The device of claim 1, wherein the at least one configuration value is a pulse width low period value.

9. A method for using an RFID reader to generate command signals for transmission to at least one remote communication device, the method comprising: storing at least one wave-shaping transition value, the at least one wave-shaping transition value used to shape at least one command bit of the command signal for transmission of the at least one command bit to the at least one remote communication device; andstoring at least one configuration value, the at least one configuration value defining timing characteristics of the at least one command bit of the command signal for transmission of the at least one command bit to the at least one remote communication device.

10. The method of claim 9, wherein the at least one configuration value is a time duration value, time duration value specifying the amount of time that a bit 0 remains at a high state before transitioning to a low state.

11. The method of claim 9, wherein the at least one configuration value is a duty cycle value specifying the ratio of the time that a bit is in a high state to the time that the bit is in a low state.

12. The method of claim 9, wherein the at least one configuration value is a number of transition steps value.

13. The method of claim 9, wherein the at least one configuration value is a pulse width high period value.

14. The method of claim 9, wherein the at least one configuration value is a pulse width low period value.

15. The method of claim 9, wherein the at least one configuration value is a pulse width high period value.

16. A radio frequency identification (RFID) reader for use in an RFID system, the reader comprising: a radio frequency (RF) module, the radio frequency module including an RF source for synthesizing RF signals, and a transceiver for transmitting RF signals to at least one remote communication device and receiving RF signals from the at least one remote communication device; anda controller, the controller including a digital signal processor and a signal generation circuit, the circuit including: at least one command register, the at least one command register storing at least one command bit, the at least one command bit corresponding to a portion of a command, the command for transmission to at least one remote communication device;at least one table, the at least one table storing wave-shaping transition values for shaping the at least one command bit; andat least one control register, the at least one control register storing at least one configuration value for shaping the at least one command bit.

17. The reader of claim 16, wherein the at least one configuration value is a time duration value, time duration value specifying the amount of time that a bit 0 remains at a high state before transitioning to a low state.

18. The reader of claim 16, wherein the at least one configuration value is a duty cycle value specifying the ratio of the time that a bit is in a high state to the time that the bit is in a low state.

19. The reader of claim 16, wherein the at least one configuration value is a number of transition steps value, the number of transition steps value identifying the number of steps to be made by a digital-to-analog converter during a transition from a first state to a second state.

20. The reader of claim 16, wherein the at least one configuration value is a pulse width high period value.