Programmable crossbar signal processor with rectification layer

Abstract

A device includes a rectifying layer having a first side and a second side, a first array of wires formed above the first side of the rectifying layer, and a second array of wires formed below the second side of the rectifying layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a basic circuit configuration for one embodiment of the crossbar signal processing unit of the present invention.

FIG. 2 illustrates an example of an input selector circuit.

FIG. 3 illustrates an example of an output selector circuit.

FIG. 4 a and FIG. 4b illustrate an example of a programming input and output circuit.

FIG. 5 illustrates data from a particular block of a data register.

FIG. 6 illustrates programming waveforms used to program a crossbar array.

FIGS. 7 a-7c illustrates basic circuit configurations for input circuits.

FIG. 7 d illustrates a basic circuit configuration for an output circuit.

FIG. 8 a illustrates a schematic circuit for a 3×3 crossbar array.

FIG. 8 b illustrates a schematic circuit for a 3×3 crossbar array lacking a rectification layer.

FIGS. 8 c illustrates a schematic circuit for a 3×3 crossbar array including a rectification layer.

FIG. 8 d illustrates a cross-section of a crossbar array including a rectification layer.

FIG. 9 illustrates the complete behavior of the crossbar array in combination with the input and output circuits.

FIGS. 10 a and 10b illustrate waveforms obtainable when the crossbar processor is used as a waveform generator.

FIG. 11 a illustrates a first circuit configuration for a reprogrammable crossbar signal processing unit.

FIG. 11 b illustrates a cross-section of the reprogrammable crossbar array of FIG. 11a.

FIG. 12 a illustrates a second circuit configuration for a reprogrammable crossbar signal processing unit.

FIG. 12 b illustrates a cross-section of the reprogrammable crossbar array of FIG. 12a.

FIGS. 13 a and 13b illustrates current flows generated by input voltages applied to a reprogrammable crossbar array.

FIG. 13 c illustrates a schematic representation of a circuit formed by the reprogrammable crossbar processor.

FIGS. 14-16 illustrates modulation waveforms produced using the crossbar array processor.

FIGS. 17 and 18 illustrates implementations of the reprogrammable crossbar processor of FIGS. 11a and 11b in signal modulation.

FIG. 19 illustrates an implementation of the reprogrammable crossbar processor of FIGS. 12a and 12b in signal modulation.

FIG. 20 illustrates inputting of bit data block Aij and generation of corresponding bit data blocks !Aij, Aji, and !Aji.

FIG. 21 illustrates inputting of bit data block Bij and generation of corresponding bit data blocks !Bij, Bji, and !Bji.

FIGS. 22 a-22e illustrate comparison between the bit data blocks Aij, !Aij, Aji, !Aji and bit data blocks Bij, !Bij, Bji, !Bji using a crossbar processor.

FIGS. 23 a-23e illustrate a technique of pattern tracking using a crossbar processor.

FIGS. 24 illustrates a technique of pattern matching using a crossbar processor.

FIGS. 25 a-25b illustrate using scanning probe tips connected to independently movable cantilevers in addressing crossbar intersection points within a crossbar array.

FIGS. 26 a-26b illustrate using scanning probe tips connected to a common support in addressing crossbar intersection points within a crossbar array.

FIGS. 27 a-27b illustrate a modification of the crossbar array structure.

Claims

1. A device comprising: a rectifying layer having a first side and a second side;a first array of wires formed above the first side of the rectifying layer; anda second array of wires formed below the second side of the rectifying layer.

2. The device of claim 1 further comprising a programmable material layer between the first array of wires and the second array of wires.

3. The device of claim 2 wherein the array of input wires is formed perpendicularly to the array of output wires.

4. The device of claim 2 wherein the array of input wires is formed in parallel to the array of output wires.

5. The device of claim 2 wherein the rectifying layer is a PN junction.

6. The device of claim 2 wherein the programmable material layer is formed from a conductive polymer.

7. The device of claim 2 wherein the programmable material layer is formed from an organic semiconductor.

8. The device of claim 2 wherein the programmable material layer is formed from a perovskite material.

9. The device of claim 2 wherein the programmable material layer is formed from a silver-selenide/chalcogenide laminate film.

10. The device of claim 2 wherein the programmable material layer is formed from rotaxane material.

11. The device of claim 2 wherein each of the wires in the first and second array of wires have a cross-sectional area greater than 1 square micron.

12. The device of claim 2 wherein each of the wires in the first and second array of wires have a cross-sectional area less than 1 square micron.

13. A device comprising: a first crossbar section including a rectifying layer having a first side and a second side, a first array of wires formed above the first side of the rectifying layer, and a second array of wires formed below a second side of the rectifying layer;a second crossbar section including a symmetrical structure to the first crossbar section; anda programmable material layer between the first crossbar section and the second crossbar section.

14. The device of claim 2 wherein the programmable material layer is formed from a conductive polymer.

15. The device of claim 2 wherein the programmable material layer is formed from an organic semiconductor.

16. The device of claim 2 wherein the programmable material layer is formed from a perovskite material.

17. The device of claim 2 wherein the programmable material layer is formed from a silver-selenide/chalcogenide laminate film.

18. The device of claim 2 wherein the programmable material layer is formed from rotaxane material.

19. The device of claim 2 wherein each of the wires in the first and second array of wires have a cross-sectional area greater than 1 square micron.

20. The device of claim 2 wherein each of the wires in the first and second array of wires have a cross-sectional area less than 1 square micron.