Claims
- 1. A method used for testing integrated circuits having logic circuits LBIST (Logic Built-In Self Test) circuits and controls that are used to exercise the LBIST circuits for testing the logic circuits, comprising steps for LBIST testing including a step of
generating LBIST control parameters from an LFSR (Linear Feedback Shift Register) within the LBIST controls such that they will vary throughout the LBIST test and be pseudo-random and predictable.
- 2. The method of claim 1 wherein further during testing integrated circuit system's clock sequence is varied by the LFSR output on each LBIST pattern within the LBIST test.
- 3. The method of claim 1 wherein further during testing the LFSR output on each LBIST pattern within said LBIST test varies the scan sequence skewed load/unload setting during said LBIST testing.
- 4. The method of claim 1 wherein further during testing the LFSR output on each LBIST pattern within the LBIST test varies PRPG (Pseudo Random Patter Generator) weighting.
- 5. The method of claim 1 wherein further during testing the LFSR output on each LBIST pattern within the LBIST test varies PRPG (Pseudo Random Patter Generator) weight selection.
- 6. The method of claim 1 wherein further during testing the LFSR output on each LBIST pattern within the LBIST test varies PRPG (Pseudo Random Patter Generator) weight selection as the PRPG clock is gated by the LFSR output on each A/B clock cycle within the LBIST test.
- 7. A method used for testing integrated circuits having logic circuits LBIST (Logic Built-In Self Test) circuits and controls that are used to exercise the LBIST circuits for testing the logic circuits, comprising steps for LBIST testing including a step of
generating LBIST control parameters from a weighted output of an LFSR (Linear Feedback Shift Register) within the LBIST controls such that they will vary throughout the LBIST test and be pseudo-random and predictable.
- 8. The method of claim 7 wherein further during testing integrated circuit system's clock sequence is varied by the LFSR output on each LBIST pattern within the LBIST test.
- 9. The method of claim 8 wherein further during testing the LFSR output on each LBIST pattern within said LBIST test varies the scan sequence skewed load/unload setting during said LBIST testing.
- 10. The method of claim 9 wherein further during testing the LFSR output on each LBIST pattern within the LBIST test varies PRPG (Pseudo Random Patter Generator) weighting.
- 11. The method of claim 10 wherein further during testing the LFSR output on each LBIST pattern within the LBIST test varies PRPG (Pseudo Random Patter Generator) weight selection.
- 12. The method of claim 11 wherein further during testing the PRPG (Pseudo Random Patter Generator) weight selection is varied as the PRPG clock is gated by the LFSR output on each A/B clock cycle within the LBIST test.
- 13. The method of claim 7 wherein said LFSR is part of said LBIST control logic and is exercised to generate pseudo-random data that is multiplexed with fixed value control parameters.
- 14. The method of claim 7 wherein said LFSR and weighting logic is part of said LBIST control logic for providing an LFSR output which gives certain control parameter settings a weighted higher probability of occuring during the LBIST test.
RELATED APPLICATIONS
[0001] References is made herein to a related application, namely reference 1 of T. Koprowski, et al., “Programmable LBIST Channel Weighting and Weight Selection”, U.S. Ser. No. 09/671,413 filed Nov. 27, 2000.