Patent Application
20090129281
1. Field
The field relates to a framework providing quality-energy scalability for tracking systems.
2. Description of Related Technology
By applying increasingly more sophisticated signal processing techniques, wireless communications have made remarkable breakthroughs during the last decades in the improvement of spectrum efficiency and throughput. However, although the progress on the algorithm side is pretty exciting, the implementation of these communication signal processing algorithms falls far behind. It was observed that the signal processing requirement (complexity) increases exponentially with the increment of spectrum efficiency. Hence, although Moore's law predicts a fast evolution of the semiconductor integration, the new birth of silicon capability is rapidly exhausted by the explosion of signal processing complexity in wireless communication.
On the other hand, the gap between silicon capability and battery capacity, which is caused by the slow progress in battery technology, is another constraint that prevents sophisticated signal processing functions from being implemented on real life platforms. The power barrier becomes even more challenging in the context of Software Defined Radio (SDR), which offers unique programmability and flexibility at the expense of much higher power consumption than for highly optimized Application Specific Integrated Circuits (ASICs). Quality-Energy scalability, which allows scalable tradeoff between quality and signal processing energy, has been recognized as an effective and important approach toward energy efficient design. This general design philosophy has been intensively applied in wireless video delivery, low power filtering, multimedia codec, and cross layer energy management in wireless network.
First, state-of-the-art wireless systems devices are built to operate at only a fixed set of operating points and assume the worst-case conditions at all times. Irrespective of the link utilization, the highest feasible PHY rate is always used and the power amplifier operates at the maximum transmit power. Indeed, when using non-scalable transceivers, this highest feasible rate results in the smallest duty cycle for the power amplifier. Compared to scalable systems, this results in excessive energy consumption for average channel conditions and average link utilizations.
To achieve this goal, flexible systems must be specified having so-called configuration knobs that can be set at run-time to affect jointly the performance and energy consumption. The higher the flexibility, i.e. the number of configuration knobs across all layers, the higher the potential gain due to a better match between the system behavior, the environment and the real user requirements. However, a penalty exists due to the required shift, at least partially, of the optimization process to run-time. This is very challenging due to the combinatorial character of the problem (the number of candidate configurations rises exponentially with the number of controlled knobs).
Equalization is one of key stages in a wireless transceiver. In “C. Nicol et al., A low-power 128-tap digital adaptive equalizer for broadband modems, IEEE Journal of Solid-State Circuits, vol. 32, no. 11, pp. 177-1789, November 1997” a low power equalizer is introduced deploying 128 taps and symbol-rate power-of-two Least Mean Squares updating. In “K. Tarumi et al., A power reduction technique for an equalization circuit using adaptive bitwidth control, IEICE Technical Report, CAS2004-16, VLD2004-27, SIP2004-30, pp. 37-41, June 2004”, a low power equalizer is presented utilizing bitwidth control. Quality-Energy scalability was not targeted.
Certain embodiments provide a method for operating a telecom system, more in particular a wireless system, with a globally optimized power consumption for a given quality of service. Other embodiments further aim to provide devices suited to the method.
One embodiment includes a method of managing the operation of a system including a processing subsystem configured to run a multimedia application and a telecommunication subsystem. The method includes determining telecom environment conditions, and selecting a configuration from a plurality of configurations. The selecting is based at least in part on the determined environmental conditions. The method also includes setting control parameters such as channel speed in the multimedia application and/or the telecommunication subsystem to cause the system to operate at the selected configuration, and operating the system at the selected configuration. The configurations are determined by simultaneously updating control parameters by a controller of both the multimedia application and the telecommunication subsystem.
In another embodiment, the telecommunication subsystem comprises a receiver having an equalization block. The proposed scheme has several remarkable advantages when comparing to the related work. First of all, it implicitly tracks the higher order stochastic behavior with a simple feedback controller, so that the design effort and run-time overhead of an explicit estimator is avoided. In addition, since the scalability is achieved with high level algorithmic techniques, it does not impose any special requirement on the implementation platform, so that the equalizer can be implemented on various baseband platforms including ASIC, FPGA or instruction-set processors. Moreover, the proposed technique is independent of the updating algorithm. A QRD-RLS based chip equalizer can be considered. Since the technique works at high level by controlling macro (coarse-grain) operations, the overhead of scalability is low compared to the cost of each macro operation of QR updating. It does not conflict with lower level techniques such as for example selective updating and sub-band updating. The technique is not limited hereto but for example directly applicable to other updating algorithms such as LMS (and its variants), Kalman filter, . . . .
Another embodiment comprises a device suited to the method. The selection of a configuration comprises updating an equalization error by means of a controller. The updating interval is controlled by the speed of the channel fading. Usually the equalizer makes the pessimistic assumption that the channel is always changing very rapidly so that intensive tracking is necessary. In conventional equalizers, the coefficients are updated according to the worst-case assumption that the channel is very dynamic. The proposed invention avoids over-updating.
For example, in traditional ASIC based equalizers, the length of equalization is often determined as a worst-case value. Chip level equalization has been shown to be very effective to restore the orthogonal user signals and suppresses the MAI. As a consequence, it attracted lots of interest in the HSDPA research, which targets further improvement for 3G. However, the performance gain of chip level equalization comes at a huge energy cost because of the very high chip rate and the inherent complexity in advanced adaptive filter algorithms. Hence, achieving Quality-Energy scalability in chip HSDPA level equalization could contribute to their adoption in actual systems.
Currently proposed techniques to exploit the energy-performance trade-off in wireless links mainly rely on the reduction of the transmit-power. However, when considering the energy consumption breakdown of practical IEEE 802.11a WLAN transceivers, it appears that the transmit-power itself accounts only for 8% of the total energy consumption of the transmitter. The Power Amplifier (PA) dominates with 49%. Moreover, due to the stringent linearity and spectral mask requirements of the OFDM modulation, class A power amplifiers are most often required. Consequently, the actual energy consumption of the PA is invariant with the transmitted power. On the other hand, traditional receiver architectures are dimensioned for the most demanding modulation and present constant processing gain. Therefore, only the duty cycle effectively affects the link energy consumption. In that context, the highest modulation order that goes through the channel with reasonable packet error rate (i.e. 1%) is always the best choice. Performance (i.e. net data rate) downscaling does not bring effective energy consumption reduction.
For the receiver, it appears that the energy consumption is dominated by the digital signal processing in which the forward error correction accounts for an important part. Scalability in receiving energy consumption can be achieved by trading off processing gain (and consequently, receiver sensitivity) and computing energy by activating more or less digital signal processing. This can be achieved for instance by adopting iterative forward error correction (FEC) schemes like turbo-codes. Turbo-codes can be implemented with low energy consumption and provide a wide freedom to trade-off energy consumption versus code gain, which translates in receiving processing gain.
In US patent publication 2006/0114836 and U.S. application Ser. No. 11/247,403, which are hereby incorporated in its entirety, settings of new functional parameters are explored for deriving the optimal trade-off between the net data rate on top of the data-link layer (goodput) and the total link energy consumption. These are defined as the system level control knobs used to bring energy-scalability.
When considering energy-scalable systems, the number of control dimensions is large and leads to a combinatorial explosion of the possible system configurations. This problem is solved efficiently in US patent application 2006/0114836. A pragmatic scheme is provided to select the configurations at runtime. This is achieved by first determining the optimal configurations of all control dimensions at design time. At runtime, based on the channel condition and application load, the best operating point is selected from a significantly reduced set of possibilities.
A property of the design-time phase model is that the configurations can be ordered according to their minimal cost and resource consumption, describing a range of possible costs and resources for the system. For each additional unit of resource allocated, one only needs to consider the configuration that achieves the minimal cost for that unit of the resource. For each possible system state (for different channel and application loads), the optimal operating points are determined by pruning the Cost-Resource (C-R) curves to yield only the minimum cost configurations at each resource allocation point.
The optimization process can lead to much better solutions if all the factors are taken into account in a cross-layer approach. This way, we explore the cross-layer interdependencies and joint optimizations for varying network and video coding settings. The application of this approach is illustrated in an embodiment. The approach can be implemented into a framework providing quality-energy scalability for tracking systems. In particular, a feedback control scheme is presented to achieve Quality-Energy scalability for the chip level equalization in High Speed Downlink Packet Access (HSDPA) receivers.
The chip-level equalizer is an adaptive equalizer whose coefficients are derived from a pilot symbol. As a consequence, a key part of the equalizer is a set of algorithms estimating the Channel Impulse Response (CIR). Usually the equalizer makes the pessimistic assumption that the channel is always changing rapidly so that intensive tracking is necessary. This results in worst-case design with respect to energy consumption. In conventional equalizers, the coefficients are updated according to the worst-case assumption that the channel is very dynamic. In our proposed approach, the speed of the channel variation is taken into account to adapt the updating frequency. Specifically, a low-complexity closed-loop controller is designed to vary the update-interval while limiting the maximum equalization error. The proposed control scheme takes high order channel statistics implicitly into account without the need for an explicit estimator.
Instead of continuous updating at a high frequency, a more adaptive way is proposed to update the coefficients according to the speed of the channel fading. A feedback controller is added to a conventional chip level equalizer. The controller alters the update interval based on a maximum equalization error. Since the equalization error has a monotonic relationship with both the BER and signal processing energy, Quality-Energy scalability can be achieved by varying the set-point for the equalization error.
First the basic elements of one embodiment of the system model are given. Consider the downlink of a multiple cell Wideband Code Division Multiple Access (CDMA) system with j active base stations. Each base-station transmits a synchronous code division multiplex, employing, for example, short orthogonal Walsh-Hadamard spreading codes that are user specific and a long overlay scrambling code that is base-station specific. The multi-user chip sequence, transmitted by the jth base-station, consists of Kj active user signals and a continuous pilot signal:
Where i=└n/N┘.
Each user's data symbol sequence skj[i] (pilot symbol sequence spj[i]) is spread by a factor N with the length ρN user composite code sequence ckj[n] (pilot composite code sequence cpj[n]). The kth user's composite code sequence for the jth base-station ckj[n] (pilot composite code sequence cpj[n]) is the multiplication of the user specific pilot specific) short Walsh-Hadamard spreading code and the base-station specific long scrambling code.
The mobile station is equipped with M receive antennas. The received antenna signals are sampled at the chip-rate 1/Tc and the obtained samples are stacked in the M×1 received vector sequence y[n]=[y1[n], y2[n], . . . , yM[n]]r, which can be written as:
Where e[n]=[e1[n], e2[n], . . . , eM[n]]τ is the received noise vector sequence and h[n]=[h1[n], h2[n], . . . , hM[n]]τ is the discrete-time vector channel from the jth base-station to the M receive antennas, modeled as an M×1 FIR vector filter of order Lj with delay index δj.
The abstract model of pilot based adaptive equalizer is depicted in the dotted square in
In this embodiment, the mathematical optimization criterion of the adaptive equalizer is the least square error as formulated in the following:
where ga
There are many algorithm options for updating the equalization coefficients, most of them are variants of LMS RLS and Kalman filter. Here, QRD-RLS is used because of its fast convergence and numerical stability.
Conventional equalizers usually make the assumption that the channel dynamics are significant. As discussed before, this design paradigm has several disadvantages because of its-worst-case philosophy. Although consecutive updating is necessary for a fast fading channel, for instance between a highway vehicle and the base-station, consecutive updating is overkill for a slow fading channel. The energy cost of over-updating does not bring noticeable performance gain. Hence, to optimize, the update interval according to the speed of the speed channel fading can be adjusted.
Ideally, an estimator/monitor can be designed for the variation of the channel dynamics, and an optimal update interval might be analytically derived with the given constraints on quality (BER) losses. However, an accurate estimator itself is very difficult to design and the signal processing cost of an estimator itself is high because it deals with higher order stochastic behavior.
A feedback control scheme is proposed, comprising an explicit estimator for the variation of channel dynamics and the controller is designed to control the penalty of decreasing the update rate. Although the BER degradation is the direct consequence of a too low update rate, sometimes it is not feasible to measure the BER during run-time.
Defining equalization-error as the error between pilot symbols and outputs of the equalizer, we can easily deduce that an improperly large update interval will incur noisy CIR estimation, large equalization-error and large BER loss. Hence, we take the equalization error as a penalty metric and design a controller to alter update rate with controlled equalization error. In the chip level equalization case, the equalization error is:
θ=ga
With control system terminology, the controlled variable in the proposed controller is the equalization error and the controlling/manipulating variable that the controller adjusts is the update interval.
The framework of the Quality-Energy scalable equalizer, with variable update interval and controlled equalization-error, is depicted in
The dynamics model of the underlying system is hard to identify using general techniques and the high chip rate in CDMA strictly requires the controller to be simple. Hence we use a PID control algorithm. PID controllers are widely used in control systems dealing with complex or unknown dynamics. The PID controller works in a closed-loop system as following:
Where KP is Proportional gain, KI is Integral gain and KD is Derivative gain. The variable e represents the tracking error that indicates the difference between the set-point of equalization-error and the measured equalization-error. The controlling variable u in this case is the interval for updating.
The controller introduces a very small overhead. When implemented in discrete time domain, the PID computation in Eq. (5) consists of three multiplications, four additions, and two extra registers/storage units for the integration and differentiation operator. Furthermore, a counter and a comparator are required for deciding to update or not. However, one QR updating operation has the complexity of Θ(JQMN+JQ2M2), where J is the number of active base-station, Q is the temporary smoothing factor depending on channel conditions, M is the number of antenna, and N is the spreading factor. Since Q is often assumed to be large in practical implementations, the complexity of QR updating itself is magnitudes larger than the overhead of the proposed controller.
In the following, simulation results are given. The parameters of the simulation set-up follow the specifications of HSDPA. The transmitted signal encounters frequency selective fading. The wireless channels in the simulator are implemented as linear time variant FIR filters. Independent Rayleigh fading components (JAKE's model) are multiplied on the sampling instants. In order to evaluate the proposed technique under various realistic scenarios, we did simulation for a set of power-delay profiles of multiple-path channel as specified in 3GPP.
In order to evaluate the energy cost of signal processing, we record the number of updating-operation during simulation. Defined over an observation window with fixed length, the normalized cost is defined as λ=α/φ, where φ is the length of the observation window and α is the number of updating-operation performed in the observation window. If updating is performed at all intervals in the observation window, we have α=φ and λ=1.
Since the updating in QRD-RLS is a deterministic coarse-grain (macro) operation, it takes a fixed amount of cycles on processor based baseband and invokes an approximately constant amount of activities on various architecture components such as arithmetic units, load/store units, memory hierarchy and buses. Hence, λ is a good estimate for the normalized energy consumption of the proposed scalable chip level equalizer.
The run time behavior of the scalable equalizer is illustrated in
Second, we studied the Quality-Energy scalability achieved by the proposed equalizer. In
In order to quantify the relationship between BER loss and potential cost reduction, we plot BER loss versus normalized energy cost in
Pilot-trained adaptive equalizers are designed for tracking channel dynamics. Although the coefficients are updated to adapt to the channel dynamics, the way of updating is not adaptive. In order to maximize the quality of equalization, continuous updating is often applied. This is based on the worst-case assumption that the wireless channel is always varying rapidly. This worst-case design suffers from unnecessary high signal processing energy cost when the channel is not in those extreme cases.
In contrast to this worst case approach, we designed a channel equalizer that adapts to the variation of the channel dynamics as well. Specifically, we proposed a simple feedback control scheme to alter the update interval while controlling the equalization-error.
We applied this approach on a QRD-RLS based HSDPA chip level equalizer. Simulation results show that the proposed scheme implicitly made the equalizer aware of the higher order stochastic behavior in the wireless channel. In addition, the desired Quality-Energy scalability was achieved in the HSDPA chip level equalizer, and this translates into a significant saving of signal processing energy cost with negligible quality degradations for slow varying channels. Specifically, for a pedestrian channel, 60% signal processing cost can be saved with only 0.25 dB BER loss.
The proposed scheme has a number of advantages. First, it tracks the variation of the channel dynamics without paying the expensive cost of an explicit estimator of higher order statistics. Second, it is a high level algorithmic technique so that it has full portability over different baseband platforms. Third, the overhead is very low when compared to the QRD based updating operation. Finally, it is very general so that it can be applied to other adaptive filters applications with minor modifications.
While the above detailed description has shown, described, and pointed out novel features of the invention as applied to various embodiments, it will be understood that various omissions, substitutions, and changes in the form and details of the device or process illustrated may be made by those skilled in the art without departing from the spirit of the invention.
