Claims
- 1. A computer system comprising:
- a memory, wherein the memory includes a random access memory cell comprising:
- a trench capacitor, said trench capacitor formed beneath a major surface of a silicon substrate;
- a transistor comprising gate, source and drain regions, wherein said drain region of said transistor is electrically coupled to said trench capacitor; and
- a raised shallow trench isolation (RSTI), said RSTI having a top surface that is above the major surface of the silicon substrate wherein the amount of the top surface of the RSTI above the major surface of the silicon is enough for protecting the substrate surface and for preventing a divot in the substrate surface.
- 2. The computer system of claim 1 wherein the top surface of the RSTI is less than 100 nm above the silicon substrate.
- 3. The computer system of claim 1 wherein the top surface of the RSTI is between 20-100 nm above the silicon substrate.
- 4. The computer system of claim 1 wherein the top surface of the RSTI is between 20-100 nm above the silicon substrate.
- 5. The computer system of claim 1 wherein the top surface of the RSTI is between 50-70 nm above the silicon substrate.
- 6. The computer system of claim 1 wherein the top surface of the RSTI is at least 50 above the silicon substrate.
- 7. The computer system of claim 1 wherein the top surface of the RSTI is above the substrate enough for preventing oxidation stress.
- 8. The computer system of claim 1 wherein the top surface of the RSTI is above the substrate enough for reducing conduction at the corners of the RSTI.
Parent Case Info
This is a continuation-in-part of U.S. Ser. No. 08/873,100, filed on Jun. 11, 1997.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
5323343 |
Ogoh et al. |
Jun 1994 |
|
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
873100 |
Jun 1997 |
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